pic18f24j10.dev

HID汽车大灯安定器,应用现在的安定器上,有多种保护功能

    reset (por='01-00-00' mclr='01-00-00')
    bit (names='ABDOVF RCMT - SCKP BRG16 - WUE ABDEN')
    stimulus (scl=rwb regfiles=w)

#sfr (key=SPBRG_REG addr=0xFAF size=2 flags=j)
#    # NOTE: The j flag means all these registers together form one larger register
#    bit (names='SPBRG_REG' width='16')
sfr (key=SPBRGH addr=0xFB0 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SPBRGH' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=SPBRG addr=0xFAF size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SPBRG' width='8')
    stimulus (scl=rwb regfiles=w)

sfr (key=RCREG addr=0xFAE size=1 access='r r r r r r r r')
    reset (por='00000000' mclr='00000000')
    bit (names='RCREG' width='8')
    stimulus (scl=rb regfiles=rp)
sfr (key=TXREG addr=0xFAD size=1 access='w w w w w w w w')
    reset (por='00000000' mclr='00000000')
    bit (names='TXREG' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TXSTA addr=0xFAC size=1 access='rw rw rw rw rw rw r rw')
    reset (por='00000010' mclr='00000010')
    bit (names='CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D')
    stimulus (scl=rwb regfiles=w)
sfr (key=RCSTA addr=0xFAB size=1 access='rw rw rw rw rw r r r')
    reset (por='0000000x' mclr='0000000x')
    bit (names='SPEN RX9 SREN CREN ADDEN FERR OERR RX9D')
    stimulus (scl=rwb regfiles=w)


                        #--------------------#
#-----------------------# Configuration Bits #-----------------------#
                        #--------------------#

cfgbits (key=CONFIG1L addr=0x3ff8 unused=0x00)
    field (key=WDTEN mask=0x01 desc="Watchdog Timer Enable" min=4)
        setting (req=0x01 value=0x01 desc="Enabled")
        setting (req=0x01 value=0x00 desc="Disabled")
    field (key=STVREN mask=0x20 desc="Stack Overflow Reset Enable")
        setting (req=0x20 value=0x20 desc="Enabled")
        setting (req=0x20 value=0x00 desc="Disabled")
    field (key=ENHCPU mask=0x40 desc="Enhanced CPU Enable")
        setting (req=0x40 value=0x40 desc="Enabled")
        setting (req=0x40 value=0x00 desc="Disabled")
    field (key=BACKBUG mask=0x80 desc="Background Debug" flags=h)
        setting (req=0x80 value=0x80 desc="Disabled")
        setting (req=0x80 value=0x00 desc="Enabled")

cfgbits (key=CONFIG1H addr=0x3ff9 unused=0x00)
	# Access mask for this bit field is RP (Read/Programmable bit)
    field (key=CP_0 mask=0x4 desc="Code Protect Enable")
        setting (req=0x4 value=0x4 desc="Disabled")
            checksum (type=0x0 protregion=0x00-0x00)
        setting (req=0x4 value=0x00 desc="Enabled")
            checksum (type=0x80 protregion=0x0-0x03ff7)
    field (key=SIGN mask=0x8 desc="Config Word Signature Bit" init=0 flags=h)
        setting (req=0x8 value=0x8 desc="Bulk erase of memory not conducated")
        setting (req=0x8 value=0x0 desc="Bulk erase of memory area complete")
    field (key=FNOP_0 mask=0xF0 desc="Force NOP" init=0xF0 flags=xh)
	setting (req=0xF0 value=0xF0 desc="NOPd")

cfgbits (key=CONFIG2L addr=0x3ffa unused=0x00)
    field (key=FOSC mask=0x03 desc="Oscillator")
        setting (req=0x03 value=0x03 desc="EC OSC with software PLL and CLKOUT on OSC2")
        setting (req=0x03 value=0x02 desc="EC OSC with CLKOUT on OSC2")
        setting (req=0x03 value=0x01 desc="HS OSC with software PLL")
        setting (req=0x03 value=0x00 desc="HS OSC")
    field (key=FOSC2 mask=0x04 desc="Default/Reset System Clock Select")
        setting (req=0x04 value=0x04 desc="Clock Select by FOSC")
        setting (req=0x04 value=0x00 desc="INTRC enabled")
    field (key=FCMEN mask=0x40 desc="Fail Safe Monitor Clock Enable")
        setting (req=0x40 value=0x40 desc="Enabled")
        setting (req=0x40 value=0x00 desc="Disabled")
    field (key=IESO mask=0x80 desc="Internal External Switch Over Enable")
        setting (req=0x80 value=0x80 desc="Enabled")
        setting (req=0x80 value=0x00 desc="Disabled")

cfgbits (key=CONFIG2H addr=0x3ffb unused=0x00)
    field (key=WDTPS mask=0x0f desc="Watchdog Timer Postscale")
        setting (req=0x000f value=0x000f desc="1:32,768")
        setting (req=0x000f value=0x000e desc="1:16,384")
        setting (req=0x000f value=0x000d desc="1:8,192")
        setting (req=0x000f value=0x000c desc="1:4,096")
        setting (req=0x000f value=0x000b desc="1:2,048")
        setting (req=0x000f value=0x000a desc="1:1,024")
        setting (req=0x000f value=0x0009 desc="1:512")
        setting (req=0x000f value=0x0008 desc="1:256")
        setting (req=0x000f value=0x0007 desc="1:128")
        setting (req=0x000f value=0x0006 desc="1:64")
        setting (req=0x000f value=0x0005 desc="1:32")
        setting (req=0x000f value=0x0004 desc="1:16")
        setting (req=0x000f value=0x0003 desc="1:8")
        setting (req=0x000f value=0x0002 desc="1:4")
        setting (req=0x000f value=0x0001 desc="1:2")
        setting (req=0x000f value=0x0000 desc="1:1")
    field (key=FNOP_1 mask=0xF0 desc="Force NOP" init=0xF0 flags=xh)
	setting (req=0xF0 value=0xF0 desc="NOPd")

#cfgbits (key=CONFIG3L addr=0x3ffc unused=0x00)

cfgbits (key=CONFIG3H addr=0x3ffd unused=0x00)
    field (key=CCP2MX mask=0x01 desc="CCP2 Mux")
        setting (req=0x01 value=0x01 desc="CCP2 I/O Muxed with RC1")
        setting (req=0x01 value=0x00 desc="CCP2 I/O Muxed with RB3")
    field (key=FNOP_2 mask=0xF0 desc="Force NOP" init=0xF0 flags=xh)
	setting (req=0xF0 value=0xF0 desc="NOPd")

                               # -------------------#
#------------------------------# Configuration WORM #------------------------------------#
                               # -------------------#

                               # ------------#
#------------------------------# Peripherals #------------------------------------#
                               # ------------#

#--------------------------------------------------------------------------------
# 				CM
#--------------------------------------------------------------------------------

peripheral18 (key=CM sfrs='CMCON CVRCON')
    pinfunc (key=C1INN port=RA0 dir=in)
    pinfunc (key=C1INP port=RA3 dir=in)
    pinfunc (key=C2INN port=RA1 dir=in)
    pinfunc (key=C2INP port=RA2 dir=in)
    pinfunc (key=C1OUT port=RB5 dir=out)
    pinfunc (key=C2OUT port=RA5 dir=out)
    interrupt (name=CMINT enreg=PIE2 enmask=0x40 flgreg=PIR2 flgmask=0x40 prireg=IPR2 primask=0x40)

#--------------------------------------------------------------------------------
# 				TIMERs
#--------------------------------------------------------------------------------

peripheral18 (key=TMR0 sfrs='TMR0H TMR0L T0CON')
    pinfunc (key=T0CKI port=RB5 dir=in)
    interrupt (name=TMR0INT enreg=INTCON enmask=0x20 flgreg=INTCON flgmask=0x04 prireg=INTCON2 primask=0x04)

peripheral18 (key=TMR1 sfrs='TMR1H TMR1L T1CON')
    pinfunc (key=T1CKI port=RC0 dir=in)
    interrupt (name=TMR1INT enreg=PIE1 enmask=0x01 flgreg=PIR1 flgmask=0x01 prireg=IPR1 primask=0x01)

peripheral18 (key=TMR2 sfrs='TMR2 PR2 T2CON')
    interrupt (name=TMR2INT enreg=PIE1 enmask=0x02 flgreg=PIR1 flgmask=0x02 prireg=IPR1 primask=0x02)

#--------------------------------------------------------------------------------
# 				ADC
#--------------------------------------------------------------------------------

peripheral18 (key=ADC sfrs='ADCON0 ADCON1 ADCON2 ADRESL ADRESH')
    pinfunc (key=AN0 port=RA0 dir=in)
    pinfunc (key=AN1 port=RA1 dir=in)
    pinfunc (key=AN2 port=RA2 dir=in)
    pinfunc (key=AN3 port=RA3 dir=in)
    pinfunc (key=AN4 port=RA5 dir=in)
    pinfunc (key=AN8 port=RB2 dir=in)
    pinfunc (key=AN9 port=RB3 dir=in)
    pinfunc (key=AN10 port=RB1 dir=in)
    pinfunc (key=AN11 port=RB4 dir=in)
    pinfunc (key=AN12 port=RB0 dir=in)
    access (key=ADCON1 mode=AD_PCFG_HEXSEL_POR)
    access (key=ADCON2 mode=AD_ACQUISITION)
    interrupt (name=ADC enreg=PIE1 enmask=0x40 flgreg=PIR1 flgmask=0x40 prireg=IPR1 primask=0x40)

#--------------------------------------------------------------------------------
# 				UARTs
#--------------------------------------------------------------------------------

peripheral18 (key=UART1 sfrs='SPBRGH SPBRG RCREG TXREG TXSTA RCSTA BAUDCON')
    pinfunc (key=U1RX port=RC7 dir=in)
    pinfunc (key=U1TX port=RC6 dir=out)
    interrupt (name=RXINT1 enreg=PIE1 enmask=0x20 flgreg=PIR1 flgmask=0x20 prireg=IPR1 primask=0x20)
    interrupt (name=TXINT1 enreg=PIE1 enmask=0x10 flgreg=PIR1 flgmask=0x10 prireg=IPR1 primask=0x10)

#--------------------------------------------------------------------------------
# 				PORTA
#--------------------------------------------------------------------------------

peripheral18 (key=PORTA sfrs='TRISA LATA PORTA' type=port)
    iopin (key=RA0 dir=inout)
        cnpin (key=C1INN notify=CM)
    iopin (key=RA1 dir=inout)
        cnpin (key=C2INN notify=CM)
    iopin (key=RA2 dir=inout)
        cnpin (key=C2INP notify=CM)
    iopin (key=RA3 dir=inout)
        cnpin (key=C1INP notify=CM)
    iopin (key=RA5 dir=inout)

#--------------------------------------------------------------------------------
# 				PORTB
#--------------------------------------------------------------------------------

peripheral18 (key=PORTB sfrs='TRISB LATB PORTB' type=port)
    iopin (key=RB0 dir=inout)
        extint (key=INT0 enreg=INTCON enmask=0x10 flgreg=INTCON flgmask=0x02 prireg=NONE primask=0x00)
#Not required as FLT0 is also INT0 and CCP uses the INT0 as a Fault line.
#	cnpin (key=PWMFLTA notify=ECCP1)
    iopin (key=RB1 dir=inout)
        extint (key=INT1 enreg=INTCON3 enmask=0x08 flgreg=INTCON3 flgmask=0x01 prireg=INTCON3 primask=0x40)
    iopin (key=RB2 dir=inout)
        extint (key=INT2 enreg=INTCON3 enmask=0x10 flgreg=INTCON3 flgmask=0x02 prireg=INTCON3 primask=0x80)
    iopin (key=RB3 dir=inout)
        cnpin (key=CCP2CN notify=CCP2)
    iopin (key=RB4 dir=inout)
        cnint (key=KBIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=INTCON2 primask=0x01 cnkey=KBI0)
    iopin (key=RB5 dir=inout)
        cnint (key=KBIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=INTCON2 primask=0x01 cnkey=KBI1)
    iopin (key=RB6 dir=inout)
        cnint (key=KBIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=INTCON2 primask=0x01 cnkey=KBI2)
    iopin (key=RB7 dir=inout)
        cnint (key=KBIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=INTCON2 primask=0x01 cnkey=KBI3)

#--------------------------------------------------------------------------------
# 				PORTC
#--------------------------------------------------------------------------------

peripheral18 (key=PORTC sfrs='TRISC LATC PORTC' type=port)
    iopin (key=RC0 dir=inout)
    iopin (key=RC1 dir=inout)
        cnpin (key=CCP2CN notify=CCP2)
    iopin (key=RC2 dir=inout)
        cnpin (key=CCP1CN notify=ECCP1SP)
    iopin (key=RC3 dir=inout)
    iopin (key=RC4 dir=inout)
    iopin (key=RC5 dir=inout)
    iopin (key=RC6 dir=inout)
    iopin (key=RC7 dir=inout)
        cnpin (key=URX notify=UART1)


#--------------------------------------------------------------------------------
# 				CCP
#--------------------------------------------------------------------------------

# This has a single pin Enhanced CCP, it has auto shutdown which requires PWM and SHutdown regs
peripheral18 (key=ECCP1SP sfrs='CCP1CON CCPR1L CCPR1H ECCP1AS PWM1CON')
    pinfunc (key=ECCPA port=RC2 dir=inout)
    interrupt (name=ECCP1INT enreg=PIE1 enmask=0x04 flgreg=PIR1 flgmask=0x04 prireg=IPR1 primask=0x04)
    timers (addr=0xFB1 mask=0x48)
        setting (val=0x48 cc=TMR1 pwm=TMR2)
        setting (val=0x40 cc=TMR1 pwm=TMR2)
        setting (val=0x08 cc=TMR1 pwm=TMR2)
        setting (val=0x00 cc=TMR1 pwm=TMR2)
    deadband (key=PWM1CON mask=0x7F)
    pwmshutdown (key=ECCP1AS)

peripheral18 (key=CCP2 sfrs='CCP2CON CCPR2H CCPR2L')
    pinfunc (key=CCP2 port=multi dir=inout)
        portpins (muxaddr=0x300005 muxmask=0x01)
            setting (muxval=0x00 port=RB3 dir=inout)
            setting (muxval=0x01 port=RC1 dir=inout)
    interrupt (name=CCP2INT enreg=PIE2 enmask=0x01 flgreg=PIR2 flgmask=0x01 prireg=IPR2 primask=0x01)
    specialevent (key=ADC)
    timers (addr=0xFB1 mask=0x48)
        setting (val=0x48 cc=TMR1 pwm=TMR2)
        setting (val=0x40 cc=TMR1 pwm=TMR2)
        setting (val=0x08 cc=TMR1 pwm=TMR2)
        setting (val=0x00 cc=TMR1 pwm=TMR2)

#--------------------------------------------------------------------------------
# 				OSC
#--------------------------------------------------------------------------------

peripheral18 (key=OSC sfrs='OSCCON')
    pinfunc (key=T1OSCI port=RC1 dir=in)
        nextp (nextperiph=CCP2 nextpin=CCP2)
    pinfunc (key=T1OSCO port=RC0 dir=out)
        nextp (nextperiph=TMR1 nextpin=T1CKI)

#--------------------------------------------------------------------------------
# 				SSP
#--------------------------------------------------------------------------------

peripheral18 (key=SSP1)