📄 m500auc.lst
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715 2 // necessary
C51 COMPILER V4.01, M500AUC 29/08/06 08:02:01 PAGE 12
716 2 // initialize bit phase
717 2
718 2
719 2 WriteIO(RegBitPhase,0xAD);
720 2
721 2 Temp = ReadIO(RegBitPhase);
722 2
723 2 // initialize minlevel
724 2 WriteIO(RegRxThreshold,0xFF);
725 2
726 2 Temp = ReadIO(RegRxThreshold);
727 2
728 2 // disable auto power down
729 2 WriteIO(RegRxControl2,0x01);
730 2 Temp = ReadIO(RegRxControl2);
731 2 // Depending on the processing speed of the
732 2 // operation environment, the waterlevel
733 2 // can be adapted. (not very critical for
734 2 // mifare applications)
735 2 // initialize waterlevel to value 4
736 2 WriteIO(RegFIFOLevel,0x04);
737 2
738 2 Temp = ReadIO(RegFIFOLevel);
739 2 //Timer configuration
740 2 WriteIO(RegTimerControl,0x02); // TStopRxEnd=0,TStopRxBeg=0,
741 2 // TStartTxEnd=1,TStartTxBeg=0
742 2 // timer must be stopped manually
743 2
744 2 Temp = ReadIO(RegTimerControl);
745 2 M500PcdSetTmo(1); // short timeout
746 2
747 2 WriteIO(RegIRqPinConfig,0x03); // interrupt active low enable
748 2
749 2 Temp = ReadIO(RegIRqPinConfig);
750 2 M500PcdRfReset(1); // Rf - reset and enable output driver
751 2 Pt = &MKeys[0][0];
752 2 // initialize internal key memory
753 2 for (i = 0; i < 16; i++)
754 2 {
755 3 for (j = 0; j < 12; j++)
756 3 {
757 4 MKeys[i][j] = 0x00;
758 4 Pt++;
759 4 }
760 3 }
761 2
762 2 memcpy(MKeys,AledKey,192);
763 2
764 2 }
765 1
766 1 return status;
767 1 }
768
769 ///////////////////////////////////////////////////////////////////////
770 // M I F A R E R E M O T E A N T E N N A
771 // Configuration of slave module
772 ///////////////////////////////////////////////////////////////////////
773 char M500PcdMfInOutSlaveConfig(void)
774 {
775 1 char data status = MI_OK;
776 1
777 1 FlushFIFO(); // empty FIFO
778 1 ResetInfo(MInfo);
779 1 MSndBuffer[0] = 0x10; // addr low byte
780 1 MSndBuffer[1] = 0x00; // addr high byte
781 1
C51 COMPILER V4.01, M500AUC 29/08/06 08:02:01 PAGE 13
782 1 MSndBuffer[2] = 0x00; // Page
783 1 MSndBuffer[3] = 0x7B; // RegTxControl modsource 11,InvTx2,Tx2RFEn,TX1RFEn
784 1 MSndBuffer[4] = 0x3F; // RegCwConductance
785 1 MSndBuffer[5] = 0x3F; // RFU13
786 1 MSndBuffer[6] = 0x19; // RFU14
787 1 MSndBuffer[7] = 0x13; // RegModWidth
788 1 MSndBuffer[8] = 0x00; // RFU16
789 1 MSndBuffer[9] = 0x00; // RFU17
790 1
791 1 MSndBuffer[10] = 0x00; // Page
792 1 MSndBuffer[11] = 0x73; // RegRxControl1
793 1 MSndBuffer[12] = 0x08; // RegDecoderControl
794 1 MSndBuffer[13] = 0x6c; // RegBitPhase
795 1 MSndBuffer[14] = 0xFF; // RegRxThreshold
796 1 MSndBuffer[15] = 0x00; // RFU1D
797 1 MSndBuffer[16] = 0x00; // RegRxControl2
798 1 MSndBuffer[17] = 0x00; // RegClockQControl
799 1
800 1 MSndBuffer[18] = 0x00; // Page
801 1 MSndBuffer[19] = 0x06; // RegRxWait
802 1 MSndBuffer[20] = 0x03; // RegChannelRedundancy
803 1 MSndBuffer[21] = 0x63; // RegCRCPresetLSB
804 1 MSndBuffer[22] = 0x63; // RegCRCPresetMSB
805 1 MSndBuffer[23] = 0x0; // RFU25
806 1 MSndBuffer[24] = 0x04; // RegMfOutSelect enable mfout = manchester HT
807 1 MSndBuffer[25] = 0x00; // RFU27
808 1
809 1 // PAGE 5 FIFO, Timer and IRQ-Pin Configuration
810 1 MSndBuffer[26] = 0x00; // Page
811 1 MSndBuffer[27] = 0x08; // RegFIFOLevel
812 1 MSndBuffer[28] = 0x07; // RegTimerClock
813 1 MSndBuffer[29] = 0x06; // RegTimerControl
814 1 MSndBuffer[30] = 0x0A; // RegTimerReload
815 1 MSndBuffer[31] = 0x02; // RegIRqPinConfig
816 1 MSndBuffer[32] = 0x00; // RFU
817 1 MSndBuffer[33] = 0x00; // RFU
818 1 MInfo.nBytesToSend = 34;
819 1
820 1 status = M500PcdCmd(PCD_WRITEE2,
821 1 MSndBuffer,
822 1 MRcvBuffer,
823 1 &MInfo); // write e2
824 1 return status;
825 1 }
826
827 ///////////////////////////////////////////////////////////////////////
828 // M I F A R E R E M O T E A N T E N N A
829 // Configuration of master module
830 ///////////////////////////////////////////////////////////////////////
831 char M500PcdMfInOutMasterConfig(void)
832 {
833 1 WriteIO(RegRxControl2,0x42);
834 1 WriteIO(RegTxControl,0x10);
835 1 WriteIO(RegBitPhase,0x11);
836 1
837 1 return MI_OK;
838 1 }
839
840 ///////////////////////////////////////////////////////////////////////
841 // M A S T E R K E Y L O A D
842 ///////////////////////////////////////////////////////////////////////
843 char M500PcdLoadMk(unsigned char auth_mode, // KEYA or KEYB
844 unsigned char key_addr, // 0 <= key_addr <= 15
845 unsigned char *mk) // 6 bytes uncoded master key
846 {
847 1 unsigned char data offset = (auth_mode == PICC_AUTHENT1A) ? 0 : 6;
C51 COMPILER V4.01, M500AUC 29/08/06 08:02:01 PAGE 14
848 1
849 1 memcpy(MKeys[key_addr] + offset,mk,6);
850 1 return MI_OK;
851 1 }
852
853 ///////////////////////////////////////////////////////////////////////
854 // E E P R O M M A S T E R K E Y L O A D
855 ///////////////////////////////////////////////////////////////////////
856 char M500PcdLoadKeyE2(unsigned char key_type,
857 unsigned char sector,
858 unsigned char *uncoded_keys)
859 {
860 1 char data status = MI_OK;
861 1 // eeprom address calculation
862 1 // 0x80 ... offset
863 1 // key_sector ... sector
864 1 // 0x18 ... 2 * 12 = 24 = 0x18
865 1 unsigned short data e2addr = 0x80 + sector * 0x18;
866 1 unsigned char data *e2addrbuf = (unsigned char*)&e2addr;
*** WARNING 182 IN LINE 866 OF F:\1\M500AUC.C: pointer to different objects
867 1 unsigned char data keycoded[12];
868 1
869 1 if (key_type == PICC_AUTHENT1B)
870 1 e2addr += 12; // key B offset
871 1
872 1 FlushFIFO(); // empty FIFO
873 1 ResetInfo(MInfo);
874 1
875 1 M500HostCodeKey(uncoded_keys,keycoded);
876 1 memcpy(MSndBuffer,e2addrbuf,2); // write low and high byte of address
877 1 MSndBuffer[2] = MSndBuffer[0]; // Move the LSB of the 2-bytes
878 1 MSndBuffer[0] = MSndBuffer[1]; // address to the first byte
879 1 MSndBuffer[1] = MSndBuffer[2];
880 1 memcpy(&MSndBuffer[2],keycoded,12); // write 12 bytes of coded keys
881 1 MInfo.nBytesToSend = 14;
882 1
883 1 // write load command
884 1 status = M500PcdCmd(PCD_WRITEE2,
885 1 MSndBuffer,
886 1 MRcvBuffer,
887 1 &MInfo);
888 1
889 1 return status;
890 1 }
891
892 ///////////////////////////////////////////////////////////////////////
893 // E E P R O M R E A D
894 ///////////////////////////////////////////////////////////////////////
895 char PcdReadE2(unsigned short startaddr,
896 unsigned char length,
897 unsigned char* _data)
898 {
899 1 char status = MI_OK;
900 1 Pt = &MSndBuffer;
901 1 // ************* Cmd Sequence **********************************
902 1 ResetInfo(MInfo);
903 1 MSndBuffer[0] = startaddr & 0xFF; //低字节
904 1 MSndBuffer[1] = (startaddr >> 8) & 0xFF; //高字节
905 1 MSndBuffer[2] = length; //数据长度
906 1 MInfo.nBytesToSend = 3;
907 1 status = M500PcdCmd(PCD_READE2,
908 1 MSndBuffer,
909 1 MRcvBuffer,
910 1 &MInfo);
911 1 if (status == MI_OK)
912 1 {
C51 COMPILER V4.01, M500AUC 29/08/06 08:02:01 PAGE 15
913 2
914 2 memcpy(_data,MRcvBuffer,length);
915 2
916 2 }
917 1 else // Response Processing
918 1 {
919 2 _data[0] = 0;
920 2 }
921 1 return status ;
922 1 }
923
924 ///////////////////////////////////////////////////////////////////////
925 // E E P R O M W R I T E
926 ///////////////////////////////////////////////////////////////////////
927 char PcdWriteE2(unsigned short startaddr,
928 unsigned char length,
929 unsigned char* _data)
930 {
931 1 char status = MI_OK;
932 1
933 1 // ************* Cmd Sequence **********************************
934 1 ResetInfo(MInfo);
935 1 MSndBuffer[0] = startaddr & 0xFF;
936 1 MSndBuffer[1] = (startaddr >> 8) & 0xFF;
937 1 memcpy(MSndBuffer + 2,_data,length);
938 1
939 1 MInfo.nBytesToSend = length + 2;
940 1
941 1 status = M500PcdCmd(PCD_WRITEE2,
942 1 MSndBuffer,
943 1 MRcvBuffer,
944 1 &MInfo); // write e2
945 1 return status;
946 1 }
947
948 ///////////////////////////////////////////////////////////////////////
949 // C O N F I G M F O U T S E L E C T
950 ///////////////////////////////////////////////////////////////////////
951 char M500PcdMfOutSelect(unsigned char type)
952 {
953 1 WriteIO(RegMfOutSelect,type&0x7);
954 1 return MI_OK;
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