📄 sp_serialflashv1.asm
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R1 = [BP+3];
r1=r1 lsl 2; // 1K page size
r1=r1&0x01FF;
r1=r1|0x8000;
[P_SIO_Addr_Low]=r1; // input SFLASH low address ;for A15 and A10
r1=r1 lsr 4;
r1=r1 lsr 4;
[P_SIO_Addr_Mid]=r1; // input SFLASH mid address ;for A16
r1=0x00C0+C_SIOCLOCK;
[P_SIO_Ctrl]=r1; // clk=CPUclk/8, 16 bit address ;write
[P_SIO_Start]=r1; // enable write mode
r1=0; // A7~A0 = 0
[P_SIO_Data]=r1; // state to transmit data
L_WaitSIOSendReadyPage:
r1=[P_SIO_Start];
test r1,0x0080
jne L_WaitSIOSendReadyPage
[P_SIO_Stop]=r1; //disable write mode
call F_Delay11ms
POP BP,BP FROM [SP];
retf;
.ENDP;
///////////////////////////////////////////////////////////////
//Function : Mass Erase for S_Flash
// Syntax: SIOMassErase()
// Used register: r1,r2
///////////////////////////////////////////////////////////////
.public _SP_SIOMassErase;
_SP_SIOMassErase: .PROC
F_SIOMassErase:
push r1,r2 to [sp];
r1=0x00C0+C_SIOCLOCK;
[P_SIO_Ctrl]=r1; // clk=CPUclk/8, 16 bit address ;write
r2=0x0000;
[P_SIO_Addr_Low]=r2; // input SFLASH low address
r2=0x00C0;
[P_SIO_Addr_Mid]=r2; // input SFLASH mid address
r2=0x00C0;
[P_SIO_Addr_High]=r2;
// r1=0x00C0+C_SIOCLOCK;
// [P_SIO_Ctrl]=r1; // clk=CPUclk/8, 16 bit address ;write
[P_SIO_Start]=r1; // enable write mode
r1=0; // A7~A0 = 0
[P_SIO_Data]=r1; // state to transmit data
L_WaitSIOSendReadyMass:
r1=[P_SIO_Start];
test r1,0x0080
jne L_WaitSIOSendReadyMass
//disable write mode
[P_SIO_Stop]=r1;
call F_Delay11ms
call F_Delay11ms //
call F_Delay11ms
call F_Delay11ms
pop r1,r2 from [sp];
retf;
.ENDP;
F_Delay11ms:
push r1,r1 to [sp];
//r1=17*10;
r1=20*10; // delay
L_LoopDelay11:
call F_Delay100uS;
r1-=1;
jne L_LoopDelay11
pop r1,r1 from [sp];
retf;
///////////////////////////////////////////////////////////////
//Function : 100us Dealy for S_Flash programming time (base on CPUCLK= 24MHz)
// Syntax: Delay100uS()
// Used register: r1,r2
///////////////////////////////////////////////////////////////
.public _Delay100uS;
_Delay100uS: .PROC
F_Delay100uS: //13
push r1,r1 to [sp]; //7
r1=294; //6
L_DelayLoop:
r1-=1; //3 26+19+8*294 =2400
jne L_DelayLoop; //5
pop r1,r1 from [sp]; //7
retf; //12
.ENDP;
///////////////////////////////////////////////////////////////
//Function : Dealy for S_Flash programming time (base on CPUCLK= 24MHz)
// Syntax: DelayPT()
// Used register: r1
///////////////////////////////////////////////////////////////
.public _DelayPT;
_DelayPT: .PROC
F_DelayPT: //13
push r1,r1 to [sp]; //7
//r1=294; //6
//r1=147;
//r1=1600;
//r1=100;
r1=160
//r1=200;
L_DelayLoopPT:
r1-=1; //3 26+19+8*160 =1325 ----> 56us
jne L_DelayLoopPT; //5
pop r1,r1 from [sp]; //7
retf; //12
.ENDP;
///////////////////////////////////////////////////////////////
//Function : Write head. There are 8 bytes. The first 4 bytes is address of ending speech
// The last 4 bytes is 1' complement of first 4 bytes
// Syntax : SP_WriteHeader( Low Address of header, High Address of header, DataLow, DataHigh)
// Used register: r1-r3
///////////////////////////////////////////////////////////////
.public _SP_WriteHeader;
_SP_WriteHeader: .PROC
F_WriteHeader:
PUSH BP,BP TO [SP];
BP = SP + 1;
r3=[BP+5]; //data for programming
r2=[BP+4]; //high addr for programming
r1=[BP+3]; //low addr for programming
PUSH r1,r3 TO [SP];
call F_SIOSendAWord;
pop r1,r3 from [SP];
r3=[BP+6]; //data for programming
r2=[BP+4]; //high addr for programming
r1=[BP+3]; //low addr for programming
r1+=2;
r2+=0, carry;
PUSH r1,r3 TO [SP];
call F_SIOSendAWord;
pop r1,r3 from [SP];
r3=[BP+5]; //data for programming
r3^=0xffff;
r2=[BP+4]; //high addr for programming
r1=[BP+3]; //low addr for programming
r1+=4;
r2+=0, carry;
PUSH r1,r3 TO [SP];
call F_SIOSendAWord;
pop r1,r3 from [SP];
r3=[BP+6]; //data for programming
r3^=0xffff;
r2=[BP+4]; //high addr for programming
r1=[BP+3]; //low addr for programming
r1+=6;
r2+=0, carry;
PUSH r1,r3 TO [SP];
call F_SIOSendAWord;
pop r1,r3 from [SP];
POP BP,BP FROM [SP];
retf;
.ENDP;
///////////////////////////////////////////////////////////////
//Function : Check header. Header has 8 bytes. The first 4 bytes is address of ending speech
// The last 4 bytes is 1' complement of first 4 bytes
// Syntax : CheckHeader( Low Address of header, High Address of header)
// Used register: r1
// return value : r1, r2 (if r1=0xffff and r2=0xffff, error)
///////////////////////////////////////////////////////////////
.public _SP_CheckHeader;
_SP_CheckHeader: .PROC
F_CheckHeader:
PUSH BP,BP TO [SP];
BP = SP + 1;
r3=[BP+4]; //high addr for reading
r2=[BP+3]; //low addr for reading
r2+=2;
r3+=0, carry;
PUSH r2,r4 TO [SP];
call F_SIOReadAWord;
pop r2,r4 from [SP];
r4=r1;
r3=[BP+4]; //high addr for reading
r2=[BP+3]; //low addr for reading
r2+=6;
r3+=0, carry;
PUSH r2,r4 TO [SP];
call F_SIOReadAWord;
pop r2,r4 from [SP];
r1^=0xffff;
cmp r1,r4
jne L_HeaderError
PUSH r4,r4 TO [SP]; //save high byte of return data
r3=[BP+4]; //high addr for reading
r2=[BP+3]; //low addr for reading
PUSH r2,r4 TO [SP];
call F_SIOReadAWord;
pop r2,r4 from [SP];
r4=r1;
r3=[BP+4]; //high addr for reading
r2=[BP+3]; //low addr for reading
r2+=4;
r3+=0, carry;
PUSH r2,r4 TO [SP];
call F_SIOReadAWord;
pop r2,r4 from [SP];
r1^=0xffff;
cmp r1,r4
jne L_HeaderError2
POP r2,r2 FROM [SP]; //get high byte of return data
POP BP,BP FROM [SP];
retf;
L_HeaderError2:
POP r4,r4 FROM [SP]; //remove high byte of return data
L_HeaderError:
r1=0xffff;
r2=0xffff;
POP BP,BP FROM [SP];
.ENDP;
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