net_1c6_911.tan.rpt

来自「91c111芯片的网络模块的原理图以及和ep1c6fpga连线相关的例子程序」· RPT 代码 · 共 181 行 · 第 1/5 页

Timing Analyzer report for net_1c6_911
Wed Jul 26 14:58:00 2006
Version 5.1 Build 216 03/06/2006 Service Pack 2 SJ Full Version


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; Table of Contents ;
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  1. Legal Notice
  2. Timing Analyzer Summary
  3. Timing Analyzer Settings
  4. Clock Settings Summary
  5. Clock Setup: 'altpll0:inst1|altpll:altpll_component|_clk0'
  6. Clock Setup: 'altera_internal_jtag~TCKUTAP'
  7. Clock Hold: 'altpll0:inst1|altpll:altpll_component|_clk0'
  8. tsu
  9. tco
 10. tpd
 11. th
 12. Ignored Timing Assignments
 13. Timing Analyzer Messages



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; Legal Notice ;
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Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of