net_1c6_911.map.rpt

91c111芯片的网络模块的原理图以及和ep1c6fpga连线相关的例子程序

; db/cntr_rd8.tdf                   ; yes             ; Auto-Generated Megafunction        ; D:/Test/net_1c6_911/db/cntr_rd8.tdf                               ;
; alt_jtag_atlantic.v               ; yes             ; Encrypted Megafunction             ; d:/altera/quartus51/libraries/megafunctions/alt_jtag_atlantic.v   ;
; led_pio.v                         ; yes             ; Other                              ; D:/Test/net_1c6_911/led_pio.v                                     ;
; sdram_0.v                         ; yes             ; Other                              ; D:/Test/net_1c6_911/sdram_0.v                                     ;
; sys_clk_timer.v                   ; yes             ; Other                              ; D:/Test/net_1c6_911/sys_clk_timer.v                               ;
; sysid.v                           ; yes             ; Other                              ; D:/Test/net_1c6_911/sysid.v                                       ;
; altpll0.v                         ; yes             ; Other                              ; D:/Test/net_1c6_911/altpll0.v                                     ;
; altpll.tdf                        ; yes             ; Megafunction                       ; d:/altera/quartus51/libraries/megafunctions/altpll.tdf            ;
; stratix_pll.inc                   ; yes             ; Other                              ; d:/altera/quartus51/libraries/megafunctions/stratix_pll.inc       ;
; stratixii_pll.inc                 ; yes             ; Other                              ; d:/altera/quartus51/libraries/megafunctions/stratixii_pll.inc     ;
; cycloneii_pll.inc                 ; yes             ; Other                              ; d:/altera/quartus51/libraries/megafunctions/cycloneii_pll.inc     ;
; sld_hub.vhd                       ; yes             ; Encrypted Megafunction             ; d:/altera/quartus51/libraries/megafunctions/sld_hub.vhd           ;
; lpm_shiftreg.tdf                  ; yes             ; Megafunction                       ; d:/altera/quartus51/libraries/megafunctions/lpm_shiftreg.tdf      ;
; lpm_constant.inc                  ; yes             ; Other                              ; d:/altera/quartus51/libraries/megafunctions/lpm_constant.inc      ;
; dffeea.inc                        ; yes             ; Other                              ; d:/altera/quartus51/libraries/megafunctions/dffeea.inc            ;
; lpm_decode.tdf                    ; yes             ; Megafunction                       ; d:/altera/quartus51/libraries/megafunctions/lpm_decode.tdf        ;
; declut.inc                        ; yes             ; Other                              ; d:/altera/quartus51/libraries/megafunctions/declut.inc            ;
; altshift.inc                      ; yes             ; Other                              ; d:/altera/quartus51/libraries/megafunctions/altshift.inc          ;
; lpm_compare.inc                   ; yes             ; Other                              ; d:/altera/quartus51/libraries/megafunctions/lpm_compare.inc       ;
; db/decode_9ie.tdf                 ; yes             ; Auto-Generated Megafunction        ; D:/Test/net_1c6_911/db/decode_9ie.tdf                             ;
; sld_dffex.vhd                     ; yes             ; Encrypted Megafunction             ; d:/altera/quartus51/libraries/megafunctions/sld_dffex.vhd         ;
; sld_rom_sr.vhd                    ; yes             ; Encrypted Megafunction             ; d:/altera/quartus51/libraries/megafunctions/sld_rom_sr.vhd        ;
+-----------------------------------+-----------------+------------------------------------+-------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary                                               ;
+---------------------------------------------+---------------------------------------------+
; Resource                                    ; Usage                                       ;
+---------------------------------------------+---------------------------------------------+
; Total logic elements                        ; 3487                                        ;
;     -- Combinational with no register       ; 1688                                        ;
;     -- Register only                        ; 725                                         ;
;     -- Combinational with a register        ; 1074                                        ;
;                                             ;                                             ;
; Logic element usage by number of LUT inputs ;                                             ;
;     -- 4 input functions                    ; 1444                                        ;
;     -- 3 input functions                    ; 974                                         ;
;     -- 2 input functions                    ; 279                                         ;
;     -- 1 input functions                    ; 56                                          ;
;     -- 0 input functions                    ; 9                                           ;
;         -- Combinational cells for routing  ; 0                                           ;
;                                             ;                                             ;
; Logic elements by mode                      ;                                             ;
;     -- normal mode                          ; 3229                                        ;
;     -- arithmetic mode                      ; 258                                         ;
;     -- qfbk mode                            ; 0                                           ;
;     -- register cascade mode                ; 0                                           ;
;     -- synchronous clear/load mode          ; 237                                         ;
;     -- asynchronous clear/load mode         ; 1539                                        ;
;                                             ;                                             ;
; Total registers                             ; 1799                                        ;
; Total logic cells in carry chains           ; 281                                         ;
; I/O pins                                    ; 112                                         ;
; Total memory bits                           ; 50688                                       ;
; Total PLLs                                  ; 1                                           ;
; Maximum fan-out node                        ; altpll0:inst1|altpll:altpll_component|_clk0 ;
; Maximum fan-out                             ; 1777                                        ;
; Total fan-out                               ; 17844                                       ;
; Average fan-out                             ; 4.73                                        ;
+---------------------------------------------+---------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                                                                                                                                                                                                                                                                                                                                                                                               ;
+---------------------------------------------------------------------------------------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Compilation Hierarchy Node                                                                                                ; Logic Cells ; LC Registers ; Memory Bits ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Packed LCs ; Full Hierarchy Name                                                                                                                                                                                                                                             ;