📄 paras.h
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// Each bit for a specified gate mode and the
// following mode has been defined.
//
#define CFG_CntrSupportedGateMode 0x5002
// Get supported counting edge of the counter.
//
// Data type: Long.
// Each bit for a specified counting edge and the
// following bit has been defined.
//
#define CFG_CntrSupportedCountEdge 0x5003
// Get supported output mode of the counter when terminal count reached.
//
// Data type: Long.
// Each bit for a specified output mode and the
// following mode has been defined.
//
#define CFG_CntrSupportedOutMode 0x5004
// Get available special api of the counter
//
// Data type: Long.
// Each bit for a specified api and the
// following has been defined.
//
#define CFG_CntrAvailableAPI 0x5005
// Get event id of the channel which can issue event.
//
// Data type: USHORT Array.
// One 'USHORT' for one channel, 0 indicates the channel can't
// issue event.
#define CFG_CntrChannelEventID 0x5006
// Get the internal clock frequence device used for pulse out,
// PWModulation or timer interrupt, etc...
//
// Data type: float array.
// Each element of array is a clock frequence value the device
// supported and the frequence should be sorted from lower to higher.
//
#define CFG_CntrInternalClockFreq 0x5007
// Get the validate range of period and HiPeriod of PWModulation function.
// data type: float array
// the data order in array:
// [min_period][max_period][min_hiperiod][max_hiperiod]
//
#define CFG_CntrPWModulateValidRange 0x5008
// Get the counter channel count
// data type: LONG
#define CFG_CntrChannelCount 0x5009
// Get the counter resolution
// data type: LONG array
#define CFG_CntrResolution 0x5010
// Get the counter initialization value or write the counter as timer divider
// data type: ULONG array
// One 'ULONG' for one counter channel
/*
#define CFG_CounterCountValue 0x5011
*/
// Get or set the counter reset value
// data type: ULONG array
#define CFG_CntrResetValue 0x5011
// Get the counter supported event type
// data type: LONG array
// One 'LONG' for one event type
#define CFG_Cntr0SupportedEventType 0x5012
#define CFG_Cntr1SupportedEventType 0x5013
#define CFG_Cntr2SupportedEventType 0x5014
#define CFG_Cntr3SupportedEventType 0x5015
#define CFG_Cntr4SupportedEventType 0x5016
// Get the counter supported lock type
// data type: LONG array
#define CFG_CntrSupportedCounterLock 0x5017
// Get or set the counter lock
// data type: LONG array
#define CFG_CntrCounterLockControl 0x5018
// Get the counter supported indicator type
// data type: LONG array
#define CFG_CntrSupportedIndicator 0x5019
// Get or set the counter indicator status
// data type: LONG array
#define CFG_CntrIndicatorControl 0x5020
// Get the counter supported clock frequency
// data type: LONG array
#define CFG_Cntr0SupportedClockFrequency 0x5021
#define CFG_Cntr1SupportedClockFrequency 0x5022
#define CFG_Cntr2SupportedClockFrequency 0x5023
#define CFG_Cntr3SupportedClockFrequency 0x5024
#define CFG_Cntr4SupportedClockFrequency 0x5025
// Get or set the current counter clock frequency
// data type: LONG array
#define CFG_CntrClockFrequency 0x5026
// Get the counter supported input mode
// data type: LONG array
#define CFG_Cntr0SupportedInputMode 0x5027
#define CFG_Cntr1SupportedInputMode 0x5028
#define CFG_Cntr2SupportedInputMode 0x5029
#define CFG_Cntr3SupportedInputMode 0x5030
// Get or set the current counter input mode
// data type: LONG array
#define CFG_CntrInputModeControl 0x5031
// Get or set counter compare data
// data type: ULONG array
#define CFG_CntrCompareData 0x5032
// Enable or Disable counter digital filter
// data type: LONG array
#define CFG_CntrDigitalFilter 0x5033
// Enable or Disable
// data type: LONG
#define CFG_CntrIndexReset 0x5034
// sub group 0x5800 ~ 0x5fff for counter/Timer general ID
// ---------------------------------------
// 0x6000 ~ 0x6fff for Other function related
// ---------------------------------------
// sub group 0x6000 ~ 0x6fff for Other function related ID
// Interrupt functions
#define CFG_IrqDiChangeStatusChannel 0x6000 // Change status channel number.
#define CFG_IrqDiTriggerSignals 0x6001 // Each bit for each Auxiliary DIO channel
#define CFG_IrqDiChangeStatusChannel_Name "IrqDiChangeStatusChannel"
#define CFG_IrqDiTriggerSignals_Name "IrqDiTriggerSignals"
#define CFG_WatchdogCounter 0x7000 // Watchdog counter.
#define CFG_DoWatchdogValue 0x7001 //Do status when watchdog overflow.
#define CFG_WatchdogCounter_Name "WatchdogCounter"
#define CFG_DoWatchdogValue_Name "DoWatchdogValue"
#define CFG_EEPROM_RWBYTE 0x8000 // Read/Write a word to the EEPROM
// ============================================================================
// Constant Variable Group
// ============================================================================
// Used by CFG_DioPortType ID
#define DIO_PortType_DI 0x0 // input port
#define DIO_PortType_DO 0x1 // output port
#define DIO_PortType_SeperateDIO 0x2 // di-direction port
#define DIO_PortType_8255_PortA 0x3 // 8255 mode 0 port A type
#define DIO_PortType_8255_PortC 0x4 // 8255 mode 0 port C type
#define DIO_PortType_Individual 0x5 // each channel can be set individually
// Used by CFG_DioChannelDirection ID
#define DIO_ChannelDir_DI ((DWORD)0)
#define DIO_ChannelDir_DO ((DWORD)0x000000ff)
#define DIO_ChannelDir_LowHalf_DO ((DWORD)0x0000000f)
#define DIO_ChannelDir_HighHalf_DO ((DWORD)0x000000f0)
#define DIO_ChannelDir_Invalid ((DWORD)0xffffffff)
#define DIO_ChannelDir_SeperateDIO ((DWORD)0x0000ff00)
// Used by CFG_DiDataWidth ID
#define DI_DataWidth_Byte 0x0
#define DI_DataWidth_Word 0x1
#define DI_DataWidth_DWORD 0x2
// used by CFG_DoDataWidth ID
#define DO_DataWidth_Byte 0x0
#define DO_DataWidth_Word 0x1
#define DO_DataWidth_Dword 0x2
// used by CFG_DiInterruptSupportedTriggerMode ID
#define DI_Int_SingleEdgeTrigger 0x0 // trigger on rising or falling edge.
#define DI_Int_DualEdgeTrigger 0x1 // trigger on rising or falling or both edge.
// used by CFG_CntrChannelCapability
#define CNTR_ChlCap_EventCounting 0x1 //bit 0
#define CNTR_ChlCap_FreqMeasurement 0x2 //bit 1
#define CNTR_ChlCap_PulseWidthMeasurement 0x4 //bit 2
#define CNTR_ChlCap_TimerInterrupt 0x8 //bit 3
#define CNTR_ChlCap_CounterInterrupt 0x10 //bit 4
#define CNTR_ChlCap_PulseWidthModulation 0x20 //bit 5
#define CNTR_ChlCap_PulseOut 0x40 //bit 6
#define CNTR_ChlCap_FreqOut 0x80 //bit 7
#define CNTR_ChlCap_WatchDogTimer 0x100 //bit 8
#define CNTR_ChlCap_CascadeWithNext 0x200 //bit 9
#define CNTR_ChlCap_CascadeWithPrev 0x400 //bit 10
// used by CFG_CntrSupportedGateMode
#define CNTR_GateMode_NoGate 0x1 // no gate signal( the gate will be set by software internally).
#define CNTR_GateMode_HighLevel 0x2 // High level active
#define CNTR_GateMode_LowLevel 0x4 // Low level active
// used by CFG_CntrSupportedCountEdge
#define CNTR_CountEdge_RisingEdge 0x1 // Rising edge counting
#define CNTR_CountEdge_FallingEdge 0x2 // Falling edge counting
// used by CFG_CntrSupportedOutMode
#define CNTR_OutMode_HighPulse 0x1 // Pin OUT_N outputs high pulse when the terminal count reached.
#define CNTR_OutMode_LowPulse 0x2 // Pin OUT_N outputs low pulse when the terminal count reached.
#define CNTR_OutMode_LowToHigh 0x4 // Pin OUT_N toggles from low to high when the terminal count reached.
#define CNTR_OutMode_HighToLow 0x8 // Pin OUT_N toggles from high to low when the terminal count reached.
// used by CFG_CntrAvailableAPI
#define CNTR_API_CounterConfig 0x1 // DRV_CounterConfig exists
#define CNTR_API_DICounterReset 0x2 // DRV_DICounterReset exists
#define CNTR_API_QCounterAPI 0x4 // DRV_QCounterXXX exists
#endif
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