📄 driver.h
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#define SWLATCH 0 // S/W read latch data
#define INDEXINLATCH 1 // Index-in latch data
#define DI0LATCH 2 // DI0 latch data
#define DI1LATCH 3 // DI1 latch data
#define TIMERLATCH 4 // Timer latch data
#define DI2LATCH 5
#define DI3LATCH 6
/****************************************************************************
define timer base mode for PCL-833
*****************************************************************************/
#define TPOINT1MS 0 // 0.1 ms timer base
#define T1MS 1 // 1 ms timer base
#define T10MS 2 // 10 ms timer base
#define T100MS 3 // 100 ms timer base
#define T1000MS 4 // 1000 ms timer base
/****************************************************************************
define timer base mode for PCL-1784
*****************************************************************************/
#define T50KHZ 0 // 50KHZ timer base
#define T5KHZ 1 // 5KHZ timer base
#define T500HZ 2 // 500HZ timer base
#define T50HZ 3 // 50HZ timer base
#define T5HZ 4 // 5HZ timer base
/****************************************************************************
define counter lock type for PCL-1784
*****************************************************************************/
#define OVERFLOWLOCK 1
#define UNDERFLOWLOCK 2
#define OVERUNDERLOCK 3
/****************************************************************************
define counter indicator type for PCL-1784
*****************************************************************************/
#define OVERCOMPLEVEL 0X1
#define OVERCOMPPULSE 0X2
#define UNDERCOMPLEVEL 0X4
#define UNDERCOMPPULSE 0X8
/****************************************************************************
define clock source for PCL-833
*****************************************************************************/
#define SYS8MHZ 0 // 8 MHZ system clock
#define SYS4MHZ 1 // 4 MHZ system clock
#define SYS2MHZ 2 // 2 MHZ system clock
#define SYS1MHZ 3
/****************************************************************************
define cascade mode for PCL-833
*****************************************************************************/
#define NOCASCADE 0 // 24-bit(no cascade)
#define CASCADE 1 // 48-bit(CH1, CH2 cascade)
//\\\\\\\\\\\\\\\\\\\ V2.0B /////////////////////
// ----------------------------------------------------------------------------
// define parameter for PCI1780
// ----------------------------------------------------------------------------
// define the counter mode register parameter
// CM0~CM1
#define PA_MODE_ACT_HIGH_TC_PULSE 0x0000 // default value
#define PA_MODE_ACT_LOW_TC_PULSE 0x0001
#define PA_MODE_TC_TOGGLE_FROM_LOW 0x0002
#define PA_MODE_TC_TOGGLE_FROM_HIGH 0x0003
// CM2
#define PA_MODE_ENABLE_OUTPUT 0x0004 // default value
#define PA_MODE_DISABLE_OUTPUT 0x0000
// CM3~CM6
#define PA_MODE_COUNT_DOWN 0x0000 // default value
#define PA_MODE_COUNT_UP 0x0008
// CM7
#define PA_MODE_COUNT_RISE_EDGE 0x0000 // default value
#define PA_MODE_COUNT_FALL_EDGE 0x0080
// CM8~CM11
#define PA_MODE_COUNT_SRC_OUT_N_M1 0x0100 // N_M1 means n minus 1
#define PA_MODE_COUNT_SRC_CLK_N 0x0200
#define PA_MODE_COUNT_SRC_CLK_N_M1 0x0300
#define PA_MODE_COUNT_SRC_FOUT_0 0x0400
#define PA_MODE_COUNT_SRC_FOUT_1 0x0500
#define PA_MODE_COUNT_SRC_FOUT_2 0x0600
#define PA_MODE_COUNT_SRC_FOUT_3 0x0700
#define PA_MODE_COUNT_SRC_GATE_N_M1 0x0C00
// CM12~CM13
#define PA_MODE_GATE_SRC_GATE_NO 0x0000 // default value
#define PA_MODE_GATE_SRC_OUT_N_M1 0x1000
#define PA_MODE_GATE_SRC_GATE_N 0x2000
#define PA_MODE_GATE_SRC_GATE_N_M1 0x3000
// CM14~CM15
#define PA_MODE_GATE_POSITIVE 0x0000 // default value
#define PA_MODE_GATE_NEGATIVE 0x4000
// Counter Mode
#define MODE_A 0x0000
#define MODE_B 0x0000
#define MODE_C 0x8000
#define MODE_D 0x0010
#define MODE_E 0x0010
#define MODE_F 0x8010
#define MODE_G 0x0020
#define MODE_H 0x0020
#define MODE_I 0x8020
#define MODE_J 0x0030
#define MODE_K 0x0030
#define MODE_L 0x8030
#define MODE_O 0x8040
#define MODE_R 0x8050
#define MODE_U 0x8060
#define MODE_X 0x8070
// ----------------------------------------------------------------------------
// define the FOUT register parameter
#define PA_FOUT_SRC_EXTER_CLK 0x0000 // default value
#define PA_FOUT_SRC_CLK_N 0x0100
#define PA_FOUT_SRC_FOUT_N_M1 0x0200
#define PA_FOUT_SRC_CLK_10MHZ 0x0300
#define PA_FOUT_SRC_CLK_1MHZ 0x0400
#define PA_FOUT_SRC_CLK_100KHZ 0x0500
#define PA_FOUT_SRC_CLK_10KHZ 0x0600
#define PA_FOUT_SRC_CLK_1KHZ 0x0700
// PCI1780 parameters defined
///////////////////// V2.0B ///////////////////
/****************************************************************************
define event type for interrupt and DMA transfer
*****************************************************************************/
#define ADS_EVT_INTERRUPT 0x1 // interrupt
#define ADS_EVT_BUFCHANGE 0x2 // buffer change
#define ADS_EVT_TERMINATED 0x4 // termination
#define ADS_EVT_OVERRUN 0x8 // overrun
#define ADS_EVT_WATCHDOG 0x10 // watchdog actived
#define ADS_EVT_CHGSTATE 0x20 // change state event
#define ADS_EVT_ALARM 0x40 // alarm event
#define ADS_EVT_PORT0 0x80 // port 0 event
#define ADS_EVT_PORT1 0x100 // port 1 event
#define ADS_EVT_PATTERNMATCH 0x200 // Pattern Match for DI
#define ADS_EVT_COUNTER 0x201 // Persudo event for COUNTERMATCH and COUNTEROVERFLOW
#define ADS_EVT_COUNTERMATCH 0x202 // Counter Match setting NO. for DI
#define ADS_EVT_COUNTEROVERFLOW 0x203 // Counter Overflow for DI
#define ADS_EVT_STATUSCHANGE 0x204 // Status Change for DI
#define ADS_EVT_FILTER 0x205 // Filter Event
//\\\\\\\\\\\\\\\\\\\\\2.2////////////////////////
#define ADS_EVT_WATCHDOG_OVERRUN 0x206 // Watchdong over run Event
//Modified by Ann.He
#ifdef _WIN32_WCE
#define ADS_EVT_3724INTERRUPT 0x300 // for PCM-3724 port 2 int
#endif
//end
#define ADS_EVT_DEVREMOVED 0x400 // for USB device
//\\\\\\\\\\\\\\\\\\\ V2.0B /////////////////////
// Moved to Event.H
/*
#define ADS_EVT_INTERRUPT_DI0 0x300 // interrupt from DI0
#define ADS_EVT_INTERRUPT_DI1 0x301 // interrupt from DI1
#define ADS_EVT_INTERRUPT_DI2 0x302 // interrupt from DI2
#define ADS_EVT_INTERRUPT_DI3 0x303 // interrupt from DI3
#define ADS_EVT_INTERRUPT_DI4 0x304 // interrupt from DI4
#define ADS_EVT_INTERRUPT_DI5 0x305 // interrupt from DI5
#define ADS_EVT_INTERRUPT_DI6 0x306 // interrupt from DI6
#define ADS_EVT_INTERRUPT_DI7 0x307 // interrupt from DI7
*/
///////////////////// V2.0B ///////////////////////
/****************************************************************************
define event name by device number
*****************************************************************************/
#define ADS_EVT_INTERRUPT_NAME "ADS_EVT_INTERRUPT"
#define ADS_EVT_PORT0_NAME "ADS_EVT_PORT0"
#define ADS_EVT_PORT1_NAME "ADS_EVT_PORT1"
#define ADS_EVT_BUFCHANGE_NAME "ADS_EVT_BUFCHANGE"
#define ADS_EVT_TERMINATED_NAME "ADS_EVT_TERMINATED"
#define ADS_EVT_OVERRUN_NAME "ADS_EVT_OVERRUN"
#define ADS_EVT_WATCHDOG_NAME "ADS_EVT_WATCHDOG"
#define ADS_EVT_CHGSTATE_NAME "ADS_EVT_CHGSTATE"
#define ADS_EVT_ALARM_NAME "ADS_EVT_ALARM"
#define ADS_EVT_PATTERNMATCH_NAME "ADS_EVT_PATTERNMATCH"
#define ADS_EVT_COUNTERMATCH_NAME "ADS_EVT_COUNTERMATCH"
#define ADS_EVT_COUNTEROVERFLOW_NAME "ADS_EVT_COUNTEROVERFLOW"
#define ADS_EVT_STATUSCHANGE_NAME "ADS_EVT_STATUSCHANGE"
//\\\\\\\\\\\\\\\\\\\\\2.2////////////////////////
#define ADS_EVT_WATCHDOG_OVERRUN_NAME "ADS_EVT_WATCHDOG_OVERRUN" // Watchdong
#define ADS_EVT_DEVREMOVED_NAME "ADS_EVT_DEVREMOVED" // for USB device
//\\\\\\\\\\\\\\\\\\\ V2.0B /////////////////////
// Moved to Event.H
/*
#define ADS_EVT_INTERRUPT_DI0_NAME "ADS_EVT_INTERRUPT_DI0"
#define ADS_EVT_INTERRUPT_DI1_NAME "ADS_EVT_INTERRUPT_DI1"
#define ADS_EVT_INTERRUPT_DI2_NAME "ADS_EVT_INTERRUPT_DI2"
#define ADS_EVT_INTERRUPT_DI3_NAME "ADS_EVT_INTERRUPT_DI3"
#define ADS_EVT_INTERRUPT_DI4_NAME "ADS_EVT_INTERRUPT_DI4"
#define ADS_EVT_INTERRUPT_DI5_NAME "ADS_EVT_INTERRUPT_DI5"
#define ADS_EVT_INTERRUPT_DI6_NAME "ADS_EVT_INTERRUPT_DI6"
#define ADS_EVT_INTERRUPT_DI7_NAME "ADS_EVT_INTERRUPT_DI7"
*/
///////////////////// V2.0B ///////////////////////
/****************************************************************************
define FIFO size
*****************************************************************************/
#define FIFO_SIZE 512 // 1K FIFO size (512* 2byte/each data)
#define FIFO_SIZE4 2048 // 4K FIFO size (2048* 2byte/each data)
/****************************************************************************
Function ID Definition
*****************************************************************************/
#define FID_DeviceOpen 0
#define FID_DeviceClose 1
#define FID_DeviceGetFeatures 2
#define FID_AIConfig 3
#define FID_AIGetConfig 4
#define FID_AIBinaryIn 5
#define FID_AIScale 6
#define FID_AIVoltageIn 7
#define FID_AIVoltageInExp 8
#define FID_MAIConfig 9
#define FID_MAIBinaryIn 10
#define FID_MAIVoltageIn 11
#define FID_MAIVoltageInExp 12
#define FID_TCMuxRead 13
#define FID_AOConfig 14
#define FID_AOBinaryOut 15
#define FID_AOVoltageOut 16
#define FID_AOScale 17
#define FID_DioSetPortMode 18
#define FID_DioGetConfig 19
#define FID_DioReadPortByte 20
#define FID_DioWritePortByte 21
#define FID_DioReadBit 22
#define FID_DioWriteBit 23
#define FID_DioGetCurrentDOByte 24
#define FID_DioGetCurrentDOBit 25
#define FID_WritePortByte 26
#define FID_WritePortWord 27
#define FID_ReadPortByte 28
#define FID_ReadPortWord 29
#define FID_CounterEventStart 30
#define FID_CounterEventRead 31
#define FID_CounterFreqStart 32
#define FID_CounterFreqRead 33
#define FID_CounterPulseStart 34
#define FID_CounterReset 35
#define FID_QCounterConfig 36
#define FID_QCounterConfigSys 37
#define FID_QCounterStart 38
#define FID_QCounterRead 39
#define FID_AlarmConfig 40
#define FID_AlarmEnable 41
#define FID_AlarmCheck 42
#define FID_AlarmReset 43
#define FID_COMOpen 44
#define FID_COMConfig 45
#define FID_COMClose 46
#define FID_COMRead 47
#define FID_COMWrite232 48
#define FID_COMWrite485 49
#define FID_COMWrite85 50
#define FID_COMInit 51
#define FID_COMLock 52
#define FID_COMUnlock 53
#define FID_WDTEnable 54
#define FID_WDTRefresh 55
#define FID_WDTReset 56
#define FID_FAIIntStart 57
#define FID_FAIIntScanStart 58
#define FID_FAIDmaStart 59
#define FID_FAIDmaScanStart 60
#define FID_FAIDualDmaStart 61
#define FID_FAIDualDmaScanStart 62
#define FID_FAICheck 63
#define FID_FAITransfer 64
#define FID_FAIStop 65
#define FID_FAIWatchdogConfig 66
#define FID_FAIIntWatchdogStart 67
#define FID_FAIDmaWatchdogStart 68
#define FID_FAIWatchdogCheck 69
#define FID_FAOIntStart 70
#define FID_FAODmaStart 71
#define FID_FAOScale 72
#define FID_FAOLoad 73
#define FID_FAOCheck 74
#define FID_FAOStop 75
#define FID_ClearOverrun 76
#define FID_EnableEvent 77
#define FID_CheckEvent 78
#define FID_AllocateDMABuffer 79
#define FID_FreeDMABuffer 80
#define FID_EnableCANEvent 81
#define FID_GetCANEventData 82
#define FID_TimerCountSetting 83
#define FID_CounterPWMSetting 84
#define FID_CounterPWMEnable 85
#define FID_DioTimerSetting 86
#define FID_EnableEventEx 87
#define FID_DICounterReset 88
#define FID_FDITransfer 89
#define FID_EnableSyncAO 90
#define FID_WriteSyncAO 91
#define FID_AOCurrentOut 92
#define FID_ADAMCounterSetHWConfig 93
#define FID_ADAMCounterGetHWConfig 94
#define FID_ADAMAISetHWConfig 95
#define FID_ADAMAIGetHWConfig 96
#define FID_ADAMAOSetHWConfig 97
#define FID_ADAMAOGetHWConfig 98
#define FID_GetFIFOSize 99
#define FID_PWMStartRead 100
#define FID_FAIDmaExStart 101
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