📄 os_cpu_a.exp
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;********************************************************************************************************
;* uC/OS-II
;* The Real-Time Kernel
;*
;* (c) Copyright 2003, Micrium, Inc., Weston, FL
;* All Rights Reserved
;*
;* H8/300 Specific code
;*
;* File : OS_CPU_A.SRC
;* By : Jean J. Labrosse
;********************************************************************************************************
;;; caseon ; Make identifier's case significant
;********************************************************************************************************
; Cross references
;********************************************************************************************************
;
.EXPORT _OSStartHighRdy ; Public functions
.EXPORT _OSCtxSw
.EXPORT _OSIntCtxSw
.EXPORT _OSTickISR
.EXPORT _OSCPUSaveSR
.EXPORT _OSCPURestoreSR
.EXPORT _OSIntCOMM
.IMPORT _OSIntEnter ; External functions
.IMPORT _OSIntExit
.IMPORT _OSTimeTick
.IMPORT _OSTaskSwHook
.IMPORT _INT_SCI
.IMPORT _OSTCBCur ; External variables (uC/OS-II)
.IMPORT _OSTCBHighRdy
.IMPORT _OSPrioCur
.IMPORT _OSPrioHighRdy
.IMPORT _OSIntNesting
.IMPORT _OSRunning
.IMPORT _Tmr_ISRClr ; Function to clear the timer interrupt
;********************************************************************************************************
; Equates
;********************************************************************************************************
;********************************************************************************************************
; MACROS
;
; Note(s): 1) Save 16-bit registers in case they were used in the application code.
;********************************************************************************************************
;
; .MACRO PUSHALL
; PUSH R0
; PUSH R1
; PUSH R2
; PUSH R3
; PUSH R4
; PUSH R5
; PUSH R6
; .ENDM
; .MACRO POPALL
; POP R6
; POP R5
; POP R4
; POP R3
; POP R2
; POP R1
; POP R0
; .ENDM
;/*$PAGE*/
;********************************************************************************************************
; OSCPUSaveSR() for OS_CRITICAL_METHOD #3
;
; Description : This functions implements the OS_CRITICAL_METHOD #3 function to preserve the state of the
; interrupt disable flag in order to be able to restore it later.
;
; Arguments : none
;
; Returns : It is assumed that the return value is placed in the R0L register as expected by the
; compiler.
;********************************************************************************************************
.SECTION P,CODE,ALIGN=2
_OSCPUSaveSR:
STC CCR, R0L ; Save CCR in R0L
ORC #H'80, CCR ; Disable interrupts
RTS
;********************************************************************************************************
; OSCPURestoreSR() for OS_CRITICAL_METHOD #3
;
; Description : This functions implements the OS_CRITICAL_METHOD #function to restore the state of the
; interrupt flag.
;
; Arguments : os_cpu_sr is the contents of the CCR to restore. It is assumed that this 'argument' is
; passed in the R0L register of the CPU by the compiler.
;
; Returns : None
;********************************************************************************************************
_OSCPURestoreSR:
LDC R0L, CCR
RTS
;*********************************************************************************************************
; START MULTITASKING
;
; Description : This function is called by OSStart() to start the highest priority task that was created
; by your application before calling OSStart().
;
; Arguments : none
;
; Note(s) : 1) The stack frame is assumed to look as follows:
;
;
; OSTCBHighRdy->OSTCBStkPtr + 0 ----> R6 LOW MEMORY
; + 2 R5
; + 4 R4
; + 6 R3
; + 8 R2
; + 10 R1
; + 12 R0
; + 14 CCR (Initial value of 0x0000)
; + 16 task (address of 'task')
; + 18 task (address of 'task')
; + 20 p_arg (contents of 'p_arg')
; HIGH MEMORY
;
; 2) OSStartHighRdy() MUST:
; a) Call OSTaskSwHook() then,
; b) Set OSRunning to TRUE,
; c) Switch to the highest priority task.
;*********************************************************************************************************
_OSStartHighRdy:
JSR @_OSTaskSwHook ; Execute task switch hook
;
MOV.B #1, R6L ; Set OSRunning to TRUE
MOV.B R6L, @_OSRunning
;
MOV.W @_OSTCBHighRdy, R0 ; SP = OSTCBHighRdy->OSTCBStkPtr
MOV.W R0, @_OSTCBCur
MOV.W @R0, SP
;
; POPALL ; Restore task registers
POP R6
POP R5
POP R4
POP R3
POP R2
POP R1
POP R0
;
RTE
;/*$PAGE*/
;*********************************************************************************************************
; TASK LEVEL CONTEXT SWITCH
;
; Description : This function is called when a task makes a higher priority task ready-to-run.
;
; Arguments : none
;
; Note(s) : 1) Upon entry,
; OSTCBCur points to the OS_TCB of the task to suspend
; OSTCBHighRdy points to the OS_TCB of the task to resume
;
; 2) The stack frame of the task to suspend looks as follows. This was caused by the
; execution of a TRAPA #0 instruction (the registers for the task to suspend need to be
; saved):
;
; LOW MEMORY
; SP + 0 ----> PC of task (Lower 16-bits only)
; HIGH MEMORY
;
; 3) The stack frame of the task to resume looks as follows:
;
; LOW MEMORY
; OSTCBHighRdy->OSTCBStkPtr + 0 ----> R6
; + 2 R5
; + 4 R4
; + 6 R3
; + 8 R2
; + 10 R1
; + 12 R0
; + 14 CCR
; + 16 PC of task
; HIGH MEMORY
;
; 4) OSCtxSw() is invoked by a JSR instead of a TRAP. Because of this, the CCR is NOT
; placed onto the stack immediately following the return address. The CCR is placed
; on the stack 'manually' by first pushing R0 (to reserve the memory for the CCR) and
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