📄 jedec_probe.c
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ERASEINFO(0x04000,1) } }, { .mfr_id = MANUFACTURER_TOSHIBA, .dev_id = TC58FVB160, .name = "Toshiba TC58FVB160", .uaddr = { [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ [1] = MTD_UADDR_0x0555_0x02AA /* x16 */ }, .DevSize = SIZE_2MiB, .CmdSet = P_ID_AMD_STD, .NumEraseRegions= 4, .regions = { ERASEINFO(0x04000,1), ERASEINFO(0x02000,2), ERASEINFO(0x08000,1), ERASEINFO(0x10000,31) } }, { .mfr_id = MANUFACTURER_TOSHIBA, .dev_id = TC58FVB321, .name = "Toshiba TC58FVB321", .uaddr = { [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ [1] = MTD_UADDR_0x0555_0x02AA /* x16 */ }, .DevSize = SIZE_4MiB, .CmdSet = P_ID_AMD_STD, .NumEraseRegions= 2, .regions = { ERASEINFO(0x02000,8), ERASEINFO(0x10000,63) } }, { .mfr_id = MANUFACTURER_TOSHIBA, .dev_id = TC58FVT321, .name = "Toshiba TC58FVT321", .uaddr = { [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ [1] = MTD_UADDR_0x0555_0x02AA /* x16 */ }, .DevSize = SIZE_4MiB, .CmdSet = P_ID_AMD_STD, .NumEraseRegions= 2, .regions = { ERASEINFO(0x10000,63), ERASEINFO(0x02000,8) } }, { .mfr_id = MANUFACTURER_TOSHIBA, .dev_id = TC58FVB641, .name = "Toshiba TC58FVB641", .uaddr = { [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ }, .DevSize = SIZE_8MiB, .CmdSet = P_ID_AMD_STD, .NumEraseRegions= 2, .regions = { ERASEINFO(0x02000,8), ERASEINFO(0x10000,127) } }, { .mfr_id = MANUFACTURER_TOSHIBA, .dev_id = TC58FVT641, .name = "Toshiba TC58FVT641", .uaddr = { [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ }, .DevSize = SIZE_8MiB, .CmdSet = P_ID_AMD_STD, .NumEraseRegions= 2, .regions = { ERASEINFO(0x10000,127), ERASEINFO(0x02000,8) } }, { .mfr_id = MANUFACTURER_WINBOND, .dev_id = W49V002A, .name = "Winbond W49V002A", .uaddr = { [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ }, .DevSize = SIZE_256KiB, .CmdSet = P_ID_AMD_STD, .NumEraseRegions= 4, .regions = { ERASEINFO(0x10000, 3), ERASEINFO(0x08000, 1), ERASEINFO(0x02000, 2), ERASEINFO(0x04000, 1), } }};static int cfi_jedec_setup(struct cfi_private *p_cfi, int index);static int jedec_probe_chip(struct map_info *map, __u32 base, unsigned long *chip_map, struct cfi_private *cfi);static struct mtd_info *jedec_probe(struct map_info *map);static inline u32 jedec_read_mfr(struct map_info *map, __u32 base, struct cfi_private *cfi){ map_word result; unsigned long mask; u32 ofs = cfi_build_cmd_addr(0, cfi_interleave(cfi), cfi->device_type); mask = (1 << (cfi->device_type * 8)) -1; result = map_read(map, base + ofs); return result.x[0] & mask;}static inline u32 jedec_read_id(struct map_info *map, __u32 base, struct cfi_private *cfi){ map_word result; unsigned long mask; u32 ofs = cfi_build_cmd_addr(1, cfi_interleave(cfi), cfi->device_type); mask = (1 << (cfi->device_type * 8)) -1; result = map_read(map, base + ofs); return result.x[0] & mask;}static inline void jedec_reset(u32 base, struct map_info *map, struct cfi_private *cfi){ /* Reset */ /* after checking the datasheets for SST, MACRONIX and ATMEL * (oh and incidentaly the jedec spec - 3.5.3.3) the reset * sequence is *supposed* to be 0xaa at 0x5555, 0x55 at * 0x2aaa, 0xF0 at 0x5555 this will not affect the AMD chips * as they will ignore the writes and dont care what address * the F0 is written to */ if(cfi->addr_unlock1) { DEBUG( MTD_DEBUG_LEVEL3, "reset unlock called %x %x \n", cfi->addr_unlock1,cfi->addr_unlock2); cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL); } cfi_send_gen_cmd(0xF0, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); /* Some misdesigned intel chips do not respond for 0xF0 for a reset, * so ensure we're in read mode. Send both the Intel and the AMD command * for this. Intel uses 0xff for this, AMD uses 0xff for NOP, so * this should be safe. */ cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); /* FIXME - should have reset delay before continuing */}static inline __u8 finfo_uaddr(const struct amd_flash_info *finfo, int device_type){ int uaddr_idx; __u8 uaddr = MTD_UADDR_NOT_SUPPORTED; switch ( device_type ) { case CFI_DEVICETYPE_X8: uaddr_idx = 0; break; case CFI_DEVICETYPE_X16: uaddr_idx = 1; break; case CFI_DEVICETYPE_X32: uaddr_idx = 2; break; default: printk(KERN_NOTICE "MTD: %s(): unknown device_type %d\n", __func__, device_type); goto uaddr_done; } uaddr = finfo->uaddr[uaddr_idx]; if (uaddr != MTD_UADDR_NOT_SUPPORTED ) { /* ASSERT("The unlock addresses for non-8-bit mode are bollocks. We don't really need an array."); */ uaddr = finfo->uaddr[0]; } uaddr_done: return uaddr;}static int cfi_jedec_setup(struct cfi_private *p_cfi, int index){ int i,num_erase_regions; __u8 uaddr; printk("Found: %s\n",jedec_table[index].name); num_erase_regions = jedec_table[index].NumEraseRegions; p_cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL); if (!p_cfi->cfiq) { //xx printk(KERN_WARNING "%s: kmalloc failed for CFI ident structure\n", map->name); return 0; } memset(p_cfi->cfiq,0,sizeof(struct cfi_ident)); p_cfi->cfiq->P_ID = jedec_table[index].CmdSet; p_cfi->cfiq->NumEraseRegions = jedec_table[index].NumEraseRegions; p_cfi->cfiq->DevSize = jedec_table[index].DevSize; p_cfi->cfi_mode = CFI_MODE_JEDEC; for (i=0; i<num_erase_regions; i++){ p_cfi->cfiq->EraseRegionInfo[i] = jedec_table[index].regions[i]; } p_cfi->cmdset_priv = NULL; /* This may be redundant for some cases, but it doesn't hurt */ p_cfi->mfr = jedec_table[index].mfr_id; p_cfi->id = jedec_table[index].dev_id; uaddr = finfo_uaddr(&jedec_table[index], p_cfi->device_type); if ( uaddr == MTD_UADDR_NOT_SUPPORTED ) { kfree( p_cfi->cfiq ); return 0; } p_cfi->addr_unlock1 = unlock_addrs[uaddr].addr1; p_cfi->addr_unlock2 = unlock_addrs[uaddr].addr2; return 1; /* ok */}/* * There is a BIG problem properly ID'ing the JEDEC devic and guaranteeing * the mapped address, unlock addresses, and proper chip ID. This function * attempts to minimize errors. It is doubtfull that this probe will ever * be perfect - consequently there should be some module parameters that * could be manually specified to force the chip info. */static inline int jedec_match( __u32 base, struct map_info *map, struct cfi_private *cfi, const struct amd_flash_info *finfo ){ int rc = 0; /* failure until all tests pass */ u32 mfr, id; __u8 uaddr; /* * The IDs must match. For X16 and X32 devices operating in * a lower width ( X8 or X16 ), the device ID's are usually just * the lower byte(s) of the larger device ID for wider mode. If * a part is found that doesn't fit this assumption (device id for * smaller width mode is completely unrealated to full-width mode) * then the jedec_table[] will have to be augmented with the IDs * for different widths. */ switch (cfi->device_type) { case CFI_DEVICETYPE_X8: mfr = (__u8)finfo->mfr_id; id = (__u8)finfo->dev_id; /* bjd: it seems that if we do this, we can end up * detecting 16bit flashes as an 8bit device, even though * there aren't. */ if (finfo->dev_id > 0xff) { DEBUG( MTD_DEBUG_LEVEL3, "%s(): ID is not 8bit\n", __func__); goto match_done; } break; case CFI_DEVICETYPE_X16: mfr = (__u16)finfo->mfr_id; id = (__u16)finfo->dev_id; break; case CFI_DEVICETYPE_X32: mfr = (__u16)finfo->mfr_id; id = (__u32)finfo->dev_id; break; default: printk(KERN_WARNING "MTD %s(): Unsupported device type %d\n", __func__, cfi->device_type); goto match_done; } if ( cfi->mfr != mfr || cfi->id != id ) { goto match_done; } /* the part size must fit in the memory window */ DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): Check fit 0x%.8x + 0x%.8x = 0x%.8x\n", __func__, base, 1 << finfo->DevSize, base + (1 << finfo->DevSize) ); if ( base + cfi_interleave(cfi) * ( 1 << finfo->DevSize ) > map->size ) { DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): 0x%.4x 0x%.4x %dKiB doesn't fit\n", __func__, finfo->mfr_id, finfo->dev_id, 1 << finfo->DevSize ); goto match_done; } uaddr = finfo_uaddr(finfo, cfi->device_type); if ( uaddr == MTD_UADDR_NOT_SUPPORTED ) { goto match_done; } DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n", __func__, cfi->addr_unlock1, cfi->addr_unlock2 ); if ( MTD_UADDR_UNNECESSARY != uaddr && MTD_UADDR_DONT_CARE != uaddr && ( unlock_addrs[uaddr].addr1 != cfi->addr_unlock1 || unlock_addrs[uaddr].addr2 != cfi->addr_unlock2 ) ) { DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): 0x%.4x 0x%.4x did not match\n", __func__, unlock_addrs[uaddr].addr1, unlock_addrs[uaddr].addr2); goto match_done; } /* * Make sure the ID's dissappear when the device is taken out of * ID mode. The only time this should fail when it should succeed * is when the ID's are written as data to the same * addresses. For this rare and unfortunate case the chip * cannot be probed correctly. * FIXME - write a driver that takes all of the chip info as * module parameters, doesn't probe but forces a load. */ DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check ID's disappear when not in ID mode\n", __func__ ); jedec_reset( base, map, cfi ); mfr = jedec_read_mfr( map, base, cfi ); id = jedec_read_id( map, base, cfi ); if ( mfr == cfi->mfr && id == cfi->id ) { DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): ID 0x%.2x:0x%.2x did not change after reset:\n" "You might need to manually specify JEDEC parameters.\n", __func__, cfi->mfr, cfi->id ); goto match_done; } /* all tests passed - mark as success */ rc = 1; /* * Put the device back in ID mode - only need to do this if we * were truly frobbing a real device. */ DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): return to ID mode\n", __func__ ); if(cfi->addr_unlock1) { cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL); } cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); /* FIXME - should have a delay before continuing */ match_done: return rc;}static int jedec_probe_chip(struct map_info *map, __u32 base, unsigned long *chip_map, struct cfi_private *cfi){ int i; enum uaddr uaddr_idx = MTD_UADDR_NOT_SUPPORTED; u32 probe_offset1, probe_offset2; retry: if (!cfi->numchips) { uaddr_idx++; if (MTD_UADDR_UNNECESSARY == uaddr_idx) return 0; cfi->addr_unlock1 = unlock_addrs[uaddr_idx].addr1; cfi->addr_unlock2 = unlock_addrs[uaddr_idx].addr2; } /* Make certain we aren't probing past the end of map */ if (base >= map->size) { printk(KERN_NOTICE "Probe at base(0x%08x) past the end of the map(0x%08lx)\n", base, map->size -1); return 0; } /* Ensure the unlock addresses we try stay inside the map */ probe_offset1 = cfi_build_cmd_addr( cfi->addr_unlock1, cfi_interleave(cfi), cfi->device_type); probe_offset2 = cfi_build_cmd_addr( cfi->addr_unlock1, cfi_interleave(cfi), cfi->device_type); if ( ((base + probe_offset1 + map_bankwidth(map)) >= map->size) || ((base + probe_offset2 + map_bankwidth(map)) >= map->size)) { goto retry; } /* Reset */ jedec_reset(base, map, cfi); /* Autoselect Mode */ if(cfi->addr_unlock1) { cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL); } cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); /* FIXME - should have a delay before continuing */ if (!cfi->numchips) { /* This is the first time we're called. Set up the CFI stuff accordingly and return */ cfi->mfr = jedec_read_mfr(map, base, cfi); cfi->id = jedec_read_id(map, base, cfi); DEBUG(MTD_DEBUG_LEVEL3, "Search for id:(%02x %02x) interleave(%d) type(%d)\n", cfi->mfr, cfi->id, cfi_interleave(cfi), cfi->device_type); for (i=0; i<sizeof(jedec_table)/sizeof(jedec_table[0]); i++) { if ( jedec_match( base, map, cfi, &jedec_table[i] ) ) { DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n", __func__, cfi->mfr, cfi->id, cfi->addr_unlock1, cfi->addr_unlock2 ); if (!cfi_jedec_setup(cfi, i)) return 0; goto ok_out; } } goto retry; } else { __u16 mfr; __u16 id; /* Make sure it is a chip of the same manufacturer and id */ mfr = jedec_read_mfr(map, base, cfi); id = jedec_read_id(map, base, cfi); if ((mfr != cfi->mfr) || (id != cfi->id)) { printk(KERN_DEBUG "%s: Found different chip or no chip at all (mfr 0x%x, id 0x%x) at 0x%x\n", map->name, mfr, id, base); jedec_reset(base, map, cfi); return 0; } } /* Check each previous chip locations to see if it's an alias */ for (i=0; i < (base >> cfi->chipshift); i++) { unsigned long start; if(!test_bit(i, chip_map)) { continue; /* Skip location; no valid chip at this address */ } start = i << cfi->chipshift; if (jedec_read_mfr(map, start, cfi) == cfi->mfr && jedec_read_id(map, start, cfi) == cfi->id) { /* Eep. This chip also looks like it's in autoselect mode. Is it an alias for the new one? */ jedec_reset(start, map, cfi); /* If the device IDs go away, it's an alias */ if (jedec_read_mfr(map, base, cfi) != cfi->mfr || jedec_read_id(map, base, cfi) != cfi->id) { printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n", map->name, base, start); return 0; } /* Yes, it's actually got the device IDs as data. Most * unfortunate. Stick the new chip in read mode * too and if it's the same, assume it's an alias. */ /* FIXME: Use other modes to do a proper check */ jedec_reset(base, map, cfi); if (jedec_read_mfr(map, base, cfi) == cfi->mfr && jedec_read_id(map, base, cfi) == cfi->id) { printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n", map->name, base, start); return 0; } } } /* OK, if we got to here, then none of the previous chips appear to be aliases for the current one. */ set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */ cfi->numchips++; ok_out: /* Put it back into Read Mode */ jedec_reset(base, map, cfi); printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n", map->name, cfi_interleave(cfi), cfi->device_type*8, base, map->bankwidth*8); return 1;}static struct chip_probe jedec_chip_probe = { .name = "JEDEC", .probe_chip = jedec_probe_chip};static struct mtd_info *jedec_probe(struct map_info *map){ /* * Just use the generic probe stuff to call our CFI-specific * chip_probe routine in all the possible permutations, etc. */ return mtd_do_chip_probe(map, &jedec_chip_probe);}static struct mtd_chip_driver jedec_chipdrv = { .probe = jedec_probe, .name = "jedec_probe", .module = THIS_MODULE};static int __init jedec_probe_init(void){ register_mtd_chip_driver(&jedec_chipdrv); return 0;}static void __exit jedec_probe_exit(void){ unregister_mtd_chip_driver(&jedec_chipdrv);}module_init(jedec_probe_init);module_exit(jedec_probe_exit);MODULE_LICENSE("GPL");MODULE_AUTHOR("Erwin Authried <eauth@softsys.co.at> et al.");MODULE_DESCRIPTION("Probe code for JEDEC-compliant flash chips");
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