📄 gpio.lst
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##############################################################################
# #
# IAR ARM ANSI C/C++ Compiler V4.30A/W32 KICKSTART 14/Dec/2005 14:41:44 #
# Copyright 1999-2005 IAR Systems. All rights reserved. #
# #
# Cpu mode = interwork #
# Endian = little #
# Stack alignment = 4 #
# Source file = D:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR71x_IA #
# R\Library\gpio.c #
# Command line = D:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR71x_IA #
# R\Library\gpio.c -D _NDEBUG -D STR71X_IAR -lC #
# D:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR71x_IA #
# R\binary\List\ --diag_suppress pe191,pa082 -o #
# D:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR71x_IA #
# R\binary\Obj\ -s9 --no_clustering --cpu_mode thumb #
# --endian little --cpu ARM7TDMI --stack_align 4 #
# --interwork -e --require_prototypes --fpu None #
# --dlib_config "C:\Program Files\IAR #
# Systems\Embedded Workbench 4.0 #
# Kickstart\arm\LIB\dl4tptinl8n.h" -I #
# D:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR71x_IA #
# R\ -I D:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR #
# 71x_IAR\library\include\ -I #
# D:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR71x_IA #
# R\..\common\include\ -I D:\board\FreeRTOSV3.2.3\Free #
# RTOS\Demo\ARM7_STR71x_IAR\..\..\source\include\ -I #
# "C:\Program Files\IAR Systems\Embedded Workbench #
# 4.0 Kickstart\arm\INC\" #
# List file = D:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR71x_IA #
# R\binary\List\gpio.lst #
# Object file = D:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR71x_IA #
# R\binary\Obj\gpio.r79 #
# #
# #
##############################################################################
D:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR71x_IAR\Library\gpio.c
1 /******************** (C) COPYRIGHT 2003 STMicroelectronics ********************
2 * File Name : gpio.c
3 * Author : MCD Application Team
4 * Date First Issued : 06/08/2003
5 * Description : This file provides all the GPIO software functions
6 ********************************************************************************
7 * History:
8 * 30/11/2004 : V2.0
9 * 14/07/2004 : V1.3
10 * 01/01/2004 : V1.2
11 *******************************************************************************
12 THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
13 CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
14 AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
15 OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
16 OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
17 CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 *******************************************************************************/
19
20 #include "gpio.h"
21
22 /*******************************************************************************
23 * Function Name : GPIO_Config
24 * Description : Configure the GPIO port pins
25 * Input 1 : GPIOx (x can be 0,1 or 2) the desired port
26 * Input 2 : Port_Pins : pins placements
27 * Input 3 : Pins Mode
28 * Output : None
29 * Return : None
30 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
31 void GPIO_Config (GPIO_TypeDef *GPIOx, u16 Port_Pins, GpioPinMode_TypeDef GPIO_Mode)
32 {
\ GPIO_Config:
\ 00000000 10B4 PUSH {R4}
33 switch (GPIO_Mode)
\ 00000002 CB43 MVN R3,R1
\ 00000004 072A CMP R2,#+0x7
\ 00000006 42D8 BHI ??GPIO_Config_1
\ 00000008 01A4 ADR R4,??GPIO_Config_0
\ 0000000A A45C LDRB R4,[R4, R2]
\ 0000000C A744 ADD PC,R4
\ 0000000E C046 NOP
\ ??GPIO_Config_0:
\ 00000010 081C2236 DC8 +0x8,+0x1C,+0x22,+0x36
\ 00000014 42505E6C DC8 +0x42,+0x50,+0x5E,+0x6C
34 {
35 case GPIO_HI_AIN_TRI:
36 GPIOx->PC0&=~Port_Pins;
\ ??GPIO_Config_2:
\ 00000018 0188 LDRH R1,[R0, #+0]
\ 0000001A 1940 AND R1,R3
\ ??GPIO_Config_3:
\ 0000001C 0180 STRH R1,[R0, #+0]
37 GPIOx->PC1&=~Port_Pins;
\ 0000001E 8188 LDRH R1,[R0, #+0x4]
\ 00000020 1940 AND R1,R3
\ ??GPIO_Config_4:
\ 00000022 8180 STRH R1,[R0, #+0x4]
38 GPIOx->PC2&=~Port_Pins;
\ 00000024 0189 LDRH R1,[R0, #+0x8]
\ 00000026 0B40 AND R3,R1
\ 00000028 0381 STRH R3,[R0, #+0x8]
\ 0000002A 30E0 B ??GPIO_Config_1
39 break;
40
41 case GPIO_IN_TRI_TTL:
42 GPIOx->PC0|=Port_Pins;
\ ??GPIO_Config_5:
\ 0000002C 0288 LDRH R2,[R0, #+0]
\ 0000002E 1143 ORR R1,R2
\ 00000030 F4E7 B ??GPIO_Config_3
43 GPIOx->PC1&=~Port_Pins;
44 GPIOx->PC2&=~Port_Pins;
45 break;
46
47 case GPIO_IN_TRI_CMOS:
48 GPIOx->PC0&=~Port_Pins;
\ ??GPIO_Config_6:
\ 00000032 0288 LDRH R2,[R0, #+0]
\ 00000034 1A40 AND R2,R3
\ 00000036 0280 STRH R2,[R0, #+0]
49 GPIOx->PC1|=Port_Pins;
\ 00000038 8288 LDRH R2,[R0, #+0x4]
\ 0000003A 1143 ORR R1,R2
\ 0000003C 8180 STRH R1,[R0, #+0x4]
50 GPIOx->PC2&=~Port_Pins;
\ 0000003E 0189 LDRH R1,[R0, #+0x8]
\ 00000040 0B40 AND R3,R1
\ 00000042 0381 STRH R3,[R0, #+0x8]
\ 00000044 23E0 B ??GPIO_Config_1
51 break;
52
53 case GPIO_IPUPD_WP:
54 GPIOx->PC0|=Port_Pins;
\ ??GPIO_Config_7:
\ 00000046 0288 LDRH R2,[R0, #+0]
\ 00000048 0A43 ORR R2,R1
\ 0000004A 0280 STRH R2,[R0, #+0]
55 GPIOx->PC1|=Port_Pins;
\ 0000004C 8288 LDRH R2,[R0, #+0x4]
\ 0000004E 1143 ORR R1,R2
\ 00000050 E7E7 B ??GPIO_Config_4
56 GPIOx->PC2&=~Port_Pins;
57 break;
58
59 case GPIO_OUT_OD:
60 GPIOx->PC0&=~Port_Pins;
\ ??GPIO_Config_8:
\ 00000052 0288 LDRH R2,[R0, #+0]
\ 00000054 1A40 AND R2,R3
\ 00000056 0280 STRH R2,[R0, #+0]
61 GPIOx->PC1&=~Port_Pins;
\ 00000058 8288 LDRH R2,[R0, #+0x4]
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