📄 cstartup.lst
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###############################################################################
# #
# IAR Systems ARM Assembler V4.30A/W32 14/Dec/2005 14:41:43 #
# Copyright 1999-2005 IAR Systems. All rights reserved. #
# #
# Source file = D:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR71x_IAR\cstartup.s79#
# List file = D:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR71x_IAR\binary\List\cstartup.lst#
# Object file = D:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR71x_IAR\binary\Obj\cstartup.r79#
# Command line = D:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR71x_IAR\cstartup.s79 #
# -OD:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR71x_IAR\binary\Obj\ #
# -s+ -M<> -w+ #
# -LD:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR71x_IAR\binary\List\ #
# -t8 --cpu ARM7TDMI --fpu None #
# -IC:\Program Files\IAR Systems\Embedded Workbench 4.0 Kickstart\arm\INC\ #
# -ID:\board\FreeRTOSV3.2.3\FreeRTOS\Demo\ARM7_STR71x_IAR\..\..\Source\portable\IAR\STR71x\ #
# #
###############################################################################
1 00000000 ;-----------------------------------------------
------------------------------
2 00000000 ; This file contains the startup code used by
the ICCARM C compiler.
3 00000000 ;
4 00000000 ; The modules in this file are included in the
libraries, and may be replaced
5 00000000 ; by any user-defined modules that define the
PUBLIC symbol _program_start or
6 00000000 ; a user defined start symbol.
7 00000000 ; To override the cstartup defined in the
library, simply add your modified
8 00000000 ; version to the workbench project.
9 00000000 ;
10 00000000 ; All code in the modules (except ?RESET) will
be placed in the ICODE segment.
11 00000000 ;
12 00000000 ; $Revision: 1.1 $
13 00000000 ;
14 00000000 ;-----------------------------------------------
------------------------------
15 00000000
16 00000000 ;
17 00000000 ; Naming covention of labels in this file:
18 00000000 ;
19 00000000 ; ?xxx - External labels only accessed from
assembler.
20 00000000 ; __xxx - External labels accessed from or
defined in C.
21 00000000 ; xxx - Labels local to one module (note:
this file contains
22 00000000 ; several modules).
23 00000000 ; main - The starting point of the user
program.
24 00000000 ;
25 00000000
26 00000000 ;-----------------------------------------------
----------------
27 00000000 ; Macros and definitions for the whole
file
28 00000000 ;-----------------------------------------------
----------------
29 00000000
30 00000000
31 00000000 ; --- Standard definitions of mode bits and
interrupt (I & F) flags in PSRs
32 00000000
33 00000000
34 00000000
35 00000010 Mode_USR DEFINE 0x10
36 00000011 Mode_FIQ DEFINE 0x11
37 00000012 Mode_IRQ DEFINE 0x12
38 00000013 Mode_SVC DEFINE 0x13
39 00000017 Mode_ABT DEFINE 0x17
40 0000001B Mode_UNDEF DEFINE 0x1B
41 0000001F Mode_SYS DEFINE 0x1F ; available
on ARM Arch 4 and later
42 00000000
43 00000080 I_Bit DEFINE 0x80 ; when I bit
is set, IRQ is disabled
44 00000040 F_Bit DEFINE 0x40 ; when F bit
is set, FIQ is disabled
45 00000000
46 00000000
47 00000000 ; --- System memory locations
48 00000000
49 20000000 RAM_Base DEFINE 0x20000000
50 20010000 RAM_Limit DEFINE 0x20010000
51 60000000 SRAM_Base DEFINE 0x60000000
52 00000000
53 20010000 SVC_Stack DEFINE RAM_Limit
; 512 byte SVC stack at
54 00000000
; top of memory - used by kernel.
55 2000FE00 IRQ_Stack DEFINE SVC_Stack-512
; followed by IRQ stack
56 2000FC00 USR_Stack DEFINE IRQ_Stack-512
; followed by USR stack. Tasks run in
57 00000000
; system mode but task stacks are allocated
58 00000000
; when the task is created.
59 2000FBF8 FIQ_Stack DEFINE USR_Stack-8
; followed by FIQ stack
60 2000FBF0 ABT_Stack DEFINE FIQ_Stack-8
; followed by ABT stack
61 2000FBE8 UNDEF_Stack DEFINE ABT_Stack-8
; followed by UNDEF stack
62 00000000
63 FFFFF800 EIC_Base_addr DEFINE 0xFFFFF800
; EIC base address
64 00000000 ICR_off_addr DEFINE 0x00
; Interrupt Control register offset
65 00000008 CIPR_off_addr DEFINE 0x08
; Current Interrupt Priority Register
offset
66 00000018 IVR_off_addr DEFINE 0x18
; Interrupt Vector Register offset
67 0000001C FIR_off_addr DEFINE 0x1C
; Fast Interrupt Register offset
68 00000020 IER_off_addr DEFINE 0x20
; Interrupt Enable Register offset
69 00000040 IPR_off_addr DEFINE 0x40
; Interrupt Pending Bit Register offset
70 00000060 SIR0_off_addr DEFINE 0x60
; Source Interrupt Register 0
71 00000000
72 6C000000 EMI_Base_addr DEFINE 0x6C000000
; EMI base address
73 00000000 BCON0_off_addr DEFINE 0x00
; Bank 0 configuration register offset
74 00000004 BCON1_off_addr DEFINE 0x04
; Bank 1 configuration register offset
75 00000008 BCON2_off_addr DEFINE 0x08
; Bank 2 configuration register offset
76 0000000C BCON3_off_addr DEFINE 0x0C
; Bank 3 configuration register offset
77 00000000
78 E0005000 GPIO2_Base_addr DEFINE 0xE0005000
; GPIO2 base address
79 00000000 PC0_off_addr DEFINE 0x00
; Port Configuration Register 0 offset
80 00000004 PC1_off_addr DEFINE 0x04
; Port Configuration Register 1 offset
81 00000008 PC2_off_addr DEFINE 0x08
; Port Configuration Register 2 offset
82 0000000C PD_off_addr DEFINE 0x0C
; Port Data Register offset
83 00000000
84 A0000040 CPM_Base_addr DEFINE 0xA0000040
; CPM Base Address
85 00000010 BOOTCONF_off_addr DEFINE 0x10
; CPM - Boot Configuration Register
86 00000000 FLASH_mask DEFINE 0x0000
; to remap FLASH at 0x0
87 00000002 RAM_mask DEFINE 0x0002
; to remap RAM at 0x0
88 00000003 EXTMEM_mask DEFINE 0x0003
; to remap EXTMEM at 0x0
89 00000000
90 00000000 ;-----------------------------------------------
----------------
91 00000000 ; ?RESET
92 00000000 ; Reset Vector.
93 00000000 ; Normally, segment INTVEC is linked at address
0.
94 00000000 ; For debugging purposes, INTVEC may be placed
at other
95 00000000 ; addresses.
96 00000000 ; A debugger that honors the entry point will
start the
97 00000000 ; program in a normal way even if INTVEC is not
at address 0.
98 00000000 ;-----------------------------------------------
----------------
99 00000000
100 00000000 MODULE ?RESET
101 00000000 COMMON INTVEC:CODE:NOROOT(2)
102 00000000 PUBLIC __program_start
103 00000000 EXTERN ?cstartup
104 00000000 CODE32 ; Always ARM mode after
reset
105 00000000
106 00000000 __program_start
107 00000000 00F09FE5 ldr pc,=?cstartup ;
Absolute jump can
reach 4 GByte
108 00000004 ........ b ?cstartup ; Relative
branch
allows
remap,
limited to
32
MByte
109 00000008
110 00000008 LTORG
110.1 00000008 TABLE
110.2 00000008 ........ Reference on line 107
110 0000000C LTORG
111 0000000C ENDMOD
##############################
# CRC:1F3 #
# Errors: 0 #
# Warnings: 0 #
# Bytes: 12 #
##############################
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