📄 main.lss
字号:
29e: 80 83 st Z, r24
D12_CMD_WR_H();
2a0: 8f e1 ldi r24, 0x1F ; 31
2a2: 80 83 st Z, r24
...
NOP7();
2b0: 00 00 nop
D12_OUTPUT = Status;
2b2: 6b bb out 0x1b, r22 ; 27
D12_DAT_WR_L();
2b4: 81 e1 ldi r24, 0x11 ; 17
2b6: 80 83 st Z, r24
D12_DAT_WR_H();
2b8: 8d e1 ldi r24, 0x1D ; 29
2ba: 80 83 st Z, r24
...
NOP4();
2c4: 08 95 ret
000002c6 <D12_Set_Address_Enable>:
...
}
void D12_Set_Address_Enable(U8 Addr,U8 Enable)
{
NOP4();
D12_OUTPUT_MODE();
2ce: 9f ef ldi r25, 0xFF ; 255
2d0: 9a bb out 0x1a, r25 ; 26
D12_OUTPUT = 0xd0;
2d2: 90 ed ldi r25, 0xD0 ; 208
2d4: 9b bb out 0x1b, r25 ; 27
D12_CMD_WR_L();
2d6: e5 e6 ldi r30, 0x65 ; 101
2d8: f0 e0 ldi r31, 0x00 ; 0
2da: 93 e1 ldi r25, 0x13 ; 19
2dc: 90 83 st Z, r25
D12_CMD_WR_H();
2de: 9f e1 ldi r25, 0x1F ; 31
2e0: 90 83 st Z, r25
...
NOP7();
2ee: 00 00 nop
D12_OUTPUT = Addr|(Enable<<7);
2f0: 67 95 ror r22
2f2: 66 27 eor r22, r22
2f4: 67 95 ror r22
2f6: 68 2b or r22, r24
2f8: 6b bb out 0x1b, r22 ; 27
D12_DAT_WR_L();
2fa: 81 e1 ldi r24, 0x11 ; 17
2fc: 80 83 st Z, r24
D12_DAT_WR_H();
2fe: 8d e1 ldi r24, 0x1D ; 29
300: 80 83 st Z, r24
...
NOP4();
30a: 08 95 ret
0000030c <D12_Set_Endpoint_Enable>:
...
}
void D12_Set_Endpoint_Enable(U8 Enable)
{
NOP4();
D12_OUTPUT_MODE();
314: 9f ef ldi r25, 0xFF ; 255
316: 9a bb out 0x1a, r25 ; 26
D12_OUTPUT = 0xd8;
318: 98 ed ldi r25, 0xD8 ; 216
31a: 9b bb out 0x1b, r25 ; 27
D12_CMD_WR_L();
31c: e5 e6 ldi r30, 0x65 ; 101
31e: f0 e0 ldi r31, 0x00 ; 0
320: 93 e1 ldi r25, 0x13 ; 19
322: 90 83 st Z, r25
D12_CMD_WR_H();
324: 9f e1 ldi r25, 0x1F ; 31
326: 90 83 st Z, r25
...
NOP7();
334: 00 00 nop
D12_OUTPUT = Enable;
336: 8b bb out 0x1b, r24 ; 27
D12_DAT_WR_L();
338: 81 e1 ldi r24, 0x11 ; 17
33a: 80 83 st Z, r24
D12_DAT_WR_H();
33c: 8d e1 ldi r24, 0x1D ; 29
33e: 80 83 st Z, r24
...
NOP4();
348: 08 95 ret
0000034a <D12_Set_DMA>:
...
}
void D12_Set_DMA(U8 DMA)
{
NOP4();
D12_OUTPUT_MODE();
352: 9f ef ldi r25, 0xFF ; 255
354: 9a bb out 0x1a, r25 ; 26
D12_OUTPUT = 0xfb;
356: 9b ef ldi r25, 0xFB ; 251
358: 9b bb out 0x1b, r25 ; 27
D12_CMD_WR_L();
35a: e5 e6 ldi r30, 0x65 ; 101
35c: f0 e0 ldi r31, 0x00 ; 0
35e: 93 e1 ldi r25, 0x13 ; 19
360: 90 83 st Z, r25
D12_CMD_WR_H();
362: 9f e1 ldi r25, 0x1F ; 31
364: 90 83 st Z, r25
...
NOP7();
372: 00 00 nop
D12_OUTPUT = DMA;
374: 8b bb out 0x1b, r24 ; 27
D12_DAT_WR_L();
376: 81 e1 ldi r24, 0x11 ; 17
378: 80 83 st Z, r24
D12_DAT_WR_H();
37a: 8d e1 ldi r24, 0x1D ; 29
37c: 80 83 st Z, r24
...
NOP4();
386: 08 95 ret
00000388 <D12_Get_DMA>:
...
}
U8 D12_Get_DMA(void)
{
U8 temp;
NOP4();
D12_OUTPUT_MODE();
390: 8f ef ldi r24, 0xFF ; 255
392: 8a bb out 0x1a, r24 ; 26
D12_OUTPUT = 0xfb;
394: 8b ef ldi r24, 0xFB ; 251
396: 8b bb out 0x1b, r24 ; 27
D12_CMD_WR_L();
398: e5 e6 ldi r30, 0x65 ; 101
39a: f0 e0 ldi r31, 0x00 ; 0
39c: 83 e1 ldi r24, 0x13 ; 19
39e: 80 83 st Z, r24
D12_CMD_WR_H();
3a0: 9f e1 ldi r25, 0x1F ; 31
3a2: 90 83 st Z, r25
...
NOP7();
3b0: 00 00 nop
D12_INPUT_MODE();
3b2: 1a ba out 0x1a, r1 ; 26
D12_CMD_RD_L();
3b4: 8b e0 ldi r24, 0x0B ; 11
3b6: 80 83 st Z, r24
NOP3();
3b8: 00 00 nop
3ba: 00 00 nop
3bc: 00 00 nop
temp = D12_INPUT;
3be: 89 b3 in r24, 0x19 ; 25
D12_CMD_RD_H();
3c0: 90 83 st Z, r25
...
NOP4();
return temp;
}
3ca: 99 27 eor r25, r25
3cc: 08 95 ret
000003ce <D12_Set_Mode>:
...
void D12_Set_Mode(U8 Val1, U8 Val2)
{
NOP4();
D12_OUTPUT_MODE();
3d6: 9f ef ldi r25, 0xFF ; 255
3d8: 9a bb out 0x1a, r25 ; 26
D12_OUTPUT = 0xf3;
3da: 93 ef ldi r25, 0xF3 ; 243
3dc: 9b bb out 0x1b, r25 ; 27
D12_CMD_WR_L();
3de: e5 e6 ldi r30, 0x65 ; 101
3e0: f0 e0 ldi r31, 0x00 ; 0
3e2: 93 e1 ldi r25, 0x13 ; 19
3e4: 90 83 st Z, r25
D12_CMD_WR_H();
3e6: 9f e1 ldi r25, 0x1F ; 31
3e8: 90 83 st Z, r25
...
NOP7();
3f6: 00 00 nop
D12_OUTPUT = Val1;
3f8: 8b bb out 0x1b, r24 ; 27
D12_DAT_WR_L();
3fa: 91 e1 ldi r25, 0x11 ; 17
3fc: 90 83 st Z, r25
D12_DAT_WR_H();
3fe: 8d e1 ldi r24, 0x1D ; 29
400: 80 83 st Z, r24
...
NOP6();
D12_OUTPUT = Val2;
40e: 6b bb out 0x1b, r22 ; 27
D12_DAT_WR_L();
410: 90 83 st Z, r25
D12_DAT_WR_H();
412: 80 83 st Z, r24
...
NOP4();
41c: 08 95 ret
0000041e <D12_Send_Resume>:
...
}
void D12_Send_Resume(void)
{
NOP4();
D12_OUTPUT_MODE();
426: 8f ef ldi r24, 0xFF ; 255
428: 8a bb out 0x1a, r24 ; 26
D12_OUTPUT = 0xf6;
42a: 86 ef ldi r24, 0xF6 ; 246
42c: 8b bb out 0x1b, r24 ; 27
D12_CMD_WR_L();
42e: e5 e6 ldi r30, 0x65 ; 101
430: f0 e0 ldi r31, 0x00 ; 0
432: 83 e1 ldi r24, 0x13 ; 19
434: 80 83 st Z, r24
D12_CMD_WR_H();
436: 8f e1 ldi r24, 0x1F ; 31
438: 80 83 st Z, r24
...
NOP4();
442: 08 95 ret
00000444 <D12_Read_Chip_ID>:
...
}
void D12_Ack_Endpoint(U8 Endpoint)
{
NOP4();
D12_OUTPUT_MODE();
D12_OUTPUT = Endpoint;
D12_CMD_WR_L();
D12_CMD_WR_H();
NOP7();
D12_OUTPUT = 0xf1;
D12_CMD_WR_L();
D12_CMD_WR_H();
NOP4();
if(!Endpoint)
D12_Clear_Buffer();
}
U16 D12_Read_Chip_ID(void)
{
U16 temp;
NOP4();
D12_OUTPUT_MODE();
44c: 8f ef ldi r24, 0xFF ; 255
44e: 8a bb out 0x1a, r24 ; 26
D12_OUTPUT = 0xfd;
450: 8d ef ldi r24, 0xFD ; 253
452: 8b bb out 0x1b, r24 ; 27
D12_CMD_WR_L();
454: e5 e6 ldi r30, 0x65 ; 101
456: f0 e0 ldi r31, 0x00 ; 0
458: 83 e1 ldi r24, 0x13 ; 19
45a: 80 83 st Z, r24
D12_CMD_WR_H();
45c: 8f e1 ldi r24, 0x1F ; 31
45e: 80 83 st Z, r24
...
NOP7();
46c: 00 00 nop
D12_INPUT_MODE();
46e: 1a ba out 0x1a, r1 ; 26
D12_DAT_RD_L();
470: 29 e0 ldi r18, 0x09 ; 9
472: 20 83 st Z, r18
NOP3();
474: 00 00 nop
476: 00 00 nop
478: 00 00 nop
temp = D12_INPUT;
47a: 89 b3 in r24, 0x19 ; 25
D12_DAT_RD_H();
47c: 4d e1 ldi r20, 0x1D ; 29
47e: 40 83 st Z, r20
...
NOP6();
D12_DAT_RD_L();
48c: 20 83 st Z, r18
NOP3();
48e: 00 00 nop
490: 00 00 nop
492: 00 00 nop
temp = temp<<8|D12_INPUT;
494: 29 b3 in r18, 0x19 ; 25
D12_DAT_RD_H();
496: 40 83 st Z, r20
...
NOP4();
4a0: 99 27 eor r25, r25
4a2: 98 2f mov r25, r24
4a4: 88 27 eor r24, r24
4a6: 33 27 eor r19, r19
return temp;
}
4a8: 82 2b or r24, r18
4aa: 93 2b or r25, r19
4ac: 08 95 ret
000004ae <D12_Read_Interrupt_Register>:
...
U8 D12_Read_Endpoint(U8 Endpoint,U8 * Buffer,U8 Count)
{
U8 temp;
NOP4();
while(!(D12_Select_Endpoint(Endpoint)&1));
D12_Read_Last_Transaction_Status(Endpoint);
D12_OUTPUT_MODE();
D12_OUTPUT = 0xf0;
D12_CMD_WR_L();
D12_CMD_WR_H();
NOP7();
D12_INPUT_MODE();
D12_CMD_RD_L();
NOP3();
temp = D12_INPUT;
D12_CMD_RD_H();
NOP6();
D12_CMD_RD_L();
NOP3();
temp = D12_INPUT;
D12_CMD_RD_H();
if(temp<Count)Count = temp;
temp = Count;
while(Count)
{
NOP4();
D12_CMD_RD_L();
NOP3();
*Buffer++ = D12_INPUT;
D12_CMD_RD_H();
Count--;
}
NOP4();
D12_Clear_Buffer();
return temp;
}
void D12_Write_Endpoint(U8 Endpoint, U8 * Buffer, U8 Count)
{
NOP4();
while(1) //wait buffer empty
{
if(!(D12_Select_Endpoint(Endpoint)&1))break;
}
D12_Read_Last_Transaction_Status(Endpoint);
D12_OUTPUT_MODE();
D12_OUTPUT = 0xf0;
D12_CMD_WR_L();
D12_CMD_WR_H();
NOP7();
D12_OUTPUT = 0;
D12_DAT_WR_L();
D12_DAT_WR_H();
NOP6();
D12_OUTPUT = Count;
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