icetek-c6713-a.h

TMS320C6713的480*240液晶显示程序

/*#include "scancode.h"*/

// emif  --------------------------------------------------------
#define EMIF_GCTL       0x01800000
#define EMIF_CE1        0x01800004
#define EMIF_CE0        0x01800008
#define EMIF_CE2        0x01800010
#define EMIF_CE3        0x01800014
#define EMIF_SDRAMCTL   0x01800018
#define EMIF_SDRAMTIM   0x0180001C
#define EMIF_SDRAMEXT   0x01800020
#define EMIF_CCFG       0x01840000;
// interrupt  --------------------------------------------------
//#define IMH (*(unsigned int *)0x19c0000)
//#define IML (*(unsigned int *)0x19c0004)
// timer  -------------------------------------------------------
#define TIMER1CTL (*(unsigned int *)0x01980000)
#define TIMER1PRD (*(unsigned int *)0x01980004)
#define TIMER1CNT (*(unsigned int *)0x01980008)
// McBSP0  ------------------------------------------------------
#define SPCR0 (*(unsigned int *)0x018c0008)
#define PCR0 (*(unsigned int *)0x018c0024)
#define SPCR1 (*(unsigned int *)0x01900008)
#define PCR1 (*(unsigned int *)0x01900024)
// ICETEK-C6713-A -----------------------------------------------
#define LBDS (*(unsigned short int *)0x90100000)
#define SWITCH (*(unsigned short int *)0x90100002)
// ICETEK-CTR  --------------------------------------------------
#define CTRSTATUS (*(unsigned short int *)0x0901f0000)
#define CTRLED    (*(unsigned short int *)0x0901f0008)
#define MCTRKEY   (*(unsigned short int *)0x0901f000a)
#define CTRCLKEY  (*(unsigned short int *)0x0901f000c)

#define IDKCGR (*(unsigned char *)0x0901f4000)
#define IDKCDATA (*(unsigned char *)0x0901f4008)
#define IDKCIIC (*(unsigned char *)0x0901f4010)
#define I2C_REG (*(unsigned char *)0x0901f4010)
#define IDKCSTATUS (*(unsigned char *)0x0901f4018)

// C6713DSP Registers  ------------------------------------------
cregister unsigned int IER,IFR,CSR,ICR,ISTP;
//PLL Registers  ------------------------------------------
#define DEVCFG          *(int *)0x019C0200
#define PLL_BASE_ADDR   0x01b7c000
#define PLL_PID         ( PLL_BASE_ADDR + 0x000 )
#define PLL_CSR         ( PLL_BASE_ADDR + 0x100 )
#define PLL_MULT        ( PLL_BASE_ADDR + 0x110 )
#define PLL_DIV0        ( PLL_BASE_ADDR + 0x114 )
#define PLL_DIV1        ( PLL_BASE_ADDR + 0x118 )
#define PLL_DIV2        ( PLL_BASE_ADDR + 0x11C )
#define PLL_DIV3        ( PLL_BASE_ADDR + 0x120 )
#define PLL_OSCDIV1     ( PLL_BASE_ADDR + 0x124 )
//定义PLL端口初始化值
#define CSR_PLLEN       0x00000001
#define CSR_PLLPWRDN    0x00000002
#define CSR_PLLRST      0x00000008 
#define CSR_PLLSTABLE   0x00000040
#define DIV_ENABLE      0x00008000