6713.h

TMS320C6713的480*240液晶显示程序

#ifndef CHIP_6713_
#define CHIP_6713_

#ifdef __cplusplus
extern "C" {
#endif
#define DEVCFG          *(int *)0x019C0200
#define PLL_BASE_ADDR   0x01b7c000
#define PLL_PID         ( PLL_BASE_ADDR + 0x000 )
#define PLL_CSR         ( PLL_BASE_ADDR + 0x100 )
#define PLL_MULT        ( PLL_BASE_ADDR + 0x110 )
#define PLL_DIV0        ( PLL_BASE_ADDR + 0x114 )
#define PLL_DIV1        ( PLL_BASE_ADDR + 0x118 )
#define PLL_DIV2        ( PLL_BASE_ADDR + 0x11C )
#define PLL_DIV3        ( PLL_BASE_ADDR + 0x120 )
#define PLL_OSCDIV1     ( PLL_BASE_ADDR + 0x124 )
#define EMIF_GCTL       0x01800000
#define EMIF_CE1        0x01800004
#define EMIF_CE0        0x01800008
#define EMIF_CE2        0x01800010
#define EMIF_CE3        0x01800014
#define EMIF_SDRAMCTL   0x01800018
#define EMIF_SDRAMTIM   0x0180001C
#define EMIF_SDRAMEXT   0x01800020
#define EMIF_CCFG       0x01840000;
#define SDRAM_BASE_ADDRESS    0x80000000
#define SDRAM_SIZE      0x400000
#define EIP             *(int *)0x19c0008
#define IML             *(int *)0x19c0004
#define IMH             *(int *)0x19c0000
#define TIM0_CTL        *(int *)0x1940000
#define TIM0_PRD        *(int *)0x1940004
#define TIM0_CNT        *(int *)0x1940008
/* Define McBSP0 Registers */
#define McBSP0_DRR      *(int *)0x18c0000   /* Address of data receive reg.         */
#define McBSP0_DXR      *(int *)0x18c0004   /* Address of data transmit reg.        */
#define McBSP0_SPCR     *(int *)0x18c0008   /* Address of serial port contl. reg.   */
#define McBSP0_RCR      *(int *)0x18c000C   /* Address of receive control reg.      */
#define McBSP0_XCR      *(int *)0x18c0010   /* Address of transmit control reg.     */
#define McBSP0_SRGR     *(int *)0x18c0014   /* Address of sample rate generator     */
#define McBSP0_MCR      *(int *)0x18c0018   /* Address of multichannel reg.         */
#define McBSP0_RCER     *(int *)0x18c001C   /* Address of receive channel enable.   */
#define McBSP0_XCER     *(int *)0x18c0020   /* Address of transmit channel enable.  */
#define McBSP0_PCR      *(int *)0x18c0024   /* Address of pin control reg.          */
/* Define McBSP1 Registers */
#define McBSP1_DRR      *(int *)0x1900000   /* Address of data receive reg.         */
#define McBSP1_DXR      *(int *)0x1900004   /* Address of data transmit reg.        */
#define McBSP1_SPCR     *(int *)0x1900008   /* Address of serial port contl. reg.   */
#define McBSP1_RCR      *(int *)0x190000C   /* Address of receive control reg.      */
#define McBSP1_XCR      *(int *)0x1900010   /* Address of transmit control reg.     */
#define McBSP1_SRGR     *(int *)0x1900014   /* Address of sample rate generator     */
#define McBSP1_MCR      *(int *)0x1900018   /* Address of multichannel reg.         */
#define McBSP1_RCER     *(int *)0x190001C   /* Address of receive channel enable.   */
#define McBSP1_XCER     *(int *)0x1900020   /* Address of transmit channel enable.  */
#define McBSP1_PCR      *(int *)0x1900024   /* Address of pin control reg.          */
extern cregister unsigned int IER,CSR,IFR,ICR,ISTP;

#ifdef __cplusplus
}
#endif

#endif