📄 board.s
字号:
.module board.c
.area lit(rom, con, rel)
_Sys_Set::
.byte 116
.byte 64
.byte 3
.byte 196
.byte 134
.byte 16
.word 600
.byte 178
.byte 159
.byte 1
.byte 245
.byte 131
.byte 21
.word 1200
.byte 194
.byte 207
.byte 0
.byte 198
.byte 131
.byte 21
.word 2400
.byte 225
.byte 103
.byte 0
.byte 199
.byte 131
.byte 64
.word 4800
.byte 241
.byte 51
.byte 0
.byte 200
.byte 131
.byte 52
.word 9600
.byte 241
.byte 25
.byte 0
.byte 201
.byte 131
.byte 52
.word 19200
.byte 241
.byte 12
.byte 0
.byte 202
.byte 131
.byte 52
.word 38400
.byte 241
.byte 8
.byte 0
.byte 203
.byte 131
.byte 69
.word 57600
.dbfile D:\WIRELE~1\CC1020~1\SoftWare\SoftWare\board.c
.dbstruct 0 8 S_SYS_SETTINGS
.dbfield 0 tcnt0_val c
.dbfield 1 ubrr0l_val c
.dbfield 2 ubrr0h_val c
.dbfield 3 mdcfg4_val c
.dbfield 4 mdcfg3_val c
.dbfield 5 deviatn c
.dbfield 6 baud i
.dbend
.dbsym e Sys_Set _Sys_Set A[64:8]kS[S_SYS_SETTINGS]
.area data(ram, con, rel)
.dbfile D:\WIRELE~1\CC1020~1\SoftWare\SoftWare\board.c
_paTable::
.blkb 2
.area idata
.byte 141,141
.area data(ram, con, rel)
.dbfile D:\WIRELE~1\CC1020~1\SoftWare\SoftWare\board.c
.blkb 2
.area idata
.byte 141,141
.area data(ram, con, rel)
.dbfile D:\WIRELE~1\CC1020~1\SoftWare\SoftWare\board.c
.blkb 2
.area idata
.byte 141,141
.area data(ram, con, rel)
.dbfile D:\WIRELE~1\CC1020~1\SoftWare\SoftWare\board.c
.blkb 2
.area idata
.byte 141,141
.area data(ram, con, rel)
.dbfile D:\WIRELE~1\CC1020~1\SoftWare\SoftWare\board.c
.dbsym e paTable _paTable A[8:8]c
.area lit(rom, con, rel)
_rfSettings::
.byte 6
.byte 46
.byte 46
.byte 7
.byte 211
.byte 145
.byte 255
.byte 4
.byte 69
.byte 0
.byte 0
.byte 6
.byte 0
.byte 16
.byte 128
.byte 131
.byte 245
.byte 131
.byte 3
.byte 34
.byte 248
.byte 21
.byte 14
.byte 48
.byte 24
.byte 22
.byte 108
.byte 3
.byte 64
.byte 145
.byte 135
.byte 107
.byte 248
.byte 86
.byte 16
.byte 233
.byte 42
.byte 0
.byte 31
.dbstruct 0 39 S_RF_SETTINGS
.dbfield 0 IOCFG2 c
.dbfield 1 IOCFG1 c
.dbfield 2 IOCFG0 c
.dbfield 3 FIFOTHR c
.dbfield 4 SYNC1 c
.dbfield 5 SYNC0 c
.dbfield 6 PKTLEN c
.dbfield 7 PKTCTRL1 c
.dbfield 8 PKTCTRL0 c
.dbfield 9 ADDR c
.dbfield 10 CHANNR c
.dbfield 11 FSCTRL1 c
.dbfield 12 FSCTRL0 c
.dbfield 13 FREQ2 c
.dbfield 14 FREQ1 c
.dbfield 15 FREQ0 c
.dbfield 16 MDMCFG4 c
.dbfield 17 MDMCFG3 c
.dbfield 18 MDMCFG2 c
.dbfield 19 MDMCFG1 c
.dbfield 20 MDMCFG0 c
.dbfield 21 DEVIATN c
.dbfield 22 MCSM2 c
.dbfield 23 MCSM1 c
.dbfield 24 MCSM0 c
.dbfield 25 FOCCFG c
.dbfield 26 BSCFG c
.dbfield 27 AGCCTRL2 c
.dbfield 28 AGCCTRL1 c
.dbfield 29 AGCCTRL0 c
.dbfield 30 WOREVT1 c
.dbfield 31 WOREVT0 c
.dbfield 32 WORCTRL c
.dbfield 33 FREND1 c
.dbfield 34 FREND0 c
.dbfield 35 FSCAL3 c
.dbfield 36 FSCAL2 c
.dbfield 37 FSCAL1 c
.dbfield 38 FSCAL0 c
.dbend
.dbsym e rfSettings _rfSettings kS[S_RF_SETTINGS]
.area vector(rom, abs)
.org 10
rjmp _IntPCINT2
.area lit(rom, con, rel)
.area text(rom, con, rel)
.dbfile D:\WIRELE~1\CC1020~1\SoftWare\SoftWare\board.c
.dbfunc e IntPCINT2 _IntPCINT2 fV
.even
_IntPCINT2::
st -y,R2
st -y,R24
in R2,0x3f
st -y,R2
.dbline -1
.dbline 174
; /****************************************************/
; /* Application note */
; /* Reference design : CC1100 RF Test Board */
; /* File: board.c */
; /* Revision: 1.0 */
; /* Description: */
; /* Microcontroller:ATmega48/48V */
; /* Author: Zcg, Field Applications Engineer, SunRay*/
; /****************************************************/
;
; #include "iom88v.h"
; #include "macros.h"
; #include "main.h"
; #include "CC1100.h"
; #include "board.h"
; #include "simpleio.h"
;
; INT8U Test_RFTx_Buf[MAX_DATA_TEST]; //测试数据缓冲区
;
; INT8U UartReceive_Buf[MAX_UT_BUFF]; //射频发送（串口接收）缓存
; INT8U RFReceive_Buf[MAX_RF_BUFF]; //射频接收（串口发送）缓存
;
; INT8U RFSend_Start;
; INT8U RFSendCnt; //射频发送计数器，记录要发送的字节个数
; INT8U RFReceiveCnt; //串口接收计数器
;
; INT8U RFReceiveLen; //串口发送字节长度
;
; INT8U RFSendFlg; //当串口接收完一包数据，置该标志
; INT8U RFReceiveFlg; //当射频接收完一包数据，置该标志
;
;
; INT8U RXOTFlg; //串口接收数据超时标志
; INT8U RXOTCnt; //串口接收数据超时计数器
;
; INT8U Baud_Set_Num; //跳线开关波特率
; INT8U Chno_Set_Num; //跳线开关信道值
;
; INT8U Beep_Flag; //蜂鸣器开启标志
; INT16U Beep_Time; //蜂鸣器开启时间
;
; const SYS_SETTINGS Sys_Set[8] =
; {
; {T_T0_18MS,0x40,0x03,0xC4,0x86,0x10,600},//000 600
; {T_T0_10MS,0x9F,0x01,0xF5,0x83,0x15,1200},//001 1200
; {T_T0_8MS ,0xCF,0x00,0xC6,0x83,0x15,2400},//010 2400
; {T_T0_4MS ,0x67,0x00,0xC7,0x83,0x40,4800},//011 4800
; {T_T0_2MS ,0x33,0x00,0xC8,0x83,0x34,9600},//100 9600
; {T_T0_2MS ,0x19,0x00,0xC9,0x83,0x34,19200},//101 19200
; {T_T0_2MS ,0x0C,0x00,0xCA,0x83,0x34,38400},//110 38400
; {T_T0_2MS ,0x08,0x00,0xCB,0x83,0x45,57600},//111 57600
; };
;
;
;
; INT8U paTable[8] = {0x8D,0x8D,0x8D,0x8D,0x8D,0x8D,0x8D,0x8D};
; #if 0
; INT8U rfSettings[39] = {
; 0x06, //*0x0B IOCFG2 GDO2 output pin configuration.
; 0x2E, //*0x2E IOCFG1 GDO1 output pin configuration.
; 0x2E, //*0x0C IOCFG0 GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed pseudo register explanation.
; 0x07, // FIFOTHR RX FIFO and TX FIFO thresholds
; 0xD3, // SYNC1 Sync word, high byte
; 0x91, // SYNC0 Sync word, low byte
; 0xFF, // PKTLEN Packet length.
; 0x24, //*0x00 PKTCTRL1 Packet automation control.
; 0x45, //*0x12 PKTCTRL0 Packet automation control.
; 0x00, // ADDR Device address.
; 0x00, // CHANNR Channel number.
; 0x0C, //*0x06 FSCTRL1 Frequency synthesizer control.
; 0x00, // FSCTRL0 Frequency synthesizer control.
; 0x10, // FREQ2 Frequency control word, high byte.
; 0xA7, // FREQ1 Frequency control word, middle byte.
; 0x62, // FREQ0 Frequency control word, low byte.
; 0xF5, //* MDMCFG4 Modem configuration.
; 0x83, //* MDMCFG3 Modem configuration.
; 0x03, //*0x00 MDMCFG2 Modem configuration.
; 0x22, // MDMCFG1 Modem configuration.
; 0xF8, // MDMCFG0 Modem configuration.
; 0x15, // DEVIATN Modem deviation setting (when FSK modulation is enabled).
; 0x0E, //*0x07 MCSM2 Main Radio Control State Machine configuration.
; 0x30, // MCSM1 Main Radio Control State Machine configuration.
; 0x18, // MCSM0 Main Radio Control State Machine configuration.
; 0x15, //*0x16 FOCCFG Frequency Offset Compensation Configuration.
; 0x6C, // BSCFG Bit synchronization Configuration.
; 0x03, // AGCCTRL2 AGC control.
; 0x40, // AGCCTRL1 AGC control.
; 0x91, // AGCCTRL0 AGC control.
; 0x87, // WOREVT1 0x1E //定义EVENT0时间
; 0x6B, // WOREVT0 0x1F //...
; 0xF8, // WORCTRL 0x20 //关闭RC，定义EVENT1时间
; 0x56, // FREND1 Front end RX configuration.
; 0x10, // FREND0 Front end RX configuration.
; 0xA9, //* FSCAL3 Frequency synthesizer calibration.
; 0x2A, //* FSCAL2 Frequency synthesizer calibration.
; 0x0D, //* FSCAL1 Frequency synthesizer calibration.
; 0x11, //* FSCAL0 Frequency synthesizer calibration.
; };
; #endif
; #define RF_CENTER 429
; #define RF_429
; #if 1
; const RF_SETTINGS rfSettings = {
; 0x06, //*0x0B IOCFG2 GDO2 output pin configuration.
; 0x2E, //*0x2E IOCFG1 GDO1 output pin configuration.
; 0x2E, //*0x0C IOCFG0 GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed pseudo register explanation.
; 0x07, // FIFOTHR RX FIFO and TX FIFO thresholds
; 0xD3, // SYNC1 Sync word, high byte
; 0x91, // SYNC0 Sync word, low byte
; 0xFF, // PKTLEN Packet length.
; 0x04, //*0x00 PKTCTRL1 Packet automation control.
; 0x45, //*0x12 PKTCTRL0 Packet automation control.
; 0x00, // ADDR Device address.
; 0x00, // CHANNR Channel number.
; 0x06,//0x0C, //*0x06 FSCTRL1 Frequency synthesizer control.
; 0x00, // FSCTRL0 Frequency synthesizer control.
; #ifdef RF_429
; 0x10, // FREQ2 Frequency control word, high byte.
; 0x80, // FREQ1 Frequency control word, middle byte.
; 0x83, // FREQ0 Frequency control word, low byte.
; #endif
;
; #ifdef RF_433
; 0x10, // FREQ2 Frequency control word, high byte.
; 0xA7, // FREQ1 Frequency control word, middle byte.
; 0x62, // FREQ0 Frequency control word, low byte.
; #endif
; #ifdef RF_461
; 0x11, // FREQ2 Frequency control word, high byte.
; 0xBB, // FREQ1 Frequency control word, middle byte.
; 0x13, // FREQ0 Frequency control word, low byte.
; #endif
; 0xF5, // MDMCFG4 Modem configuration.
; 0x83, // MDMCFG3 Modem configuration.
; 0x03, //*0x00 MDMCFG2 Modem configuration.
; 0x22, // MDMCFG1 Modem configuration.
; 0xF8, // MDMCFG0 Modem configuration.
; 0x15, // DEVIATN Modem deviation setting (when FSK modulation is enabled).
; 0x0E, //*0x07 MCSM2 Main Radio Control State Machine configuration.
; 0x30, // MCSM1 Main Radio Control State Machine configuration.
; 0x18, // MCSM0 Main Radio Control State Machine configuration.
; 0x16,//0x15, //*0x16 FOCCFG Frequency Offset Compensation Configuration.
; 0x6C, // BSCFG Bit synchronization Configuration.
; 0x03, // AGCCTRL2 AGC control.
; 0x40, // AGCCTRL1 AGC control.
; 0x91, // AGCCTRL0 AGC control.
; 0x87, // WOREVT1 0x1E //定义EVENT0时间
; 0x6B, // WOREVT0 0x1F //...
; 0xF8, // WORCTRL 0x20 //关闭RC，定义EVENT1时间
; 0x56, // FREND1 Front end RX configuration.
; 0x10, // FREND0 Front end RX configuration.
; 0xE9,//0xA9, //*0xE9 FSCAL3 Frequency synthesizer calibration.
; 0x2A,//0x2A, //*0x2A FSCAL2 Frequency synthesizer calibration.
; 0x00,//0x0D, //*0x00 FSCAL1 Frequency synthesizer calibration.
; 0x1F,//0x11, //*0x1F FSCAL0 Frequency synthesizer calibration.
; };
; #endif
; INT8U RFState; //保存射频状态，共两种状态：发送、接收状态
;
;
; INT8U CC1100IntHFlg; //CC1100产生高电平中断标志
; INT8U CC1100IntLFlg;
;
; /*
; ************************************************************
; *Description:RF收发中断处理函数
; *Arguments :none
; *Returns :none
; *Notes :
; ************************************************************
; */
; #pragma interrupt_handler IntPCINT2:iv_PCINT2
; void IntPCINT2 (void)
; {
.dbline 175
; if (GDO2_STATE != 0x00)
sbis 0x9,2
rjmp L2
.dbline 176
; {
.dbline 177
; CC1100IntHFlg = TRUE; //上升沿中断，等待下降沿中断
ldi R24,1
sts _CC1100IntHFlg,R24
.dbline 178
; if(RFSend_Start==TRUE)
lds R24,_RFSend_Start
cpi R24,1
brne L4
.dbline 179
; {
.dbline 182
; //TXEN_SET_L;//打开功率放大
; //RXEN_SET_L;//打开功率放大
; }
L4:
.dbline 183
; }
L2:
.dbline 184
; if ((CC1100IntHFlg == TRUE) && (GDO2_STATE == 0x00))
lds R24,_CC1100IntHFlg
cpi R24,1
brne L6
sbic 0x9,2
rjmp L6
.dbline 185
; {
.dbline 186
; CC1100IntHFlg = FALSE; //下降沿中断
clr R2
sts _CC1100IntHFlg,R2
.dbline 187
; CC1100IntLFlg = TRUE;
ldi R24,1
sts _CC1100IntLFlg,R24
.dbline 189
;
; if(RFSend_Start==TRUE)
lds R24,_RFSend_Start
cpi R24,1
brne L8
.dbline 190
; {
.dbline 193
; //TXEN_SET_H;//关闭功率放大
; //RXEN_SET_H;//关闭功率放大
; RFSend_Start=FALSE;
sts _RFSend_Start,R2
.dbline 194
; }
L8:
.dbline 195
L6:
.dbline -2
L1:
ld R2,y+
out 0x3f,R2
ld R24,y+
ld R2,y+
.dbline 0 ; func end
reti
.dbend
.dbfunc e port_init _port_init fV
.even
_port_init::
.dbline -1
.dbline 206
; }
; }
; /*
; ************************************************************
; *Description:初始化IO端口
; *Arguments :none
; *Returns :none
; *Notes :
; ************************************************************
; */
; void port_init(void)
; {
.dbline 207
; DDRB =0x00;
clr R2
out 0x4,R2
.dbline 208
; PORTB=0x3F;
ldi R24,63
out 0x5,R24
.dbline 210
;
; DDRD =0x08;//PD3 KEY
ldi R24,8
out 0xa,R24
.dbline 211
; PORTD=0xD0;
ldi R24,208
out 0xb,R24
.dbline 213
;
; BEEP_INIT();
sbi 0xa,5
.dbline 214
; BEEP_OFF();
cbi 0xb,5
.dbline -2
L10:
.dbline 0 ; func end
ret
.dbend
.dbfunc e uart0_init _uart0_init fV
.even
_uart0_init::
.dbline -1
.dbline 230
;
; //TXEN_OUT;
; //TXEN_SET_H;
; //RXEN_OUT;
; //RXEN_SET_H;
; }
; /*
; ************************************************************
; *Description:初始化串口
; *Arguments :none
; *Returns :none
; *Notes :
; ************************************************************
; */
; void uart0_init(void)
; {
.dbline 231
; UBRR0H = Sys_Set[Baud_Set_Num].ubrr0h_val;
lds R2,_Baud_Set_Num
ldi R24,8
mul R24,R2
movw R30,R0
ldi R24,<_Sys_Set+2
ldi R25,>_Sys_Set+2
add R30,R24
adc R31,R25
lpm R30,Z
sts 197,R30
.dbline 232
; UBRR0L = Sys_Set[Baud_Set_Num].ubrr0l_val;
ldi R24,8
mul R24,R2
movw R30,R0
ldi R24,<_Sys_Set+1
ldi R25,>_Sys_Set+1
add R30,R24
adc R31,R25
lpm R30,Z
sts 196,R30
.dbline 234
;
; UCSR0C = BIT(UCSZ01) | BIT(UCSZ00); //Set frame format: 8data, 1stop bit, asyn mode
ldi R24,6
sts 194,R24
.dbline 235
; UCSR0B = BIT(RXEN0) | BIT(TXEN0); //使能串口发送、接收
ldi R24,24
sts 193,R24
.dbline 236
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -