bcm43xx.h

博通的bcm43xx系列Minipci接口无线网卡驱动

	u8 et1mdcport:1;
	u8 boardrev;
	u8 locale:4;
	u8 antennas_aphy:2;
	u8 antennas_bgphy:2;
	u16 pa0b0;
	u16 pa0b1;
	u16 pa0b2;
	u8 wl0gpio0;
	u8 wl0gpio1;
	u8 wl0gpio2;
	u8 wl0gpio3;
	u8 maxpower_aphy;
	u8 maxpower_bgphy;
	u16 pa1b0;
	u16 pa1b1;
	u16 pa1b2;
	u8 idle_tssi_tgt_aphy;
	u8 idle_tssi_tgt_bgphy;
	u16 boardflags;
	u16 antennagain_aphy;
	u16 antennagain_bgphy;
};

/* Value pair to measure the LocalOscillator. */
struct bcm43xx_lopair {
	s8 low;
	s8 high;
	u8 used:1;
};
#define BCM43xx_LO_COUNT	(14*4)

struct bcm43xx_phyinfo {
	/* Hardware Data */
	u8 version;
	u8 type;
	u8 rev;
	u16 antenna_diversity;
	u16 savedpctlreg;
	u16 minlowsig[2];
	u16 minlowsigpos[2];
	u8 connected:1,
	   calibrated:1,
	   is_locked:1, /* used in bcm43xx_phy_{un}lock() */
	   dyn_tssi_tbl:1; /* used in bcm43xx_phy_init_tssi2dbm_table() */
	/* LO Measurement Data.
	 * Use bcm43xx_get_lopair() to get a value.
	 */
	struct bcm43xx_lopair *_lo_pairs;

	/* TSSI to dBm table in use */
	const s8 *tssi2dbm;
	/* idle TSSI value */
	s8 idle_tssi;
	/* PHY lock for core.rev < 3
	 * This lock is only used by bcm43xx_phy_{un}lock()
	 */
	spinlock_t lock;
};


struct bcm43xx_radioinfo {
	u16 manufact;
	u16 version;
	u8 revision;

	/* 0: baseband attenuation,
	 * 1: radio attenuation, 
	 * 2: tx_CTL1
	 * 3: tx_CTL2
	 */
	u16 txpower[4];
	/* Desired TX power in dBm Q5.2 */
	u16 txpower_desired;
	/* Current Interference Mitigation mode */
	int interfmode;
	/* Stack of saved values from the Interference Mitigation code */
	u16 interfstack[20];
	/* Saved values from the NRSSI Slope calculation */
	s16 nrssi[2];
	s32 nrssislope;
	/* In memory nrssi lookup table. */
	s8 nrssi_lt[64];

	/* current channel */
	u8 channel;
	u8 initial_channel;

	u16 lofcal;

	u16 initval;

	u8 enabled:1;
	/* ACI (adjacent channel interference) flags. */
	u8 aci_enable:1,
	   aci_wlan_automatic:1,
	   aci_hw_rssi:1;
};

/* Data structures for DMA transmission, per 80211 core. */
struct bcm43xx_dma {
	struct bcm43xx_dmaring *tx_ring0;
	struct bcm43xx_dmaring *tx_ring1;
	struct bcm43xx_dmaring *tx_ring2;
	struct bcm43xx_dmaring *tx_ring3;
	struct bcm43xx_dmaring *rx_ring0;
	struct bcm43xx_dmaring *rx_ring1; /* only available on core.rev < 5 */
};

/* Data structures for PIO transmission, per 80211 core. */
struct bcm43xx_pio {
	struct bcm43xx_pioqueue *queue0;
	struct bcm43xx_pioqueue *queue1;
	struct bcm43xx_pioqueue *queue2;
	struct bcm43xx_pioqueue *queue3;
};

#define BCM43xx_MAX_80211_CORES		2

#define BCM43xx_COREFLAG_AVAILABLE	(1 << 0)
#define BCM43xx_COREFLAG_ENABLED	(1 << 1)
#define BCM43xx_COREFLAG_INITIALIZED	(1 << 2)

#ifdef CONFIG_BCM947XX
#define core_offset(bcm) (bcm)->current_core_offset
#else
#define core_offset(bcm) 0
#endif

struct bcm43xx_coreinfo {
	/** Driver internal flags. See BCM43xx_COREFLAG_* */
	u32 flags;
	/** core_id ID number */
	u16 id;
	/** core_rev revision number */
	u8 rev;
	/** Index number for _switch_core() */
	u8 index;
	/* Pointer to the PHYinfo, which belongs to this core (if 80211 core) */
	struct bcm43xx_phyinfo *phy;
	/* Pointer to the RadioInfo, which belongs to this core (if 80211 core) */
	struct bcm43xx_radioinfo *radio;
	/* Pointer to the DMA rings, which belong to this core (if 80211 core) */
	struct bcm43xx_dma *dma;
	/* Pointer to the PIO queues, which belong to this core (if 80211 core) */
	struct bcm43xx_pio *pio;
};

/* Context information for a noise calculation (Link Quality). */
struct bcm43xx_noise_calculation {
	struct bcm43xx_coreinfo *core_at_start;
	u8 channel_at_start;
	u8 calculation_running:1;
	u8 nr_samples;
	s8 samples[8][4];
};

struct bcm43xx_stats {
	u8 link_quality;
	/* Store the last TX/RX times here for updating the leds. */
	unsigned long last_tx;
	unsigned long last_rx;
};

struct bcm43xx_key {
	u8 enabled:1;
	u8 algorithm;
};

struct bcm43xx_private {
	struct bcm43xx_sysfs sysfs;

	struct ieee80211_device *ieee;
	struct ieee80211softmac_device *softmac;

	struct net_device *net_dev;
	struct pci_dev *pci_dev;
	unsigned int irq;

	void __iomem *mmio_addr;
	unsigned int mmio_len;

	/* Do not use the lock directly. Use the bcm43xx_lock* helper
	 * functions, to be MMIO-safe. */
	spinlock_t _lock;

	/* Driver status flags. */
	u32 initialized:1,		/* init_board() succeed */
	    was_initialized:1,		/* for PCI suspend/resume. */
	    shutting_down:1,		/* free_board() in progress */
	    __using_pio:1,		/* Internal, use bcm43xx_using_pio(). */
	    bad_frames_preempt:1,	/* Use "Bad Frames Preemption" (default off) */
	    reg124_set_0x4:1,		/* Some variable to keep track of IRQ stuff. */
	    powersaving:1,		/* TRUE if we are in PowerSaving mode. FALSE otherwise. */
	    short_preamble:1,		/* TRUE, if short preamble is enabled. */
	    firmware_norelease:1;	/* Do not release the firmware. Used on suspend. */

	struct bcm43xx_stats stats;

	/* Bus type we are connected to.
	 * This is currently always BCM43xx_BUSTYPE_PCI
	 */
	u8 bustype;

	u16 board_vendor;
	u16 board_type;
	u16 board_revision;

	u16 chip_id;
	u8 chip_rev;

	struct bcm43xx_sprominfo sprom;
#define BCM43xx_NR_LEDS		4
	struct bcm43xx_led leds[BCM43xx_NR_LEDS];

	/* The currently active core. NULL if not initialized, yet. */
	struct bcm43xx_coreinfo *current_core;
#ifdef CONFIG_BCM947XX
	/** current core memory offset */
	u32 current_core_offset;
#endif
	struct bcm43xx_coreinfo *active_80211_core;
	/* coreinfo structs for all possible cores follow.
	 * Note that a core might not exist.
	 * So check the coreinfo flags before using it.
	 */
	struct bcm43xx_coreinfo core_chipcommon;
	struct bcm43xx_coreinfo core_pci;
	struct bcm43xx_coreinfo core_v90;
	struct bcm43xx_coreinfo core_pcmcia;
	struct bcm43xx_coreinfo core_ethernet;
	struct bcm43xx_coreinfo core_80211[ BCM43xx_MAX_80211_CORES ];
	/* Info about the PHY for each 80211 core. */
	struct bcm43xx_phyinfo phy[ BCM43xx_MAX_80211_CORES ];
	/* Info about the Radio for each 80211 core. */
	struct bcm43xx_radioinfo radio[ BCM43xx_MAX_80211_CORES ];
	/* DMA */
	struct bcm43xx_dma dma[ BCM43xx_MAX_80211_CORES ];
	/* PIO */
	struct bcm43xx_pio pio[ BCM43xx_MAX_80211_CORES ];

	u32 chipcommon_capabilities;

	/* Reason code of the last interrupt. */
	u32 irq_reason;
	u32 dma_reason[4];
	/* saved irq enable/disable state bitfield. */
	u32 irq_savedstate;
	/* Link Quality calculation context. */
	struct bcm43xx_noise_calculation noisecalc;

	/* Threshold values. */
	//TODO: The RTS thr has to be _used_. Currently, it is only set via WX.
	u32 rts_threshold;

	/* Interrupt Service Routine tasklet (bottom-half) */
	struct tasklet_struct isr_tasklet;

	/* Periodic tasks */
	struct timer_list periodic_tasks;
	unsigned int periodic_state;

	struct work_struct restart_work;

	/* Informational stuff. */
	char nick[IW_ESSID_MAX_SIZE + 1];

	/* encryption/decryption */
	u16 security_offset;
	struct bcm43xx_key key[54];
	u8 default_key_idx;

	/* Firmware. */
	const struct firmware *ucode;
	const struct firmware *pcm;
	const struct firmware *initvals0;
	const struct firmware *initvals1;

	/* Debugging stuff follows. */
#ifdef CONFIG_BCM43XX_DEBUG
	struct bcm43xx_dfsentry *dfsentry;
#endif
};

/* bcm43xx_(un)lock() protect struct bcm43xx_private.
 * Note that _NO_ MMIO writes are allowed. If you want to
 * write to the device through MMIO in the critical section, use
 * the *_mmio lock functions.
 * MMIO read-access is allowed, though.
 */
#define bcm43xx_lock(bcm, flags)	spin_lock_irqsave(&(bcm)->_lock, flags)
#define bcm43xx_unlock(bcm, flags)	spin_unlock_irqrestore(&(bcm)->_lock, flags)
/* bcm43xx_(un)lock_mmio() protect struct bcm43xx_private and MMIO.
 * MMIO write-access to the device is allowed.
 * All MMIO writes are flushed on unlock, so it is guaranteed to not
 * interfere with other threads writing MMIO registers.
 */
#define bcm43xx_lock_mmio(bcm, flags)	bcm43xx_lock(bcm, flags)
#define bcm43xx_unlock_mmio(bcm, flags)	do { mmiowb(); bcm43xx_unlock(bcm, flags); } while (0)

static inline
struct bcm43xx_private * bcm43xx_priv(struct net_device *dev)
{
	return ieee80211softmac_priv(dev);
}


/* Helper function, which returns a boolean.
 * TRUE, if PIO is used; FALSE, if DMA is used.
 */
#if defined(CONFIG_BCM43XX_DMA) && defined(CONFIG_BCM43XX_PIO)
static inline
int bcm43xx_using_pio(struct bcm43xx_private *bcm)
{
	return bcm->__using_pio;
}
#elif defined(CONFIG_BCM43XX_DMA)
static inline
int bcm43xx_using_pio(struct bcm43xx_private *bcm)
{
	return 0;
}
#elif defined(CONFIG_BCM43XX_PIO)
static inline
int bcm43xx_using_pio(struct bcm43xx_private *bcm)
{
	return 1;
}
#else
# error "Using neither DMA nor PIO? Confused..."
#endif


static inline
int bcm43xx_num_80211_cores(struct bcm43xx_private *bcm)
{
	int i, cnt = 0;

	for (i = 0; i < BCM43xx_MAX_80211_CORES; i++) {
		if (bcm->core_80211[i].flags & BCM43xx_COREFLAG_AVAILABLE)
			cnt++;
	}

	return cnt;
}

/* Are we running in init_board() context? */
static inline
int bcm43xx_is_initializing(struct bcm43xx_private *bcm)
{
	if (bcm->initialized)
		return 0;
	if (bcm->shutting_down)
		return 0;
	return 1;
}

static inline
struct bcm43xx_lopair * bcm43xx_get_lopair(struct bcm43xx_phyinfo *phy,
					   u16 radio_attenuation,
					   u16 baseband_attenuation)
{
	return phy->_lo_pairs + (radio_attenuation + 14 * (baseband_attenuation / 2));
}


static inline
u16 bcm43xx_read16(struct bcm43xx_private *bcm, u16 offset)
{
	return ioread16(bcm->mmio_addr + core_offset(bcm) + offset);
}

static inline
void bcm43xx_write16(struct bcm43xx_private *bcm, u16 offset, u16 value)
{
	iowrite16(value, bcm->mmio_addr + core_offset(bcm) + offset);
}

static inline
u32 bcm43xx_read32(struct bcm43xx_private *bcm, u16 offset)
{
	return ioread32(bcm->mmio_addr + core_offset(bcm) + offset);
}

static inline
void bcm43xx_write32(struct bcm43xx_private *bcm, u16 offset, u32 value)
{
	iowrite32(value, bcm->mmio_addr + core_offset(bcm) + offset);
}

static inline
int bcm43xx_pci_read_config16(struct bcm43xx_private *bcm, int offset, u16 *value)
{
	return pci_read_config_word(bcm->pci_dev, offset, value);
}

static inline
int bcm43xx_pci_read_config32(struct bcm43xx_private *bcm, int offset, u32 *value)
{
	return pci_read_config_dword(bcm->pci_dev, offset, value);
}

static inline
int bcm43xx_pci_write_config16(struct bcm43xx_private *bcm, int offset, u16 value)
{
	return pci_write_config_word(bcm->pci_dev, offset, value);
}

static inline
int bcm43xx_pci_write_config32(struct bcm43xx_private *bcm, int offset, u32 value)
{
	return pci_write_config_dword(bcm->pci_dev, offset, value);
}

/** Limit a value between two limits */
#ifdef limit_value
# undef limit_value
#endif
#define limit_value(value, min, max)  \
	({						\
		typeof(value) __value = (value);	\
	 	typeof(value) __min = (min);		\
	 	typeof(value) __max = (max);		\
	 	if (__value < __min)			\
	 		__value = __min;		\
	 	else if (__value > __max)		\
	 		__value = __max;		\
	 	__value;				\
	})

/** Helpers to print MAC addresses. */
#define BCM43xx_MACFMT		"%02x:%02x:%02x:%02x:%02x:%02x"
#define BCM43xx_MACARG(x)	((u8*)(x))[0], ((u8*)(x))[1], \
				((u8*)(x))[2], ((u8*)(x))[3], \
				((u8*)(x))[4], ((u8*)(x))[5]

#endif /* BCM43xx_H_ */