sync_pci.c

基于TI-EVMDM642的PCI接口驱动开发

/*
 *  Copyright 2003 by Texas Instruments Incorporated.
 *  All rights reserved. Property of Texas Instruments Incorporated.
 *  Restricted rights to use, duplicate or disclose this code are
 *  granted through contract.
 *  
 */
/* "@(#) DDK 1.11.00.00 11-04-03 (ddk-b13)" */
/*
 *  ======== sync_pci.c ========
 * 
 *  PCI Driver Sync Test for for Valley Tech vt1423 board which tests
 *  DSP master transfers. The test repeatly transfers data from dsp memory
 *  to 21555 registers (pci write) and from 21555 registers to dsp memory
 *  (pci read). The data pattern is based on channel number, such as 
 *  0x01010101 or 0x81818181 for channel one, 0x05050505 or 0x85858585 for
 *  channel five. Uses the 21555 Bridge Scratchpad registers (32 bytes)  
 *  
 *  User defines the following parameters:
 *  -- VT1423_PCI_PRIORITY: if defined, tasks will have different priorities
 *  -- CHAN_NUM: Number of channels to be opened
 *  -- TRANSFER_COUNT: bytes to be transfered
 *  -- PCI_ADDR_START: PCI start address 
 *  -- LOG_DATA: if defined, will print the memory read/write data
 *  -- TIMEOUT: timeout if pci driver no response 
 *  -- SLEEP_TIME: task sleep time
 */
#include <std.h>
#include <log.h>
#include <sys.h>
#include <tsk.h>
#include <gio.h>

#include <c64xx_pci.h>   
#include <csl_pci.h>

extern far LOG_Obj trace;

#define LOG_DATA                        

/* User defined constants */
#define VT1423_PCI_PRIORITY

#define CHAN_NUM        4       

#define TRANSFER_COUNT_RAW      (32/CHAN_NUM)
#define TRANSFER_COUNT          (TRANSFER_COUNT_RAW - TRANSFER_COUNT_RAW % 4)  

#define PCI_ADDR_START          0xc00000a8      

#define TIMEOUT         2000 /* SYS_FOREVER */  
#define SLEEP_TIME              2       

static Void chan_tsk(Int chanNum, Int sleep);
#ifdef LOG_DATA
static Void logData(Int chanNum, Ptr reqp, Int status);
#endif
/*Set memory value*/
static Void setMem(int count, Ptr *memAddr, char value);
/*Verify read back data*/
static Void verifyData(Int chanNum, Ptr reqp, char value);

static Ptr gio[CHAN_NUM];


/*
 *  ======== main ========
 */
Void main()
{   
    C64XX_PCI_Attrs pciAttrs[CHAN_NUM];
    TSK_Attrs tskAttrs[CHAN_NUM];
    GIO_Attrs gioAttrs[CHAN_NUM];
    Int i;

    for (i=0; i<CHAN_NUM; i++)
     {
        /* C64XX_PCI_Attrs init */
        /* even numbered Channel used as low priority queue channel */
        if (i % 2 == 0) {  
            pciAttrs[i].queuePriority = C64XX_PCI_QUEUE_PRIORITY_LOW; 
        } else {
            pciAttrs[i].queuePriority = C64XX_PCI_QUEUE_PRIORITY_HIGH;
        }    
            
        /* GIO_Attrs init */
        gioAttrs[i].nPackets = 1;
        gioAttrs[i].timeout = TIMEOUT; 
     }         
    
    /* create GIO objs */
    for (i=0; i<CHAN_NUM; i++) {
        gio[i] = GIO_create("/udevPci", IOM_INOUT, NULL, 
                &pciAttrs[i], &gioAttrs[i]);
        if (gio[i] == NULL) {
            LOG_printf(&trace, "ERROR!!! GIO_create NULL");
            SYS_abort("GIO_create");
        }
    }
    
    /* create tasks */
    for (i=0; i<CHAN_NUM; i++) {
        tskAttrs[i] = TSK_ATTRS;
#ifdef VT1423_PCI_PRIORITY
        tskAttrs[i].priority = 3 + i; 
#endif
        if (TSK_create((Fxn)chan_tsk, &tskAttrs[i], i, SLEEP_TIME) == NULL) {
            LOG_printf(&trace, "ERROR!!! TSK_create NULL!");
        }
    }
     
    
    LOG_printf(&trace, "Exit main\n");  
    /* fall into DSP/BIOS idle loop */
    return;
}

/*
 *  ======== chan_tsk ========
 */
static Void chan_tsk(Int chanNum, Int sleep)
{
    char value;
    Uns size;
    Int status;
    C64XX_PCI_Request   readReq;
    C64XX_PCI_Request   writeReq;
    Ptr dspAddr;
    Bool flip; 
    
    flip = FALSE;
    
    /* allocate dsp memory  for each channel */
    /* dsp address need to be PCI word address, so memory alignment is 4 */ 
    dspAddr = MEM_alloc(0, TRANSFER_COUNT, 4);
    if (dspAddr == NULL) {
        LOG_printf(&trace, "dspAddr alloc NULL");
        SYS_abort("dspAddr NULL");
    }
    
    /* 
     * pci address for each channel is divided, since each channel
     * read/write in different tasks 
     */
    readReq.srcAddr = (char *)PCI_ADDR_START + TRANSFER_COUNT * chanNum;
    readReq.dstAddr = (char *)dspAddr;
    readReq.byteCnt = TRANSFER_COUNT;
    readReq.options = 0;
    readReq.options = \
            C64XX_PCI_SETXFERMODE(readReq.options, PCI_READ_NOPREF);

    writeReq.srcAddr = (char *)dspAddr;
    writeReq.dstAddr = (char *)PCI_ADDR_START + TRANSFER_COUNT * chanNum;
    writeReq.byteCnt = TRANSFER_COUNT;
    writeReq.options = PCI_WRITE;
    writeReq.options = 0;
    writeReq.options = \
            C64XX_PCI_SETXFERMODE(writeReq.options, PCI_WRITE);

    for (;;) {
        if (flip) {
            value = (char)chanNum | 0x80;
            flip = FALSE;
        } else {
            value = (char)chanNum;
            flip = TRUE;
        }
        /* 
           set dsp memory value as chanNum chanNum ...(0x0101.. for Chan1
           or 0x818181.. for Chan1). This is the write value being transfered 
           to pci memory
         */ 
        setMem(TRANSFER_COUNT, writeReq.srcAddr, value);

        /* pci write : dsp->pci */
        status = GIO_write(gio[chanNum], &writeReq, &size);

        if (status < 0) {
            LOG_printf(&trace, "ERR - in GIO_write status c[%d] = %d", 
                    chanNum, status);
        }

#ifdef LOG_DATA
        logData(chanNum, &writeReq, status);
#endif 

        /* set dsp memory to 0x99 as initial value */
        setMem(TRANSFER_COUNT, readReq.dstAddr, 0x99);
        
        /* pci read : pci->dsp. read back the value written */
        status = GIO_read(gio[chanNum], &readReq, &size);
        if (status < 0) {
            LOG_printf(&trace, "ERR - in GIO_read status c[%d] = %d", 
                    chanNum, status);
        }
#ifdef LOG_DATA
        logData(chanNum, &readReq, status);
#endif
       
        /* verify if the read value equals the value written */
        verifyData(chanNum, &readReq, value); 

        TSK_sleep(sleep);
    }  
}

/*
 *  ======== logData ========
 *  print out the read/write memory
 *  Note: only display the first 4 bytes (Uns)
 */
#ifdef LOG_DATA
static Void logData(Int chanNum, Ptr reqp, Int status)
{
    C64XX_PCI_Request *req;
    Uns  *addr; 
    
    req = (C64XX_PCI_Request*)reqp;
    
    /* print out info */
    if (req != NULL) {
        LOG_printf(&trace, "chan[%d], status=%x", chanNum, status);
        
        if (C64XX_PCI_GETXFERMODE(req->options) == PCI_WRITE ) {
            addr = (Uns *)req->srcAddr;
            LOG_printf(&trace, "    sbmt-w: written=%x", *addr);
        } 
        else {
            addr = (Uns *)req->dstAddr;
            LOG_printf(&trace, "    sbmt-r: read=%x", *addr);  
        }
    } 
    else {
        LOG_printf(&trace, "request NULL");    
    } 
}
#endif

/*
 *  ======== setMem ========
 *  Set memory value
 */
static Void setMem(int count, Ptr *memAddr, char value)
{
    char *tempMem = (char *)memAddr;
    int i;
    
    for (i = 0; i < count; i++) {
        *tempMem = value;
        tempMem++;
    }   
}

/*
 *  ======== verifyData ========
 *  Verify read back data 
 */
static Void verifyData(Int chanNum, Ptr reqp, char value)
{
    C64XX_PCI_Request *req;
    char  *addr; 
    Int i;
    
    req = (C64XX_PCI_Request*)reqp;
    
    if (req != NULL) {
       addr = (char *)req->dstAddr;
       for (i = 0; i < req->byteCnt; i++) {
           if (*addr != value) {
               LOG_printf(&trace, "ERROR!!! in verify chan[%d], addr = %x", 
                       chanNum, addr); 
           }
           addr++;
       } 
    } 
}