ctrl_rtl8019_regs.h

基于康草科技中一款SOPC开发板上的8019的以太网驱动程序

/* P0NE.R CNTR1 
 * Frame Alignment Error Tally Counter Register (0DH; Type=R in Page0)
 * */
#define IOADDR_CTRL_RTL8019_CNTR1(base)          __IO_CALC_ADDRESS_NATIVE(base, 0x0e)      
#define IORD_CTRL_RTL8019_CNTR1(base)            IORD(base, 0x0E)
/* P0NE.W DCR */
//#define IOADDR_CTRL_RTL8019_DCR(base)          __IO_CALC_ADDRESS_NATIVE(base, 0x0e)   
#define IOWR_CTRL_RTL8019_DCR(base,data)       IOWR(base, 0x0E, data)

#define CTRL_RTL8019_DCR_WTS_MSK                 0x01        
#define CTRL_RTL8019_DCR_WTS_OFST                0
#define CTRL_RTL8019_DCR_BOS_MSK                 0x02        
#define CTRL_RTL8019_DCR_BOS_OFST                1
#define CTRL_RTL8019_DCR_LAS_MSK                 0x04        
#define CTRL_RTL8019_DCR_LAS_OFST                2
#define CTRL_RTL8019_DCR_LS_MSK                  0x08        
#define CTRL_RTL8019_DCR_LS_OFST                 3
#define CTRL_RTL8019_DCR_ARM_MSK                 0x10        
#define CTRL_RTL8019_DCR_ARM_OFST                4
#define CTRL_RTL8019_DCR_FT0_MSK                 0x20        
#define CTRL_RTL8019_DCR_FT0_OFST                5
#define CTRL_RTL8019_DCR_FT1_MSK                 0x40        
#define CTRL_RTL8019_DCR_FT1_OFST                6

/* P0NF.R CNTR2 
 * CRC Error Tally Counter Register (0EH; Type=R in Page0)
 * */
#define IOADDR_CTRL_RTL8019_CNTR2(base)          __IO_CALC_ADDRESS_NATIVE(base, 0x0F)      
#define IORD_CTRL_RTL8019_CNTR2(base)            IORD(base, 0x0F)
/* P0NF.W IMR */
#define IOADDR_CTRL_RTL8019_IMR(base)          __IO_CALC_ADDRESS_NATIVE(base, 0x0F)   
#define IOWR_CTRL_RTL8019_IMR(base,data)       IOWR(base, 0x0F, data)

#define CTRL_RTL8019_IMR_PRXE_MSK                 0x01        
#define CTRL_RTL8019_IMR_PRXE_OFST                0
#define CTRL_RTL8019_IMR_PTXE_MSK                 0x02        
#define CTRL_RTL8019_IMR_PTXE_OFST                1
#define CTRL_RTL8019_IMR_RXEE_MSK                 0x04        
#define CTRL_RTL8019_IMR_RXEE_OFST                2
#define CTRL_RTL8019_IMR_TXEE_MSK                 0x08        
#define CTRL_RTL8019_IMR_TXEE_OFST                3
#define CTRL_RTL8019_IMR_OVWE_MSK                 0x10        
#define CTRL_RTL8019_IMR_OVWE_OFST                4
#define CTRL_RTL8019_IMR_CNTE_MSK                 0x20        
#define CTRL_RTL8019_IMR_CNTE_OFST                5
#define CTRL_RTL8019_IMR_RDCE_MSK                 0x40        
#define CTRL_RTL8019_IMR_RDCE_OFST                6

/********************************
 * Page 1 register
 *******************************/
/* P1N1.RW PAR0 */
#define IOADDR_CTRL_RTL8019_PAR0(base)          __IO_CALC_ADDRESS_NATIVE(base, 1)      
#define IORD_CTRL_RTL8019_PAR0(base)            IORD(base, 1)
#define IOWR_CTRL_RTL8019_PAR0(base,data)       IOWR(base, 1, data)

/* P1N2.RW PAR1 */
#define IOADDR_CTRL_RTL8019_PAR1(base)          __IO_CALC_ADDRESS_NATIVE(base, 2)      
#define IORD_CTRL_RTL8019_PAR1(base)            IORD(base, 2)
#define IOWR_CTRL_RTL8019_PAR1(base,data)       IOWR(base, 2, data)

/* P1N3.RW PAR2 */
#define IOADDR_CTRL_RTL8019_PAR2(base)          __IO_CALC_ADDRESS_NATIVE(base, 3)      
#define IORD_CTRL_RTL8019_PAR2(base)            IORD(base, 3)
#define IOWR_CTRL_RTL8019_PAR2(base,data)       IOWR(base, 3, data)

/* P1N4.RW PAR3 */
#define IOADDR_CTRL_RTL8019_PAR3(base)          __IO_CALC_ADDRESS_NATIVE(base, 4)      
#define IORD_CTRL_RTL8019_PAR3(base)            IORD(base, 4)
#define IOWR_CTRL_RTL8019_PAR3(base,data)       IOWR(base, 4, data)

/* P1N5.RW PAR4 */
#define IOADDR_CTRL_RTL8019_PAR4(base)          __IO_CALC_ADDRESS_NATIVE(base, 5)      
#define IORD_CTRL_RTL8019_PAR4(base)            IORD(base, 5)
#define IOWR_CTRL_RTL8019_PAR4(base,data)       IOWR(base, 5, data)

/* P1N6.RW PAR5 */
#define IOADDR_CTRL_RTL8019_PAR5(base)          __IO_CALC_ADDRESS_NATIVE(base, 6)      
#define IORD_CTRL_RTL8019_PAR5(base)            IORD(base, 6)
#define IOWR_CTRL_RTL8019_PAR5(base,data)       IOWR(base, 6, data)

/* P1N7.RW CURR */
#define IOADDR_CTRL_RTL8019_CURR(base)          __IO_CALC_ADDRESS_NATIVE(base, 7)      
#define IORD_CTRL_RTL8019_CURR(base)            IORD(base, 7)
#define IOWR_CTRL_RTL8019_CURR(base,data)       IOWR(base, 7, data)

/* P1N8.RW MAR0 */
#define IOADDR_CTRL_RTL8019_MAR0(base)          __IO_CALC_ADDRESS_NATIVE(base, 8)      
#define IORD_CTRL_RTL8019_MAR0(base)            IORD(base, 8)
#define IOWR_CTRL_RTL8019_MAR0(base,data)       IOWR(base, 8, data)

/* P1N9.RW MAR1 */
#define IOADDR_CTRL_RTL8019_MAR1(base)          __IO_CALC_ADDRESS_NATIVE(base, 9)      
#define IORD_CTRL_RTL8019_MAR1(base)            IORD(base, 9)
#define IOWR_CTRL_RTL8019_MAR1(base,data)       IOWR(base, 9, data)

/* P1NA.RW MAR2 */
#define IOADDR_CTRL_RTL8019_MAR2(base)          __IO_CALC_ADDRESS_NATIVE(base, 10)      
#define IORD_CTRL_RTL8019_MAR2(base)            IORD(base, 10)
#define IOWR_CTRL_RTL8019_MAR2(base,data)       IOWR(base, 10, data)

/* P1NB.RW MAR3 */
#define IOADDR_CTRL_RTL8019_MAR3(base)          __IO_CALC_ADDRESS_NATIVE(base, 11)      
#define IORD_CTRL_RTL8019_MAR3(base)            IORD(base, 11)
#define IOWR_CTRL_RTL8019_MAR3(base,data)       IOWR(base, 11, data)

/* P1NC.RW MAR4 */
#define IOADDR_CTRL_RTL8019_MAR4(base)          __IO_CALC_ADDRESS_NATIVE(base, 12)      
#define IORD_CTRL_RTL8019_MAR4(base)            IORD(base, 12)
#define IOWR_CTRL_RTL8019_MAR4(base,data)       IOWR(base, 12, data)

/* P1ND.RW MAR5 */
#define IOADDR_CTRL_RTL8019_MAR5(base)          __IO_CALC_ADDRESS_NATIVE(base, 13)      
#define IORD_CTRL_RTL8019_MAR5(base)            IORD(base, 13)
#define IOWR_CTRL_RTL8019_MAR5(base,data)       IOWR(base, 13, data)

/* P1NE.RW MAR6 */
#define IOADDR_CTRL_RTL8019_MAR6(base)          __IO_CALC_ADDRESS_NATIVE(base, 14)      
#define IORD_CTRL_RTL8019_MAR6(base)            IORD(base, 14)
#define IOWR_CTRL_RTL8019_MAR6(base,data)       IOWR(base, 14, data)

/* P1NF.RW MAR7 */
#define IOADDR_CTRL_RTL8019_MAR7(base)          __IO_CALC_ADDRESS_NATIVE(base, 15)      
#define IORD_CTRL_RTL8019_MAR7(base)            IORD(base, 15)
#define IOWR_CTRL_RTL8019_MAR7(base,data)       IOWR(base, 15, data)

/*******************************
 * Page 2 register
 ******************************/
/* P2N1.R PSTART */
#define IOADDR_CTRL_RTL8019_PSTART(base) __IO_CALC_ADDRESS_NATIVE(base, 1)      
#define IORD_CTRL_RTL8019_PSTART(base) IORD(base, 1)
/* P2N2.R PSTOP */
#define IOADDR_CTRL_RTL8019_PSTOP(base)  __IO_CALC_ADDRESS_NATIVE(base, 2)      
#define IORD_CTRL_RTL8019_PSTOP(base)  IORD(base, 2)
/* P2N4.R TPSR */
#define IOADDR_CTRL_RTL8019_TPSR(base) __IO_CALC_ADDRESS_NATIVE(base, 4)      
#define IORD_CTRL_RTL8019_TPSR(base)   IORD(base, 4)
/* P2NC.R RCR */
//#define IOADDR_CTRL_RTL8019_RCR(base)  __IO_CALC_ADDRESS_NATIVE(base, 12)      
#define IORD_CTRL_RTL8019_RCR(base)    IORD(base, 12)
/* P2ND.R TCR */
//#define IOADDR_CTRL_RTL8019_TCR(base)  __IO_CALC_ADDRESS_NATIVE(base, 13)      
#define IORD_CTRL_RTL8019_TCR(base)    IORD(base, 13)
/* P2NE.R DCR */
#define IOADDR_CTRL_RTL8019_DCR(base)  __IO_CALC_ADDRESS_NATIVE(base, 14)      
#define IORD_CTRL_RTL8019_DCR(base)    IORD(base, 14)
/* P2NF.R IMR */
//#define IOADDR_CTRL_RTL8019_IMR(base)  __IO_CALC_ADDRESS_NATIVE(base, 15)      
#define IORD_CTRL_RTL8019_IMR(base)    IORD(base, 15)

/*******************************
 * Page 3 register
 ******************************/
/* P3N1.RW 9346CR */
#define IOADDR_CTRL_RTL8019_9346CR(base)          __IO_CALC_ADDRESS_NATIVE(base, 1)      
#define IORD_CTRL_RTL8019_9346CR(base)            IORD(base, 1)
#define IOWR_CTRL_RTL8019_9346CR(base,data)       IOWR(base, 1, data)

#define CTRL_RTL8019_9346CR_EEDO_MSK                 0x01        
#define CTRL_RTL8019_9346CR_EEDO_OFST                0
#define CTRL_RTL8019_9346CR_EEDI_MSK                 0x02        
#define CTRL_RTL8019_9346CR_EEDI_OFST                1
#define CTRL_RTL8019_9346CR_EESK_MSK                 0x04        
#define CTRL_RTL8019_9346CR_EESK_OFST                2
#define CTRL_RTL8019_9346CR_EECS_MSK                 0x08        
#define CTRL_RTL8019_9346CR_EECS_OFST                3

#define CTRL_RTL8019_9346CR_EEM0_MSK                 0x40        
#define CTRL_RTL8019_9346CR_EEM0_OFST                6
#define CTRL_RTL8019_9346CR_EEM1_MSK                 0x80        
#define CTRL_RTL8019_9346CR_EEM1_OFST                7


/* P3N2.RW BPAGE */
#define IOADDR_CTRL_RTL8019_BPAGE(base)          __IO_CALC_ADDRESS_NATIVE(base, 2)      
#define IORD_CTRL_RTL8019_BPAGE(base)            IORD(base, 2)
#define IOWR_CTRL_RTL8019_BPAGE(base,data)       IOWR(base, 2, data)

/* P3N3.RW CONFIG0 */
#define IOADDR_CTRL_RTL8019_CONFIG0(base)          __IO_CALC_ADDRESS_NATIVE(base, 3)      
#define IORD_CTRL_RTL8019_CONFIG0(base)            IORD(base, 3)
#define IOWR_CTRL_RTL8019_CONFIG0(base,data)       IOWR(base, 3, data)

#define CTRL_RTL8019_CONFIG0_BNC_MSK     0x04        
#define CTRL_RTL8019_CONFIG0_BNC_OFST    2
#define CTRL_RTL8019_CONFIG0_JP_MSK      0x08        
#define CTRL_RTL8019_CONFIG0_JP_OFST     3
#define CTRL_RTL8019_CONFIG0_PNPJP_MSK   0x10        
#define CTRL_RTL8019_CONFIG0_PNPJP_OFST    4
#define CTRL_RTL8019_CONFIG0_AUI_MSK     0x20        
#define CTRL_RTL8019_CONFIG0_AUI_OFST    5
#define CTRL_RTL8019_CONFIG0_VERID0_MSK    0x40        
#define CTRL_RTL8019_CONFIG0_VERID0_OFST   6
#define CTRL_RTL8019_CONFIG0_VERID1_MSK    0x80        
#define CTRL_RTL8019_CONFIG0_VERID1_OFST   7

/* P3N4.RW CONFIG1 */
#define IOADDR_CTRL_RTL8019_CONFIG1(base)          __IO_CALC_ADDRESS_NATIVE(base, 4)      
#define IORD_CTRL_RTL8019_CONFIG1(base)            IORD(base, 4)
#define IOWR_CTRL_RTL8019_CONFIG1(base,data)       IOWR(base, 4, data)

#define CTRL_RTL8019_CONFIG1_IOS0_MSK    0x01        
#define CTRL_RTL8019_CONFIG1_IOS0_OFST   0
#define CTRL_RTL8019_CONFIG1_IOS1_MSK    0x02        
#define CTRL_RTL8019_CONFIG1_IOS1_OFST   1
#define CTRL_RTL8019_CONFIG1_IOS2_MSK    0x04        
#define CTRL_RTL8019_CONFIG1_IOS2_OFST   2
#define CTRL_RTL8019_CONFIG1_IOS3_MSK    0x08        
#define CTRL_RTL8019_CONFIG1_IOS3_OFST   3
#define CTRL_RTL8019_CONFIG1_IRQS0_MSK   0x10        
#define CTRL_RTL8019_CONFIG1_IRQS0_OFST    4
#define CTRL_RTL8019_CONFIG1_IRQS1_MSK   0x20        
#define CTRL_RTL8019_CONFIG1_IRQS1_OFST    5
#define CTRL_RTL8019_CONFIG1_IRQS2_MSK   0x40        
#define CTRL_RTL8019_CONFIG1_IRQS2_OFST    6
#define CTRL_RTL8019_CONFIG1_IRQEN_MSK   0x80        
#define CTRL_RTL8019_CONFIG1_IRQEN_OFST    7

/* P3N5.RW CONFIG2 */
#define IOADDR_CTRL_RTL8019_CONFIG2(base)          __IO_CALC_ADDRESS_NATIVE(base, 5)      
#define IORD_CTRL_RTL8019_CONFIG2(base)            IORD(base, 5)
#define IOWR_CTRL_RTL8019_CONFIG2(base,data)       IOWR(base, 5, data)

#define CTRL_RTL8019_CONFIG2_BS0_MSK   0x01        
#define CTRL_RTL8019_CONFIG2_BS0_OFST  0
#define CTRL_RTL8019_CONFIG2_BS1_MSK   0x02        
#define CTRL_RTL8019_CONFIG2_BS1_OFST  1
#define CTRL_RTL8019_CONFIG2_BS2_MSK   0x04        
#define CTRL_RTL8019_CONFIG2_BS2_OFST  2
#define CTRL_RTL8019_CONFIG2_BS3_MSK   0x08        
#define CTRL_RTL8019_CONFIG2_BS3_OFST  3
#define CTRL_RTL8019_CONFIG2_BS4_MSK   0x10        
#define CTRL_RTL8019_CONFIG2_BS4_OFST  4
#define CTRL_RTL8019_CONFIG2_BSELB_MSK 0x20        
#define CTRL_RTL8019_CONFIG2_BSELB_OFST  5
#define CTRL_RTL8019_CONFIG2_PL0_MSK   0x40        
#define CTRL_RTL8019_CONFIG2_PL0_OFST  6
#define CTRL_RTL8019_CONFIG2_PL1_MSK   0x80        
#define CTRL_RTL8019_CONFIG2_PL1_OFST  7


/* P3N6.RW CONFIG3 */
#define IOADDR_CTRL_RTL8019_CONFIG3(base)          __IO_CALC_ADDRESS_NATIVE(base, 6)      
#define IORD_CTRL_RTL8019_CONFIG3(base)            IORD(base, 6)
#define IOWR_CTRL_RTL8019_CONFIG3(base,data)       IOWR(base, 6, data)

#define CTRL_RTL8019_CONFIG3_ACTIVEB_MSK 0x01        
#define CTRL_RTL8019_CONFIG3_ACTIVEB_OFST  0
#define CTRL_RTL8019_CONFIG3_PWRDN_MSK 0x02        
#define CTRL_RTL8019_CONFIG3_PWRDN_OFST  1
#define CTRL_RTL8019_CONFIG3_SLEEP_MSK 0x04        
#define CTRL_RTL8019_CONFIG3_SLEEP_OFST  2

#define CTRL_RTL8019_CONFIG3_LEDS0_MSK 0x10        
#define CTRL_RTL8019_CONFIG3_LEDS0_OFST  4
#define CTRL_RTL8019_CONFIG3_LEDS1_MSK 0x20        
#define CTRL_RTL8019_CONFIG3_LEDS1_OFST  5
#define CTRL_RTL8019_CONFIG3_FUDUP_MSK 0x40        
#define CTRL_RTL8019_CONFIG3_FUDUP_OFST  6
#define CTRL_RTL8019_CONFIG3_PNP_MSK   0x80        
#define CTRL_RTL8019_CONFIG3_PNP_OFST  7

/* P3N7.W TEST */
#define IOADDR_CTRL_RTL8019_TEST(base)          __IO_CALC_ADDRESS_NATIVE(base, 7)      
#define IOWR_CTRL_RTL8019_TEST(base,data)       IOWR(base, 7, data)

/* P3N8.RW CSNSAV */
#define IOADDR_CTRL_RTL8019_CSNSAV(base)          __IO_CALC_ADDRESS_NATIVE(base, 8)      
#define IORD_CTRL_RTL8019_CSNSAV(base)            IORD(base, 8)

/* P3N9.RW HLTCLK */
#define IOADDR_CTRL_RTL8019_HLTCLK(base)          __IO_CALC_ADDRESS_NATIVE(base, 9)      
#define IOWR_CTRL_RTL8019_HLTCLK(base,data)       IOWR(base, 9, data)

/* P3NB.R INTR */
#define IOADDR_CTRL_RTL8019_INTR(base)          __IO_CALC_ADDRESS_NATIVE(base, 11)      
#define IORD_CTRL_RTL8019_INTR(base)            IORD(base, 11)

/* P3NC.W FMWP */
#define IOADDR_CTRL_RTL8019_FMWP(base)          __IO_CALC_ADDRESS_NATIVE(base, 12)      
#define IOWR_CTRL_RTL8019_FMWP(base,data)       IOWR(base, 12, data)

/* P3ND.RW CONFIG4 */
#define IOADDR_CTRL_RTL8019_CONFIG4(base)          __IO_CALC_ADDRESS_NATIVE(base, 13)      
#define IORD_CTRL_RTL8019_CONFIG4(base)            IORD(base, 13)
#define IOWR_CTRL_RTL8019_CONFIG4(base,data)       IOWR(base, 13, data)

#define CTRL_RTL8019_CONFIG3_IOMS_MSK  0x01        
#define CTRL_RTL8019_CONFIG3_IOMS_OFST 0

#endif //_CTRL_RTL8019_REGS_H_