lcdlibh.txt

三星2410源代码

#ifndef __LCDLIB_H__
#define __LCDLIB_H__

//TFT LCD Panel(320*240)
#define MODE_TFT_24BIT_320240    (0x4104)
//TFT 320240
#define LCD_XSIZE_TFT_320240 	(320)	
#define LCD_YSIZE_TFT_320240 	(240)
//TFT 320240
#define SCR_XSIZE_TFT_320240 	(LCD_XSIZE_TFT_320240*2)
#define SCR_YSIZE_TFT_320240 	(LCD_YSIZE_TFT_320240*2)
//TFT320240
#define HOZVAL_TFT_320240	(LCD_XSIZE_TFT_320240-1)
#define LINEVAL_TFT_320240	(LCD_YSIZE_TFT_320240-1)


#define VBPD_320240		((19-1)&0xff)
#define VFPD_320240		((5-1)&0xff)
#define VSPW_320240	((4-1) &0x3f)

#define HBPD_320240		((75-1)&0x7f)
#define HFPD_320240		((7-1)&0xff)

#define HSPW_320240		((31-1)&0xff)

#define MVAL		(13)
#define MVAL_USED 	(0)
#define M5D(n) ((n) & 0x1fffff)	// To get lower 21bits

#define CLKVAL_TFT_320240	(4) 	
#define CLKVAL_TFT_800480	(1) 	

// 60hz @50Mhz+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-620
    //VSYNC,HSYNC should be inverted
    //HBPD=6VCLK,HFPD=2VCLK,HSPW=3VCLK
    //VBPD=1HSYNC,VFPD=2HSYNC,VSPW=1HSYNC
    
#define LCDFRAMEBUFFER 0x30400000//_NONCACHE_STARTADDRESS 
    // 1. The LCD frame buffer should be write-through or non-cachable.
    // 2. The total frame memory should be inside 4MB.
    // 3. To meet above 2 conditions, the frame buffer should be 
    // inside the following regions.
    // 0x31000000~0x313ffffff,
    // 0x31400000~0x317ffffff, 0
    // 0x31800000~0x31bffffff,
    //        .....    
    // 0x33800000~0x33bffffff     
    //TFT 320240
extern U32 (*frameBuffer24BitTft320240)[SCR_XSIZE_TFT_320240];
extern U32 LCDBASEU;


#define PAGEWIDTH	LCD_XSIZE_TFT_320240
#define OFFSIZE		240

#define DOMAIN_FAULT	(0x0)
#define DOMAIN_CHK	(0x1) 
#define DOMAIN_NOTCHK	(0x3) 
#define DOMAIN0		(0x0<<5)
#define DOMAIN1		(0x1<<5)

#define DOMAIN0_ATTR	(DOMAIN_CHK<<0) 
#define DOMAIN1_ATTR	(DOMAIN_FAULT<<2) 

#define RW_CB		(AP_RW|DOMAIN0|CB|DESC_SEC)
#define RW_CNB		(AP_RW|DOMAIN0|CNB|DESC_SEC)
#define RW_NCNB		(AP_RW|DOMAIN0|NCNB|DESC_SEC)
#define RW_FAULT	(AP_RW|DOMAIN1|NCNB|DESC_SEC)

#define _RAM_STARTADDRESS       0x30000000

extern void MMU_EnableICache(void);
extern void MMU_DisableICache(void);
extern void MMU_EnableDCache(void);
extern void MMU_DisableDCache(void);
extern void MMU_EnableAlignFault(void);

extern void MMU_EnableMMU(void);
extern void MMU_DisableMMU(void);
extern void MMU_SetTTBase(U32 base);
extern void MMU_SetDomain(U32 domain);


extern void MMU_InvalidateIDCache(void);
extern void MMU_InvalidateICache(void);

extern void MMU_InvalidateDCache(void);

extern void MMU_CleanDCacheIndex(U32 index);
extern void MMU_CleanInvalidateDCacheIndex(U32 index); 
extern void MMU_WaitForInterrupt(void);
        
extern void MMU_InvalidateTLB(void);

extern void MMU_SetProcessId(U32 pid);

void Lcd_Init(void);
void Lcd_Port_Init(void);
void Lcd_Port_Return(void);

void MoveViewPort(void);
void Lcd_CstnOnOff(int onoff);
void Lcd_EnvidOnOff(int onoff);
void Lcd_PowerEnable(int invpwren,int pwren);
void Lcd_MoveViewPort(int vx,int vy);
void Lcd_Lpc3600Enable(void);
void Lcd_Lpc3600Disable(void);

void Delay(unsigned int x);

void Uart_Init(void);
void Uart_Send(char *pt);
char Uart_Getch(void);
void Uart_Printf(char *fmt,...);

#endif /*__LCDLIB_H__*/