📄 dbmeeprm.c
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/*****************************************************************************
FILE NAME: dbmeeprm.c
DESCRIPTION:
This file contains the Data Base Manager (DBM) EEPROM routines.
The DBM maintains a data base in an EEPROM memory so that the
data can survive across a power down.
PROCEDURES IN THIS SOURCE FILE:
Global Procedures
-------------------
DbmInitEeprom
DbmClearEepromDbMsg
DbmReadEepromDbMsg
DbmWriteEepromDbMsg
DbmCacheEepromDbMsg
DbmFlushEepromDbMsg
Local Procedures
-------------------
ReadEeprom
WriteEeprom
SetDbPointers
SetDbChanged
CheckDbChanged
CacheDb
Copyright (c) 1998 - 2002 LSI Logic. All rights reserved. LSI Confidential information.
Copyright (c) 2002, VIA Technologies, Inc.
*****************************************************************************/
#include "dbmapi.h"
#include "dbmdefs.h"
#include "dbmerrs.h"
#include "exeapi.h"
#include "hwddefs.h"
#include "hwdapi.h"
#include "hwdi2c.h"
#include "monapi.h"
#include "sysdefs.h"
#include "sysapi.h"
/*------------------------------------------------------------------------
* Define constants used in this file
*------------------------------------------------------------------------*/
#define CACHE_OK 0
#define CACHE_CHANGED 1
#define EEPROM_READ_TIMEOUT 300 /* msec */
#define EEPROM_WRITE_TIMEOUT 10 /* msec */
#define EEPROM_RD_DONE_SIGNAL EXE_SIGNAL_1
/*-----------------------------------------------------
* Define data base 2 (RF EEPROM device) constants
*-----------------------------------------------------*/
/* Define data base Constants. These constants must be updated
when adding new segments to the data base */
/* Define total data base size and changed array size */
#define DB_TOTAL_SIZE DBM_HWD_AFC_PARMS + DBM_HWD_PCS_TXAGC_SIZE + \
DBM_HWD_PCS_TXAGC_FREQ_ADJ_SIZE + DBM_HWD_PCS_TXAGC_TEMP_ADJ_SIZE + \
DBM_HWD_PCS_TX_LIM_FREQ_ADJ_SIZE + DBM_HWD_PCS_TX_PWR_DET_ADJ_SIZE + \
DBM_HWD_PCS_RXAGC_SIZE + DBM_HWD_PCS_RXAGC_FREQ_ADJ_SIZE + \
DBM_HWD_PCS_RXAGC_TEMP_ADJ_SIZE + DBM_HWD_CELL_TXAGC_SIZE + \
DBM_HWD_CELL_TXAGC_FREQ_ADJ_SIZE + DBM_HWD_CELL_TXAGC_TEMP_ADJ_SIZE + \
DBM_HWD_CELL_TX_LIM_FREQ_ADJ_SIZE + DBM_HWD_CELL_TX_PWR_DET_ADJ_SIZE + \
DBM_HWD_CELL_RXAGC_SIZE + DBM_HWD_CELL_RXAGC_FREQ_ADJ_SIZE + \
DBM_HWD_CELL_RXAGC_TEMP_ADJ_SIZE + DBM_L1D_BB_AMPS_SIZE + \
DBM_L1D_DSPV_AMPS_SIZE + DBM_HWD_RF_AMPS_SIZE
/* Define data base for bit mapped changed indicator */
#define DB_CHANGED_SIZE (DB_TOTAL_SIZE >> 3) + 1
/* Define segment index into data base array */
#define AFC_PARMS_INDEX 0
#define PCS_TXAGC_INDEX AFC_PARMS_INDEX + DBM_HWD_AFC_PARMS_SIZE
#define PCS_TXAGC_FREQ_ADJ_INDEX PCS_TXAGC_INDEX + DBM_HWD_PCS_TXAGC_SIZE
#define PCS_TXAGC_TEMP_ADJ_INDEX PCS_TXAGC_FREQ_ADJ_INDEX + DBM_HWD_PCS_TXAGC_FREQ_ADJ_SIZE
#define PCS_TX_LIM_FREQ_ADJ_INDEX PCS_TXAGC_TEMP_ADJ_INDEX + DBM_HWD_PCS_TXAGC_TEMP_ADJ_SIZE
#define PCS_TX_PWR_DET_ADJ_INDEX PCS_TX_LIM_FREQ_ADJ_INDEX + DBM_HWD_PCS_TX_LIM_FREQ_ADJ_SIZE
#define PCS_RXAGC_INDEX PCS_TX_PWR_DET_ADJ_INDEX + DBM_HWD_PCS_TX_PWR_DET_ADJ_SIZE
#define PCS_RXAGC_FREQ_ADJ_INDEX PCS_RXAGC_INDEX + DBM_HWD_PCS_RXAGC_SIZE
#define PCS_RXAGC_TEMP_ADJ_INDEX PCS_RXAGC_FREQ_ADJ_INDEX + DBM_HWD_PCS_RXAGC_FREQ_ADJ_SIZE
#define CELL_TXAGC_INDEX PCS_RXAGC_TEMP_ADJ_INDEX + DBM_HWD_PCS_RXAGC_TEMP_ADJ_SIZE
#define CELL_TXAGC_FREQ_ADJ_INDEX CELL_TXAGC_INDEX + DBM_HWD_CELL_TXAGC_SIZE
#define CELL_TXAGC_TEMP_ADJ_INDEX CELL_TXAGC_FREQ_ADJ_INDEX + DBM_HWD_CELL_TXAGC_FREQ_ADJ_SIZE
#define CELL_TX_LIM_FREQ_ADJ_INDEX CELL_TXAGC_TEMP_ADJ_INDEX + DBM_HWD_CELL_TXAGC_TEMP_ADJ_SIZE
#define CELL_TX_PWR_DET_ADJ_INDEX CELL_TX_LIM_FREQ_ADJ_INDEX + DBM_HWD_CELL_TX_LIM_FREQ_ADJ_SIZE
#define CELL_RXAGC_INDEX CELL_TX_PWR_DET_ADJ_INDEX + DBM_HWD_CELL_TX_PWR_DET_ADJ_SIZE
#define CELL_RXAGC_FREQ_ADJ_INDEX CELL_RXAGC_INDEX + DBM_HWD_CELL_RXAGC_SIZE
#define CELL_RXAGC_TEMP_ADJ_INDEX CELL_RXAGC_FREQ_ADJ_INDEX + DBM_HWD_CELL_RXAGC_FREQ_ADJ_SIZE
#define BB_AMPS_INDEX CELL_RXAGC_TEMP_ADJ_INDEX + DBM_HWD_CELL_RXAGC_TEMP_ADJ_SIZE
#define DSPV_AMPS_INDEX BB_AMPS_INDEX + DBM_L1D_BB_AMPS_SIZE
#define RF_AMPS_INDEX DSPV_AMPS_INDEX + DBM_L1D_DSPV_AMPS_SIZE
/*-------------------------------------------------------
* Define data base 2 (RF EEPROM device) local variables
*-------------------------------------------------------*/
/* Define data base Constants. These constants must be updated
when adding new segments to the data base */
/* Define segment length array */
static const uint16 SegLength[] =
{
DBM_HWD_AFC_PARMS_SIZE,
DBM_HWD_PCS_TXAGC_SIZE,
DBM_HWD_PCS_TXAGC_FREQ_ADJ_SIZE,
DBM_HWD_PCS_TXAGC_TEMP_ADJ_SIZE,
DBM_HWD_PCS_TX_LIM_FREQ_ADJ_SIZE,
DBM_HWD_PCS_TX_PWR_DET_ADJ_SIZE,
DBM_HWD_PCS_RXAGC_SIZE,
DBM_HWD_PCS_RXAGC_FREQ_ADJ_SIZE,
DBM_HWD_PCS_RXAGC_TEMP_ADJ_SIZE,
DBM_HWD_CELL_TXAGC_SIZE,
DBM_HWD_CELL_TXAGC_FREQ_ADJ_SIZE,
DBM_HWD_CELL_TXAGC_TEMP_ADJ_SIZE,
DBM_HWD_CELL_TX_LIM_FREQ_ADJ_SIZE,
DBM_HWD_CELL_TX_PWR_DET_ADJ_SIZE,
DBM_HWD_CELL_RXAGC_SIZE,
DBM_HWD_CELL_RXAGC_FREQ_ADJ_SIZE,
DBM_HWD_CELL_RXAGC_TEMP_ADJ_SIZE,
DBM_L1D_BB_AMPS_SIZE,
DBM_L1D_DSPV_AMPS_SIZE,
DBM_HWD_RF_AMPS_SIZE,
};
static const uint16 SegIndex[] =
{
AFC_PARMS_INDEX,
PCS_TXAGC_INDEX,
PCS_TXAGC_FREQ_ADJ_INDEX,
PCS_TXAGC_TEMP_ADJ_INDEX,
PCS_TX_LIM_FREQ_ADJ_INDEX,
PCS_TX_PWR_DET_ADJ_INDEX,
PCS_RXAGC_INDEX,
PCS_RXAGC_FREQ_ADJ_INDEX,
PCS_RXAGC_TEMP_ADJ_INDEX,
CELL_TXAGC_INDEX,
CELL_TXAGC_FREQ_ADJ_INDEX,
CELL_TXAGC_TEMP_ADJ_INDEX,
CELL_TX_LIM_FREQ_ADJ_INDEX,
CELL_TX_PWR_DET_ADJ_INDEX,
CELL_RXAGC_INDEX,
CELL_RXAGC_FREQ_ADJ_INDEX,
CELL_RXAGC_TEMP_ADJ_INDEX,
BB_AMPS_INDEX,
DSPV_AMPS_INDEX,
RF_AMPS_INDEX,
};
/*---------------------------------------------------------------
* Declare global data for this file
*----------------------------------------------------------------*/
static const uint16 *SegIndexP; /* Define seg index data ptr */
static const uint16 *SegLengthP; /* Define seg length data ptr */
static uint8 *DataBaseP; /* Define data base ptr */
static uint8 *DbChangedP; /* Define data base Changed ptr */
static uint16 DbTotalSize; /* Define data base total array size */
static uint16 DbChangedSize; /* Define data base changed array size */
static uint16 DbMaxSeg; /* Define data base max segment # */
static uint16 DeviceNum; /* Define I2C device number specifier */
static bool DbCached; /* Define Data Base chcahed flag */
static uint8 DataBase[DB_TOTAL_SIZE]; /* Define data base storage */
static uint8 DbChanged[DB_CHANGED_SIZE]; /* Define data base changed indicator */
/*---------------------------------------------------------------
* Declare function prototypes for local routines in this file
*----------------------------------------------------------------*/
static void CacheDb(void);
static void SetDbPointers(void);
static bool CheckDbChanged(uint32 Address);
static void SetDbChanged(uint32 Address, uint32 Action);
static bool WriteEeprom(uint32 Address, uint8* DataPtr, DbmDataBaseIdT DataBaseId);
static bool ReadEeprom(uint32 Address, uint8* DataPtr, uint16 NumBytes, DbmDataBaseIdT DataBaseId);
/*****************************************************************************
FUNCTION NAME: DbmInitEeprom
DESCRIPTION:
This routine handles eeprom DBM initialization.
PARAMETERS:
None
RETURNED VALUES:
None
*****************************************************************************/
void DbmInitEeprom(void)
{
/* Init I2C interface */
HwdI2cCreateResource();
/* Set data base cached indicator to false */
DbCached = FALSE;
/* Cache the RF RAM data base from the EEPROM */
CacheDb();
/* Set data base cached indicator for RF DB to TRUE so we can
use DB cache even if RF EEPROM not present */
DbCached = TRUE;
}
/*****************************************************************************
FUNCTION NAME: DbmClearEepromDbMsg
DESCRIPTION:
This routine handles the clear data base message. When this message
is received the RAM data base is cleared by setting all segments in the
data base to zero. Then the entire RAM data base is written to the
EEPROM.
PARAMETERS:
None
RETURNED VALUES:
None
*****************************************************************************/
void DbmClearEepromDbMsg(void *MsgDataP)
{
DbmClearMsgT *RxMsgP;
uint32 Index;
/* Cast pointer to clear command struct */
RxMsgP = (DbmClearMsgT *) MsgDataP;
/* Set DB pointers and constants */
SetDbPointers();
/* Clear data base array and data base changed array */
SysMemset(DataBaseP, 0, DbTotalSize);
SysMemset(DbChangedP, CACHE_OK, DbChangedSize);
/* Write the entire zeroed RAM data base to the EEPROM.
If error is true then return at once */
for (Index = 0; Index < DbTotalSize; Index++)
{
if (WriteEeprom(Index, DataBaseP + Index, RxMsgP->DataBaseId))
return;
}
/* Send response message back to sended of clear command */
ExeMsgSend(RxMsgP->RspInfo.TaskId, RxMsgP->RspInfo.MailboxId,
RxMsgP->RspInfo.MsgId, NULL, 0);
}
/*****************************************************************************
FUNCTION NAME: DbmReadEepromDbMsg
DESCRIPTION:
This routine handles the read data base message. When this message
is received data are read from the RAM data base. Data is stored in
segments and this routine creates a data base address from a
segment and offset. Then the amount of data specified in the
command is read from the RAM data base address.
PARAMETERS:
None
RETURNED VALUES:
None
*****************************************************************************/
void DbmReadEepromDbMsg(void *MsgDataP)
{
DbmReadMsgT *RxMsgP;
DbmReadRspMsgT *RspMsgP = NULL;
uint32 Address;
uint32 Index;
uint32 MsgSize = 0;
/* Cast pointer to read command struct */
RxMsgP = (DbmReadMsgT *) MsgDataP;
/* Set DB pointers and constants */
SetDbPointers();
/* Check if the RAM data base has been cached */
if (!DbCached)
{
MonFault(MON_DBM_FAULT_UNIT, DBM_NOT_CACHED_ERR, 0, MON_CONTINUE);
goto exit;
}
/* Range check DB segment address for read */
if (RxMsgP->Address.Segment >= DbMaxSeg)
{
MonFault(MON_DBM_FAULT_UNIT, DBM_SEG_NUM_ERR, RxMsgP->Address.Segment,
MON_CONTINUE);
goto exit;
}
/* Range check DB segment size for read */
if ((RxMsgP->Address.Offset + RxMsgP->NumBytes) >
(SegLengthP[RxMsgP->Address.Segment]))
{
MonFault(MON_DBM_FAULT_UNIT, DBM_SEG_SIZE_ERR, 0, MON_CONTINUE);
goto exit;
}
/* Calculate DB address from segment and offset in Rx message */
Address = SegIndexP[RxMsgP->Address.Segment] + RxMsgP->Address.Offset;
/* Calculate rsponse msg size */
MsgSize = sizeof(DbmReadRspMsgT) + RxMsgP->NumBytes - sizeof(RspMsgP->Data);
/* Allocate memory for response message */
RspMsgP = (DbmReadRspMsgT *) ExeMsgBufferGet(MsgSize);
/* Fill in response message length, address and size fields */
RspMsgP->DataBaseId = RxMsgP->DataBaseId;
RspMsgP->Address = RxMsgP->Address;
RspMsgP->NumBytes = RxMsgP->NumBytes;
/* Read DB and fill in response message data */
for (Index = 0; Index < RxMsgP->NumBytes; Index++)
RspMsgP->Data[Index] = DataBaseP[Index + Address];
/* Send response message back to sended of read command */
ExeMsgSend(RxMsgP->RspInfo.TaskId, RxMsgP->RspInfo.MailboxId,
RxMsgP->RspInfo.MsgId, (void *) RspMsgP, MsgSize);
exit:;
}
/*****************************************************************************
FUNCTION NAME: DbmWriteEepromDbMsg
DESCRIPTION:
This routine handles the write data base message. When this
message is received data from the message is written to the RAM
data base and/or the EEPROM if the write thru flag is set. Data
is stored in segments and this routine creates a data base address
from a segment and offset. Then the amount of data specified in the
command is written to the data base address.
PARAMETERS:
None
RETURNED VALUES:
None
*****************************************************************************/
void DbmWriteEepromDbMsg(void *MsgDataP)
{
DbmWriteMsgT *RxMsgP;
DbmWriteRspMsgT *RspMsgP = NULL;
uint32 Address;
uint32 Index;
/* Cast pointer to write command struct */
RxMsgP = (DbmWriteMsgT *) MsgDataP;
/* Set DB pointers and constants */
SetDbPointers();
/* Check if the RAM data base has been cached */
if (!DbCached)
{
MonFault(MON_DBM_FAULT_UNIT, DBM_NOT_CACHED_ERR, 0, MON_CONTINUE);
goto exit;
}
/* Range check DB segment address for write */
if (RxMsgP->Address.Segment >= DbMaxSeg)
{
MonFault(MON_DBM_FAULT_UNIT, DBM_SEG_NUM_ERR, RxMsgP->Address.Segment,
MON_CONTINUE);
goto exit;
}
/* Range check DB segment size for write */
if ((RxMsgP->Address.Offset + RxMsgP->NumBytes) >
(SegLengthP[RxMsgP->Address.Segment]))
{
MonFault(MON_DBM_FAULT_UNIT, DBM_SEG_SIZE_ERR, 0, MON_CONTINUE);
goto exit;
}
/* Calculate DB address from segment and offset */
Address = SegIndexP[RxMsgP->Address.Segment] + RxMsgP->Address.Offset;
/* Read data from message and write to RAM cache data base and/or
EEPROM if write thur is enabled */
for (Index = 0; Index < RxMsgP->NumBytes; Index++)
{
/* Update the RAM cache data base and cache changed info to changed */
DataBaseP[Index + Address] = RxMsgP->Data[Index];
SetDbChanged(Index + Address, CACHE_CHANGED);
/* If write thru enabled write to actual EEPROM. If error is true then
return at once */
if (RxMsgP->WriteThru)
{
if (WriteEeprom(Index + Address, DataBaseP + Index + Address, RxMsgP->DataBaseId))
goto exit;
/* Write to EEPROM finished so set cache changed info back to OK */
SetDbChanged(Index + Address, CACHE_OK);
}
}
/* Allocate memory for response message */
RspMsgP = (DbmWriteRspMsgT *) ExeMsgBufferGet(sizeof(DbmWriteRspMsgT));
/* Fill in response message field */
RspMsgP->DataBaseId = RxMsgP->DataBaseId;
/* Send response message back to sended of write command */
ExeMsgSend(RxMsgP->RspInfo.TaskId, RxMsgP->RspInfo.MailboxId,
RxMsgP->RspInfo.MsgId, (void *) RspMsgP, sizeof(DbmWriteRspMsgT));
exit:;
}
/*****************************************************************************
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