donotwarmemptypot_test.cpp

来自「含有uml的多个实例及实例的java源码。」· C++ 代码 · 共 455 行

// {{{RME classifier 'Logical View::TestHarnesses::MarkI_Tests::Scenarios_MarkI::DoNotWarmEmptyPot_Test'

#if defined( PRAGMA ) && ! defined( PRAGMA_IMPLEMENTED )
#pragma implementation "rtg/DoNotWarmEmptyPot_Test.h"
#endif

#include <RTSystem/AutoTestMarkI_x86VisualCpp60.h>
#include <rtg/DoNotWarmEmptyPot_Test.h>
#include <rtg/Boiler.h>
#include <rtg/BrewButton.h>
#include <rtg/IndicatorLight.h>
#include <rtg/ReliefValve.h>
#include <rtg/Warmer.h>

// {{{RME tool 'OT::Cpp' property 'ImplementationPreface'
// {{{USR

// }}}USR
// }}}RME

static const RTRelayDescriptor rtg_relays[] =
{
	{
		"reliefValve"
	  , &ReliefValve::Base::rt_class
	  , 1 // cardinality
	}
  , {
		"boiler"
	  , &Boiler::Base::rt_class
	  , 1 // cardinality
	}
  , {
		"brewButton"
	  , &BrewButton::Base::rt_class
	  , 1 // cardinality
	}
  , {
		"warmer"
	  , &Warmer::Base::rt_class
	  , 1 // cardinality
	}
  , {
		"indicatorLight"
	  , &IndicatorLight::Base::rt_class
	  , 1 // cardinality
	}
  , {
		"testResults"
	  , &TestResults::Base::rt_class
	  , 1 // cardinality
	}
};

static RTActor * new_DoNotWarmEmptyPot_Test_Actor( RTController * _rts, RTActorRef * _ref )
{
	return new DoNotWarmEmptyPot_Test_Actor( _rts, _ref );
}

const RTActorClass DoNotWarmEmptyPot_Test =
{
	&MarkI_TestContainer
  , "DoNotWarmEmptyPot_Test"
  , (RTVersionId)0
  , 6
  , rtg_relays
  , new_DoNotWarmEmptyPot_Test_Actor
};

static const char * const rtg_state_names[] =
{
	"TOP"
  , "WaitForStart"
  , "WaitForWarmer"
  , "fail"
};

#define SUPER MarkI_TestContainer_Actor

DoNotWarmEmptyPot_Test_Actor::DoNotWarmEmptyPot_Test_Actor( RTController * rtg_rts, RTActorRef * rtg_ref )
	: MarkI_TestContainer_Actor( rtg_rts, rtg_ref )
{
}

DoNotWarmEmptyPot_Test_Actor::~DoNotWarmEmptyPot_Test_Actor( void )
{
}

int DoNotWarmEmptyPot_Test_Actor::_followInV( RTBindingEnd & rtg_end, int rtg_portId, int rtg_repIndex )
{
	switch( rtg_portId )
	{
	case 0:
		// reliefValve
		if( rtg_repIndex < 1 )
		{
			// t_reliefValve
			rtg_end.port = &t_reliefValve;
			rtg_end.index = rtg_repIndex;
			return 1;
		}
		break;
	case 1:
		// boiler
		if( rtg_repIndex < 1 )
		{
			// t_boiler
			rtg_end.port = &t_boiler;
			rtg_end.index = rtg_repIndex;
			return 1;
		}
		break;
	case 2:
		// brewButton
		if( rtg_repIndex < 1 )
		{
			// t_brewButton
			rtg_end.port = &t_brewButton;
			rtg_end.index = rtg_repIndex;
			return 1;
		}
		break;
	case 3:
		// warmer
		if( rtg_repIndex < 1 )
		{
			// t_warmer
			rtg_end.port = &t_warmer;
			rtg_end.index = rtg_repIndex;
			return 1;
		}
		break;
	case 4:
		// indicatorLight
		if( rtg_repIndex < 1 )
		{
			// t_indicatorLight
			rtg_end.port = &t_indicatorLight;
			rtg_end.index = rtg_repIndex;
			return 1;
		}
		break;
	case 5:
		// testResults
		if( rtg_repIndex < 1 )
		{
			rtg_end.port = &testResults;
			rtg_end.index = rtg_repIndex;
			return 1;
		}
		break;
	default:
		break;
	}
	return MarkI_TestContainer_Actor::_followInV( rtg_end, rtg_portId, rtg_repIndex );
}

// {{{RME transition ':TOP:Junction1:timeout'
#define SUPERMETHOD MarkI_TestContainer_Actor::transition1_timeout
#define CALLSUPER MarkI_TestContainer_Actor::transition1_timeout( rtdata, rtport )
INLINE_METHODS void DoNotWarmEmptyPot_Test_Actor::transition1_timeout( const void * rtdata, Timing::Base * rtport )
{
	// {{{USR
	testResults.success().send();

	// }}}USR
}
#undef SUPERMETHOD
#undef CALLSUPER
// }}}RME

// {{{RME transition ':TOP:WaitForStart:Junction2:put_empty_pot'
#define SUPERMETHOD MarkI_TestContainer_Actor::transition3_put_empty_pot
#define CALLSUPER MarkI_TestContainer_Actor::transition3_put_empty_pot( rtdata, rtport )
INLINE_METHODS void DoNotWarmEmptyPot_Test_Actor::transition3_put_empty_pot( const void * rtdata, TestResults::Base * rtport )
{
	// {{{USR
	timer.informIn( RTTimespec( 2,0 ) );

	t_warmer.potEmpty().send();

	// }}}USR
}
#undef SUPERMETHOD
#undef CALLSUPER
// }}}RME

INLINE_CHAINS void DoNotWarmEmptyPot_Test_Actor::chain2_Initial( void )
{
	// transition ':TOP:Initial:Initial'
	rtgChainBegin( 1, "Initial" );
	rtgTransitionBegin();
	rtgTransitionEnd();
	enterState( 2 );
}

INLINE_CHAINS void DoNotWarmEmptyPot_Test_Actor::chain1_timeout( void )
{
	// transition ':TOP:Junction1:timeout'
	rtgChainBegin( 1, "timeout" );
	exitToChainState( 1, rtg_parent_state );
	rtgTransitionBegin();
	transition1_timeout( msg->data, (Timing::Base *)msg->sap() );
	rtgTransitionEnd();
	processHistory();
}

INLINE_CHAINS void DoNotWarmEmptyPot_Test_Actor::chain3_put_empty_pot( void )
{
	// transition ':TOP:WaitForStart:Junction2:put_empty_pot'
	rtgChainBegin( 2, "put_empty_pot" );
	exitState( rtg_parent_state );
	rtgTransitionBegin();
	transition3_put_empty_pot( msg->data, (TestResults::Base *)msg->sap() );
	rtgTransitionEnd();
	enterState( 3 );
}

INLINE_CHAINS void DoNotWarmEmptyPot_Test_Actor::chain4_warmer_goes_on( void )
{
	// transition ':TOP:WaitForWarmer:Junction2:warmer_goes_on'
	rtgChainBegin( 3, "warmer_goes_on" );
	exitState( rtg_parent_state );
	rtgTransitionBegin();
	rtgTransitionEnd();
	enterState( 4 );
}

void DoNotWarmEmptyPot_Test_Actor::rtsBehavior( int signalIndex, int portIndex )
{
	for( int stateIndex = getCurrentState(); ; stateIndex = rtg_parent_state[ stateIndex - 1 ] )
		switch( stateIndex )
		{
		case 1:
			// {{{RME state ':TOP'
			switch( portIndex )
			{
			case 0:
				switch( signalIndex )
				{
				case 1:
					chain2_Initial();
					return;
				default:
					break;
				}
				break;
			case 12:
				// {{{RME classifier 'Logical View::TestHarnesses::MarkI_Tests::MarkI_TestContainer' port 'timer'
				switch( signalIndex )
				{
				case Timing::Base::rti_timeout:
					chain1_timeout();
					return;
				default:
					break;
				}
				break;
				// }}}RME
			default:
				break;
			}
			unexpectedMessage();
			return;
			// }}}RME
		case 2:
			// {{{RME state ':TOP:WaitForStart'
			switch( portIndex )
			{
			case 0:
				switch( signalIndex )
				{
				case 1:
					return;
				default:
					break;
				}
				break;
			case 6:
				// {{{RME classifier 'Logical View::TestHarnesses::MarkI_Tests::MarkI_TestContainer' port 'testResults'
				switch( signalIndex )
				{
				case TestResults::Base::rti_start:
					chain3_put_empty_pot();
					return;
				default:
					break;
				}
				break;
				// }}}RME
			default:
				break;
			}
			break;
			// }}}RME
		case 3:
			// {{{RME state ':TOP:WaitForWarmer'
			switch( portIndex )
			{
			case 0:
				switch( signalIndex )
				{
				case 1:
					return;
				default:
					break;
				}
				break;
			case 11:
				// {{{RME classifier 'Logical View::TestHarnesses::MarkI_Tests::MarkI_TestContainer' port 't_warmer'
				switch( signalIndex )
				{
				case Warmer::Base::rti_warmerOn:
					chain4_warmer_goes_on();
					return;
				default:
					break;
				}
				break;
				// }}}RME
			default:
				break;
			}
			break;
			// }}}RME
		case 4:
			// {{{RME state ':TOP:fail'
			switch( portIndex )
			{
			case 0:
				switch( signalIndex )
				{
				case 1:
					return;
				default:
					break;
				}
				break;
			default:
				break;
			}
			break;
			// }}}RME
		default:
			unexpectedState();
			return;
		}
}

const RTActor_class * DoNotWarmEmptyPot_Test_Actor::getActorData( void ) const
{
	return &DoNotWarmEmptyPot_Test_Actor::rtg_class;
}

const RTActor_class DoNotWarmEmptyPot_Test_Actor::rtg_class =
{
	&MarkI_TestContainer_Actor::rtg_class
  , rtg_state_names
  , 4
  , DoNotWarmEmptyPot_Test_Actor::rtg_parent_state
  , &DoNotWarmEmptyPot_Test
  , 0
  , (const RTComponentDescriptor *)0
  , 7
  , DoNotWarmEmptyPot_Test_Actor::rtg_ports
  , 0
  , (const RTLocalBindingDescriptor *)0
  , 0
  , (const RTFieldDescriptor *)0
};

const RTStateId DoNotWarmEmptyPot_Test_Actor::rtg_parent_state[] =
{
	0
  , 1
  , 1
  , 1
};

const RTPortDescriptor DoNotWarmEmptyPot_Test_Actor::rtg_ports[] =
{
	{
		"testResults"
	  , (const char *)0
	  , &TestResults::Base::rt_class
	  , RTOffsetOf( DoNotWarmEmptyPot_Test_Actor, MarkI_TestContainer_Actor::testResults )
	  , 1 // cardinality
	  , 6
	  , RTPortDescriptor::KindWired + RTPortDescriptor::NotificationDisabled + RTPortDescriptor::RegisterNotPermitted + RTPortDescriptor::VisibilityPublic
	}
  , {
		"t_reliefValve"
	  , (const char *)0
	  , &ReliefValve::Base::rt_class
	  , RTOffsetOf( DoNotWarmEmptyPot_Test_Actor, MarkI_TestContainer_Actor::t_reliefValve )
	  , 1 // cardinality
	  , 7
	  , RTPortDescriptor::KindWired + RTPortDescriptor::NotificationDisabled + RTPortDescriptor::RegisterNotPermitted + RTPortDescriptor::VisibilityProtected
	}
  , {
		"t_indicatorLight"
	  , (const char *)0
	  , &IndicatorLight::Base::rt_class
	  , RTOffsetOf( DoNotWarmEmptyPot_Test_Actor, MarkI_TestContainer_Actor::t_indicatorLight )
	  , 1 // cardinality
	  , 8
	  , RTPortDescriptor::KindWired + RTPortDescriptor::NotificationDisabled + RTPortDescriptor::RegisterNotPermitted + RTPortDescriptor::VisibilityProtected
	}
  , {
		"t_boiler"
	  , (const char *)0
	  , &Boiler::Base::rt_class
	  , RTOffsetOf( DoNotWarmEmptyPot_Test_Actor, MarkI_TestContainer_Actor::t_boiler )
	  , 1 // cardinality
	  , 9
	  , RTPortDescriptor::KindWired + RTPortDescriptor::NotificationDisabled + RTPortDescriptor::RegisterNotPermitted + RTPortDescriptor::VisibilityProtected
	}
  , {
		"t_brewButton"
	  , (const char *)0
	  , &BrewButton::Base::rt_class
	  , RTOffsetOf( DoNotWarmEmptyPot_Test_Actor, MarkI_TestContainer_Actor::t_brewButton )
	  , 1 // cardinality
	  , 10
	  , RTPortDescriptor::KindWired + RTPortDescriptor::NotificationDisabled + RTPortDescriptor::RegisterNotPermitted + RTPortDescriptor::VisibilityProtected
	}
  , {
		"t_warmer"
	  , (const char *)0
	  , &Warmer::Base::rt_class
	  , RTOffsetOf( DoNotWarmEmptyPot_Test_Actor, MarkI_TestContainer_Actor::t_warmer )
	  , 1 // cardinality
	  , 11
	  , RTPortDescriptor::KindWired + RTPortDescriptor::NotificationDisabled + RTPortDescriptor::RegisterNotPermitted + RTPortDescriptor::VisibilityProtected
	}
  , {
		"timer"
	  , (const char *)0
	  , &Timing::Base::rt_class
	  , RTOffsetOf( DoNotWarmEmptyPot_Test_Actor, MarkI_TestContainer_Actor::timer )
	  , 1 // cardinality
	  , 12
	  , RTPortDescriptor::KindSpecial + RTPortDescriptor::NotificationDisabled + RTPortDescriptor::RegisterNotPermitted + RTPortDescriptor::VisibilityProtected
	}
};
#undef SUPER

// {{{RME tool 'OT::Cpp' property 'ImplementationEnding'
// {{{USR

// }}}USR
// }}}RME

// }}}RME