📄 2460addr.h
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MDCON0L 0xFC8 0x7E4 R/W MDMA0 Control Register (Low) 0x0000
MDCON0H 0xFCA 0x7E5 R/W MDMA0 Control Register (High) 0x0000
MDCON1L 0xFE8 0x7F4 R/W MDMA1 Control Register (Low) 0x0000
MDCON1H 0xFEA 0x7F5 R/W MDMA1 Control Register
MDICON0 0xFCC 0x7E6 R/W MDMA0 Initial Control Register (Low) 0x0000
MDICON1 0xFEC 0x7F6 R/W MDMA1 Initial
MDSTAT0 0xFCE 0x7E7 R MDMA0 Status Register (High) 0x0000
MDSTAT1 0xFEE 0x7F7 R MDMA1 Status Register (High) 0x0000
MDMASKTRIG0 0xFD0 0x7E8 R/W MDMA0 Mask Trigger Register (Low) 0x0000
MDMASKTRIG1 0xFF0 0x7F8 R/W MDMA1 Mask Trigger Register (Low) 0x0000
MDREQSEL0 0xFD4 0x7EA R/W MDMA0 Request Selection Register 0x0000
MDREQSEL1 0xFF4 0x7FA R/W MDMA1 Request Selection Register 0x0000
*/
// SD Interface & SDIO
#define rSDICON (*(volatile unsigned *)0x46000000) //SDI control
#define rSDIPRE (*(volatile unsigned *)0x46000004) //SDI baud rate prescaler
#define rSDICARG (*(volatile unsigned *)0x46000008) //SDI command argument
#define rSDICCON (*(volatile unsigned *)0x4600000c) //SDI command control
#define rSDICSTA (*(volatile unsigned *)0x46000010) //SDI command status
#define rSDIRSP0 (*(volatile unsigned *)0x46000014) //SDI response 0
#define rSDIRSP1 (*(volatile unsigned *)0x46000018) //SDI response 1
#define rSDIRSP2 (*(volatile unsigned *)0x4600001C) //SDI response 2
#define rSDIRSP3 (*(volatile unsigned *)0x46000020) //SDI response 3
#define rSDIDTIMER (*(volatile unsigned *)0x46000024) //SDI data/busy timer
#define rSDIBSIZE (*(volatile unsigned *)0x46000028) //SDI block size
#define rSDIDCON (*(volatile unsigned *)0x4600002C) //SDI data control
#define rSDIDCNT (*(volatile unsigned *)0x46000030) //SDI data remain counter
#define rSDIDSTA (*(volatile unsigned *)0x46000034) //SDI data status
#define rSDIFSTA (*(volatile unsigned *)0x46000038) //SDI FIFO status
#define rSDIIMSK (*(volatile unsigned *)0x4600003c) //SDI interrupt mask
#define rSDIDAT (*(volatile unsigned *)0x46000040) //SDI data
#define SDIDAT 0x46000040
//Memory Stick
#define rMSPRE (*(volatile unsigned *)0x46100000)
#define rMSFINTCON (*(volatile unsigned *)0x46100004)
#define rTP_CMD (*(volatile unsigned *)0x46108000)
#define rCTRL_STA (*(volatile unsigned *)0x46108004)
#define rDAT_FIFO (*(volatile unsigned *)0x46108008)
#define rINTCTRL_STA (*(volatile unsigned *)0x4610800C)
#define rINS_CON (*(volatile unsigned *)0x46108010)
#define rACMD_CON (*(volatile unsigned *)0x46108014)
#define rATP_CMD (*(volatile unsigned *)0x46108018)
//IIS
#define rIISCON (*(volatile unsigned *)0x44700000)
#define rIISMOD (*(volatile unsigned *)0x44700004)
#define rIISPSR (*(volatile unsigned *)0x44700008)
#define rIISFCON (*(volatile unsigned *)0x4470000C)
#define rIISFIFO (*(volatile unsigned short*)0x44700010)
//AC97
#define rAC_GLBCTRL (*(volatile unsigned *)0x45000000)
#define rAC_GLBSTAT (*(volatile unsigned *)0x45000004)
#define rAC_CODEC_CMD (*(volatile unsigned *)0x45000008)
#define rAC_CODEC_STAT (*(volatile unsigned *)0x4500000C)
#define rAC_PCM_ADDR (*(volatile unsigned *)0x45000010)
#define rAC_MICADDR (*(volatile unsigned *)0x45000014)
#define rAC_PCMDATA (*(volatile unsigned *)0x45000018)
#define rAC_MICDATA (*(volatile unsigned *)0x4500001C)
//PCM
#define rPCM_CTL (*(volatile unsigned *)0x46200000) //R/W PCM Main Control 0x00000000
#define rPCM_CLKCTL (*(volatile unsigned *)0x46200004) //R/W PCM Clock and Shift control 0x00000000
#define rPCM_TXFIFO (*(volatile unsigned *)0x46200008) //R/W PCM TxFIFO write port 0x00000000
#define rPCM_RXFIFO (*(volatile unsigned *)0x4620000C) //R/W PCM RxFIFO read port 0x00000000
#define rPCM_IRQ_CTL (*(volatile unsigned *)0x46200010) //R/W PCM Interrupt Control 0x00000000
#define rPCM_IRQ_STAT (*(volatile unsigned *)0x46200014) //R PCM Interrupt Status 0x00000000
#define rPCM_FIFO_STAT (*(volatile unsigned *)0x46200018) //R PCM Tx Defualt Value 0x00000000
//Keypad Interface
#define rKEYIFCON (*(volatile unsigned *)0x44900000)
#define rKEYIFSTSCLR (*(volatile unsigned *)0x44900004)
#define rKEYIFCOL (*(volatile unsigned *)0x44900008)
#define rKEYIFROW (*(volatile unsigned *)0x4490000C)
#define rKEYIFFC (*(volatile unsigned *)0x44900010)
//DSP
#define rDSP2ARM_CTRL (*(volatile unsigned*)0x44300000)
#define rDSP2ARM_0 (*(volatile unsigned*)0x44300004)
#define rDSP2ARM_2 (*(volatile unsigned*)0x44300008)
#define rDSP2ARM_4 (*(volatile unsigned*)0x4430000c)
#define rARM2DSP_CTRL (*(volatile unsigned*)0x44300010)
#define rARM2DSP_0 (*(volatile unsigned*)0x44300014)
#define rARM2DSP_2 (*(volatile unsigned*)0x44300018)
#define rARM2DSP_4 (*(volatile unsigned*)0x4430001c)
//ISR Address
#define pISR_RESET (*(unsigned *)(_ISR_STARTADDRESS+0x0))
#define pISR_UNDEF (*(unsigned *)(_ISR_STARTADDRESS+0x4))
#define pISR_SWI (*(unsigned *)(_ISR_STARTADDRESS+0x8))
#define pISR_PABORT (*(unsigned *)(_ISR_STARTADDRESS+0xc))
#define pISR_DABORT (*(unsigned *)(_ISR_STARTADDRESS+0x10))
#define pISR_RESERVED (*(unsigned *)(_ISR_STARTADDRESS+0x14))
#define pISR_IRQ (*(unsigned *)(_ISR_STARTADDRESS+0x18))
#define pISR_FIQ (*(unsigned *)(_ISR_STARTADDRESS+0x1c))
//Main Source Interrupt
#define pISR_EXT0_3 (*(unsigned *)(_ISR_STARTADDRESS +0x20))
#define pISR_CAMIF_BLOCK_POST (*(unsigned *)(_ISR_STARTADDRESS +0x24))
#define pISR_DSPDMA (*(unsigned *)(_ISR_STARTADDRESS +0x28))
#define pISR_MDMA (*(unsigned *)(_ISR_STARTADDRESS +0x2c))
#define pISR_BATFLT (*(unsigned *)(_ISR_STARTADDRESS +0x30))
#define pISR_TIC (*(unsigned *)(_ISR_STARTADDRESS +0x34))
#define pISR_DCTQ (*(unsigned *)(_ISR_STARTADDRESS +0x38))
#define pISR_MC (*(unsigned *)(_ISR_STARTADDRESS +0x3c))
#define pISR_ME (*(unsigned *)(_ISR_STARTADDRESS +0x40))
#define pISR_KEYPAD (*(unsigned *)(_ISR_STARTADDRESS +0x44))
#define pISR_TIMER0 (*(unsigned *)(_ISR_STARTADDRESS +0x48))
#define pISR_TIMER1 (*(unsigned *)(_ISR_STARTADDRESS +0x4c))
#define pISR_TIMER2 (*(unsigned *)(_ISR_STARTADDRESS +0x50))
#define pISR_TIMER34_WDT (*(unsigned *)(_ISR_STARTADDRESS +0x54))
#define pISR_LCD (*(unsigned *)(_ISR_STARTADDRESS +0x58))
#define pISR_EXT4_7 (*(unsigned *)(_ISR_STARTADDRESS +0x5c))
#define pISR_PCM_AC97 (*(unsigned *)(_ISR_STARTADDRESS +0x60))
#define pISR_UART (*(unsigned *)(_ISR_STARTADDRESS +0x64))
#define pISR_EXT8_11 (*(unsigned *)(_ISR_STARTADDRESS +0x68))
#define pISR_DSPWDOG (*(unsigned *)(_ISR_STARTADDRESS +0x6c))
#define pISR_DMA_SBUS (*(unsigned *)(_ISR_STARTADDRESS +0x70))
#define pISR_TEAK (*(unsigned *)(_ISR_STARTADDRESS +0x74))
#define pISR_NFLASH (*(unsigned *)(_ISR_STARTADDRESS +0x78))
#define pISR_IIC_SPI (*(unsigned *)(_ISR_STARTADDRESS +0x7c))
#define pISR_MODEM (*(unsigned *)(_ISR_STARTADDRESS +0x80))
#define pISR_EXT12_15 (*(unsigned *)(_ISR_STARTADDRESS +0x84))
#define pISR_VLX (*(unsigned *)(_ISR_STARTADDRESS +0x88))
#define pISR_IrDA (*(unsigned *)(_ISR_STARTADDRESS +0x8c))
#define pISR_SDMMC_MS (*(unsigned *)(_ISR_STARTADDRESS +0x90))
#define pISR_USB (*(unsigned *)(_ISR_STARTADDRESS +0x94))
#define pISR_RTC (*(unsigned *)(_ISR_STARTADDRESS +0x98))
#define pISR_ADC_PENDN (*(unsigned *)(_ISR_STARTADDRESS +0x9c))
//PENDING BIT
#define BIT_EXT0_3 (0x1)
#define BIT_CAMIF_BLOCK_POST (0x1<<1)
#define BIT_DSPDMA (0x1<<2)
#define BIT_MDMA (0x1<<3)
#define BIT_BATFLT (0x1<<4)
#define BIT_TIC (0x1<<5)
#define BIT_DCTQ (0x1<<6)
#define BIT_MC (0x1<<7)
#define BIT_ME (0x1<<8)
#define BIT_KEYPAD (0x1<<9)
#define BIT_TIMER0 (0x1<<10)
#define BIT_TIMER1 (0x1<<11)
#define BIT_TIMER2 (0x1<<12)
#define BIT_TIMER34_WDT (0x1<<13)
#define BIT_LCD (0x1<<14)
#define BIT_EXT4_7 (0x1<<15)
#define BIT_PCM_AC97 (0x1<<16)
#define BIT_UART (0x1<<17)
#define BIT_EXT8_11 (0x1<<18)
#define BIT_RESERVED (0x1<<19)
#define BIT_DMA_SBUS (0x1<<20)
#define BIT_TEAK (0x1<<21)
#define BIT_NFLASH (0x1<<22)
#define BIT_IIC_SPI (0x1<<23)
#define BIT_MODEM (0x1<<24)
#define BIT_EXT12_15 (0x1<<25)
#define BIT_VLX (0x1<<26)
#define BIT_IrDA (0x1<<27)
#define BIT_SDMMC_MS (0x1<<28)
#define BIT_USB (0x1<<29)
#define BIT_RTC (0x1<<30)
#define BIT_ADC_PENDN (0x1<<31)
#define BIT_ALLMSK (0xffffffff)
//Sub Source Interrupt 1
#define BIT_SUB_UART0 (0x1)
#define BIT_SUB_UART1 (0x1<<1)
#define BIT_SUB_UART2 (0x1<<2)
#define BIT_SUB_SPI0 (0x1<<3)
#define BIT_SUB_SPI1 (0x1<<4)
#define BIT_SUB_IIC (0x1<<5)
#define BIT_SUB_SDMMC (0x1<<6)
#define BIT_SUB_MSTICK (0x1<<7)
#define BIT_SUB_WDT (0x1<<8)
#define BIT_SUB_TIMER3 (0x1<<9)
#define BIT_SUB_TIMER4 (0x1<<10)
#define BIT_SUB_PCM (0x1<<11)
#define BIT_SUB_AC97 (0x1<<12)
#define BIT_SUB_LCD_FIFO (0x1<<13)
#define BIT_SUB_LCD_VSYNC (0x1<<14)
#define BIT_SUB_RESERVED15 (0x1<<15)
#define BIT_SUB_PENDN (0x1<<16)
#define BIT_SUB_ADC (0x1<<17)
#define BIT_SUB_OTG (0x1<<18)
#define BIT_SUB_USBD (0x1<<19)
#define BIT_SUB_USBH (0x1<<20)
#define BIT_SUB_CSIV (0x1<<21)
#define BIT_SUB_CSID (0x1<<22)
#define BIT_SUB_RESERVED23 (0x1<<23)
#define BIT_SUB_MSM (0x1<<24)
#define BIT_SUB_DMA0 (0x1<<25)
#define BIT_SUB_DMA1 (0x1<<26)
#define BIT_SUB_DMA2 (0x1<<27)
#define BIT_SUB_DMA3 (0x1<<28)
#define BIT_SUB_ALLMSK1 (0x1fffffff)
//Sub Source Interrupt 2
#define BIT_SUB_POST (0x1)
#define BIT_SUB_DEBLOCK (0x1<<1)
#define BIT_SUB_CAMIF_C (0x1<<2)
#define BIT_SUB_CAMIF_P (0x1<<3)
#define BIT_SUB_DSPDMA0 (0x1<<4)
#define BIT_SUB_DSPDMA1 (0x1<<5)
#define BIT_SUB_DSPDMA2 (0x1<<6)
#define BIT_SUB_DSPDMA3 (0x1<<7)
#define BIT_SUB_MDMA0 (0x1<<8)
#define BIT_SUB_MDMA1 (0x1<<9)
#define BIT_SUB_ALLMSK2 (0x3ffff)
//EINTPEND
#define BIT_EINT_0 (0x1)
#define BIT_EINT_1 (0x1<<1)
#define BIT_EINT_2 (0x1<<2)
#define BIT_EINT_3 (0x1<<3)
#define BIT_EINT_4 (0x1<<4)
#define BIT_EINT_5 (0x1<<5)
#define BIT_EINT_6 (0x1<<6)
#define BIT_EINT_7 (0x1<<7)
#define BIT_EINT_8 (0x1<<8)
#define BIT_EINT_9 (0x1<<9)
#define BIT_EINT_10 (0x1<<10)
#define BIT_EINT_11 (0x1<<11)
#define BIT_EINT_12 (0x1<<12)
#define BIT_EINT_13 (0x1<<13)
#define BIT_EINT_14 (0x1<<14)
#define BIT_EINT_15 (0x1<<15)
#define BIT_EINT_ALLMSK (0xfffff)
#define ClearPending(bit) {\
rSRCPND = bit;\
rINTPND = bit;\
rINTPND;\
}
//Wait until rINTPND is changed for the case that the ISR is very short.
// The effect of reading "rINTPND;" : Waiting until rINTPND is changed.
// When you access any address, write buffer must be cleared if you want to read this address.
// Otherwise, twice interrupt request could be occured per one interrupt.
// in the case that the ISR is very short.
#ifdef __cplusplus
}
#endif
#endif //__2460ADDR_H___
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