amd29lv400bt.c

dsp6416开发的底层驱动

/*H*****************************************************************************
*
* $Archive::                                                                   $
* $Revision::                                                                  $
* $Date::                                                                      $
* $Author::                                                                    $
*
* DESCRIPTION: 
*
* GLOBALS 
*
* PUBLIC FUNCTIONS:
*                              
* PRIVATE FUNCTIONS:
*
* USAGE/LIMITATIONS:
*
* NOTES: Supports AMD 29LV400BT device connected to C64x through EMIF B
*        configured for 8 bit boot mode.   
*
* Built with:  
*    TMS320C64XX ANSI C/C++ Compiler     
*
*  
* If you uncomment #define FLASH_DEBUG then you can run a simple 
* erase/program/verify for testing in Code Composer.  This must
* commented out when for use with the SDFlash utility.
*
*
*
*H***************************************************************************/
#define amd29lv400bt_c

/*---- compilation control switches ----------------------------------------*/
/*---------------------------------------------------------------------------
* Define FLASH_DEBUG to execute simple flash test/debug code via Code
* Composer.  
* Define SUBROUTINE_IF if you call the flash test subroutine externally. 
*
* Define WORD_WIDE_FLASH if you are using a 16 bit wide flash. WORD_WIDE_FLASH
* was tested on C5416 with AMD flash. Not sure if this should be set for
* C6416 or not. Simply reading the mfg id/dev will tell.
*---------------------------------------------------------------------------*/

#define FLASH_DEBUG   
#define SUBROUTINE_IF
//#define WORD_WIDE_FLASH

/*****************************************************************************
* INCLUDE FILES
*****************************************************************************/
/*---- system and platform files -------------------------------------------*/

#include <stdlib.h>
#include <stdio.h>
#include <string.h>

/*---- program files -------------------------------------------------------*/
#include "flash.h"     

/*****************************************************************************
* EXTERNAL REFERENCE    
*****************************************************************************/
/*---- data declarations ---------------------------------------------------*/

/*---- function prototypes -------------------------------------------------*/

/*****************************************************************************
* PUBLIC DECLARATIONS 
*****************************************************************************/

/*---- data declarations ---------------------------------------------------*/


/*****************************************************************************
* PRIVATE DECLARATIONS  
*****************************************************************************/
/*---- context -------------------------------------------------------------*/

/*---- data declarations ---------------------------------------------------*/
/*-- Micron MT28F00B3T definitions------------------------------------------*/
#define	AMD_29LV400_BLOCKS			    19   
#define AMD_29LV400_MFG_ID     	    0x0001
#define AMD_29LV400_DEV_ID     	    0x003E  

#define CMD_RESET                   0x00F0     // Return to read array
#define CMD_READ_ARRAY	        	0x00F0     // Return to read array	  
#define CMD_READ_ID	            	0x0090
#define CMD_SECTOR_PROTECT_VERIFY   0x0090
#define CMD_WRITE_ARRAY         	0x00A0

#define CMD_UNLOCK_BYPASS           0x0020
#define CMD_UNLOCK_BYPASS_PROGRAM   0x00A0
#define CMD_UNLOCK_BYPASS_RESET     0x0090

#define CMD_ERASE_ARRAY         	0x0080
#define CMD_CONFIRM_ERASE_CHIP      0x0010
#define CMD_CONFIRM_ERASE_SECTOR    0x0030
#define CMD_ERASE_SUSPEND       	0x00B0
#define CMD_ERASE_RESUME            0x0030

#define DQ7                         0x80
#define DQ6                         0x40
#define DQ5                         0x20  
#define DQ3                         0x80 
#define DQ2                         0x04
     
/* FLASH_BASE is EMIF B, CE1                                               */     
#define FLASH_BASE	                ((FLASH_ADDR )( 0x64000000 ) )
#define FLASH_PAGE_SIZE             0x10000L        /* Main block          */
#define FLASH_ERASE_TIME_MS         5000            /* 5 seconds           */
#define FLASH_WORD_PROG_TIME_TYP    22
#define FLASH_WORD_PROG_TIME_MAX    200

#define SETUP_ERASE                 1
#define SETUP_WRITE                 2
#define SETUP_READ                  3   

// Define the Flash command cycle sequenance addresses.  These depend
// on the use of BYTE/WORD flash
//
#if defined( WORD_WIDE_FLASH )
#define FLASH_CYC1_ADDR ( FLASH_BASE + 0x0555 )
#define FLASH_CYC2_ADDR ( FLASH_BASE + 0x0AAA )        
#define FLASH_CYC3_ADDR ( FLASH_BASE + 0x0555 )
#else
#define FLASH_CYC1_ADDR ( FLASH_BASE + 0x0555 )
#define FLASH_CYC2_ADDR ( FLASH_BASE + 0x02aa )        
#define FLASH_CYC3_ADDR ( FLASH_BASE + 0x0555 )
#endif
   	   	
typedef struct Amd29LV400BT
{                                 
	unsigned		MfgId;
	unsigned		DevId;
	unsigned		NumberBlocks; 
	FLASH_DESC      Blocks[AMD_29LV400_BLOCKS+1];
}AMD_29LV400BT;
  
AMD_29LV400BT MyFlash =
{        
    AMD_29LV400_MFG_ID,
    AMD_29LV400_DEV_ID,
	AMD_29LV400_BLOCKS,
	{
		{(FLASH_ADDR)0x64000000, FLASH_TYPE_MAIN},// Main          64K      0
		{(FLASH_ADDR)0x64010000, FLASH_TYPE_MAIN},// Main          32K      1
		{(FLASH_ADDR)0x64020000, FLASH_TYPE_MAIN},// Main          32K      2
		{(FLASH_ADDR)0x64030000, FLASH_TYPE_MAIN},// Main          32K      3
		{(FLASH_ADDR)0x64040000, FLASH_TYPE_MAIN},// Main          32K      4
		{(FLASH_ADDR)0x64050000, FLASH_TYPE_MAIN},// Main          32K      5
		{(FLASH_ADDR)0x64060000, FLASH_TYPE_MAIN},// Main          32K      6 		 
		{(FLASH_ADDR)0x64070000, FLASH_TYPE_MAIN},// Main          32K      7
		{(FLASH_ADDR)0x64080000, FLASH_TYPE_PARM},// Parm           4K      8
		{(FLASH_ADDR)0x64090000, FLASH_TYPE_PARM},// Parm           4K      9
		{(FLASH_ADDR)0x640A0000, FLASH_TYPE_BOOT},// Boot           8K     10
		{(FLASH_ADDR)0x640B0000, FLASH_TYPE_NULL}, // The end 
		{(FLASH_ADDR)0x640C0000, FLASH_TYPE_MAIN},
		{(FLASH_ADDR)0x640D0000, FLASH_TYPE_MAIN},
		{(FLASH_ADDR)0x640E0000, FLASH_TYPE_MAIN},
		{(FLASH_ADDR)0x640F0000, FLASH_TYPE_MAIN},
		{(FLASH_ADDR)0x640F8000, FLASH_TYPE_MAIN},
		{(FLASH_ADDR)0x640FA000, FLASH_TYPE_MAIN},
		{(FLASH_ADDR)0x640FC000, FLASH_TYPE_MAIN}
	}
};                
    
/*---------------------------------------------------------------------------
* Arguments used by the flash programmer.  These values are generally
* filled in by the flash programmer and read by the flash algos to
* erase/program/verify the flash.
*---------------------------------------------------------------------------*/ 
#define  BYTES_IN_FLASH_BUFFER 2048     // Programming data buffer, bytes
volatile unsigned        Buffer[BYTES_IN_FLASH_BUFFER/4];   
volatile unsigned        PRG_bufaddr;   // Pointer to Buffer
volatile unsigned        PRG_bufsize;   // Size of Buffer
volatile unsigned        PRG_devsize;   // Size of the device, not used
volatile unsigned        PRG_paddr;     // Flash address to program/verify
volatile unsigned        PRG_page;      // Page to program, should be 0
volatile unsigned        PRG_length;    // Length of data to program
volatile unsigned        PRG_status;    // Programming status 0-succeed
volatile unsigned        PRG_options;   // Programming options, algo specific
    
/*----------------------------------------------------------------------------
* x*1000ns/(ins_clk*ins_loop). 
*---------------------------------------------------------------------------*/
#define DSP_CLK_PERIOD_NS    2
    
#define DELAY_LOOP           ( DSP_CLK_PERIOD_NS * 12 )    
#define CLK_DELAY_US( x )    (((x*1000)/(DELAY_LOOP))+1)

#define CLK_DELAY_MS( x ) ((unsigned)( (unsigned )(((x*1000)/DELAY_LOOP)+1)\
                                      *(unsigned )1000)) 
                                                                                         
/*----------------------------------------------------------------------------
* Covert between C55x program and data addresses         
* PATODA    - Program byte address to Data word address
* DATOPA    - Data word address to Program byte address
* BYTETOLOC - From coff byte to local word
* LOCTOBYTE - From local word to coff byte
*---------------------------------------------------------------------------*/
#define  PATODA(x)        ( ((unsigned )(x))/1 )
#define  DATOPA(x)        ( ((unsigned )(x))*1 )
#define  BYTETOLOC(x)     ( (x)/1 )
#define  LOCTOBYTE(x)     ( (x)*1 ) 
 
/*---- function prototypes -------------------------------------------------*/
static void Delay( unsigned Count );    

#if defined( FLASH_DEBUG )
    static int  FlashTestBlocks( void );
#endif
/*---- macros --------------------------------------------------------------*/

/*****************************************************************************
* PUBLIC FUNCTION DEFINITIONS
*****************************************************************************/

/*****************************************************************************
*  Couple of helper functions for accessing the flash.  We can add delays
*  into the read/write if required to meet Flash timing requirements. 
*   
****************************************************************************/
static void
Delay( unsigned  Count )
{  
    volatile unsigned  Loop = Count;
	while( Loop-- )
	{}
}

static void
FlsWrite( FLASH_ADDR  Faddr, FLASH_DTYPE Data )
{  
    volatile FLASH_DTYPE  * pFlash = (volatile FLASH_DTYPE *)(Faddr);
	*pFlash = Data;
    Delay(100);	
}
static FLASH_DTYPE
FlsRead( FLASH_ADDR  Faddr )
{ 
    volatile FLASH_DTYPE  * pFlash = (volatile FLASH_DTYPE *)(Faddr);
	return( *pFlash );	
}
   	
/*F***************************************************************************
* NAME:   FLASH_MfgCode 
*
* DESCRIPTION:   Read the mfg code for the flash.                   
*       
* NOTES:
*   
*F***************************************************************************/
int
FLASH_MfgCode( FLASH_MFG_CODE * pMfgCode )
{
    unsigned       MfgId,DevId;   
    FLASH_ADDR     FlashBase = PATODA(FLASH_BASE);
 
   	FlsWrite( FLASH_CYC1_ADDR, 0xAA           );   // Bus Cycle 1
   	FlsWrite( FLASH_CYC2_ADDR, 0x55           );   // Bus Cycle 2         
   	FlsWrite( FLASH_CYC3_ADDR, CMD_READ_ID    );   // Bus Cycle 3           
	   	    
    MfgId = (unsigned)(FlsRead( FlashBase   ) & 0x0ff);
    DevId = (unsigned)(FlsRead( FlashBase+1 ) & 0x0ff);
    
    FlsWrite( FlashBase, CMD_READ_ARRAY );

    pMfgCode->MfgId = MfgId;
    pMfgCode->DevId = DevId;

    return( 0 );
}

/*F***************************************************************************
* NAME:  FLASH_Read  
*
* DESCRIPTION:  Read "Count" FLASH_DTYPE elements from flash.                     
*       
* NOTES:
*   
*F***************************************************************************/
int           
FLASH_Read(  FLASH_ADDR  Faddr, void * pData, unsigned Count )
{
    FLASH_DTYPE  * pBuf  = (FLASH_DTYPE *)pData;
  
    while( Count-- )
    {
		*pBuf++ = FlsRead( Faddr );
		Faddr += sizeof(FLASH_DTYPE);
	}
    return( 0 );
}

/*F***************************************************************************
* NAME:  FLASH_Write  
*
* DESCRIPTION: Write "Count" FLASH_DTYPE elements to flash.                 
*       
* NOTES:
*   
*F***************************************************************************/
int
FLASH_Write( FLASH_ADDR  Faddr, void * pData, unsigned Count )
{
    int            Error;
    int            Timeout;
    
    FLASH_DTYPE    Status;
    FLASH_DTYPE  * pBuf  = (FLASH_DTYPE *)pData;
    register FLASH_DTYPE Temp;
    
    Error = 0;
    do 
    {     
        Temp = *pBuf;  
	   	FlsWrite( FLASH_CYC1_ADDR, 0xAA           );   // Bus Cycle 1
	   	FlsWrite( FLASH_CYC2_ADDR, 0x55           );   // Bus Cycle 2         
	   	FlsWrite( FLASH_CYC3_ADDR, CMD_WRITE_ARRAY);   // Bus Cycle 3                   
        FlsWrite( Faddr, Temp                     );   // Bus Cycle 4     

        Timeout = FLASH_WORD_PROG_TIME_TYP;
        do
        {
            Delay( CLK_DELAY_US(1) );
            Status = FlsRead( Faddr );
             
            // If DQ7 match then good program so break
            if( ( Status & DQ7 ) == ( Temp & DQ7 ) )
                break;
               
            // If DQ5 == 1, recheck      
            if( (Status & DQ5 ) == DQ5 )
            {
                Status = FlsRead( Faddr );
                // If DQ7 match then good program so break
                if( ( Status & DQ7 ) == ( Temp & DQ7 ) )
                	break;
                // DQ5 == 1, and DQ7 != Data-DQ7 if FAILURE