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📄 autimer.c

📁 au1500开发的应用程序
💻 C
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/* auTimer.c - Au timer library *//* Copyright 2001 Wind River Systems, Inc. */#include "copyright_wrs.h"/* * This file has been developed or significantly modified by the * MIPS Center of Excellence Dedicated Engineering Staff. * This notice is as per the MIPS Center of Excellence Master Partner * Agreement, do not remove this notice without checking first with * WR/Platforms MIPS Center of Excellence engineering management. *//*modification history--------------------01e,12mar05,fhc  adopted from pb1500_mips32sf/auTimer.c (ver 01d),                  comment added01d,14may02,zmm  Global au1000 name changes. SPR 77333.01c,27mar02,zmm  Wrote sysTimestampInt, fix SPR 74734.01b,02jan02,zmm  Fix clearing BTT bit and remove workaround code for this,                 SPR #72472. Increase oscillator time out. Wrote *ClkConfig*                 routines and redesign ISRs, and *Enable* routines.01a,03dec01,zmm  written from mipsR4kTimer.c*//*DESCRIPTIONThis library provides timer routines for the on-chip Au timers onAlchemy Au MIPS processors.  This library handles system clock, auxillary clock and timestamp functions.  The macros SYS_CLK_RATE_MIN and SYS_CLK_RATE_MAX must be defined to provide parameter checking for the sysClkRateSet() routines.To include the timestamp timer facility, the macro INCLUDE_TIMESTAMP must bedefined. Note that changing the system clock rate will affect the timestamptimer period, which can be read by calling sysTimestampPeriod().This driver requires the external routines sysCompareSet(), sysCompareGet(),sysCountGet(), and sysCountSet() to be defined.-Also the value CPU_CLOCK_RATE must be defined in the BSP.-The variable sysSoftCompare needs to be defined as global, because thisvariabl gets used by the sysCompareSet() routine in sysALib.s of the BSP.INCLUDE FILES: timestampDev.hSEE ALSO:.pG "Configuration"INTERNAL:This driver use TOY match2 interrupt of AU to implement system clock, use RTCmatch2 interrupt to implement auxillary clock, timestamp is get via sysCountGet,which read the current value in count register(coprocessor 0 register 9).*//* includes */#include "drv/timer/timestampDev.h"/* defines */#ifndef TIMER_CLOCK_HZ#define TIMER_CLOCK_HZ	32768  /* default TOY & RTC oscilator frequency */#endif#define OSC_TIMEOUT  80000000  /* timeout for waiting write status bit */#define TIMER_WRITE_DELAY   3  /* delay during write to counter, 3 ticks */#define TIMER_ROLL_OVER        ((unsigned long) 0xffffffff)#define PERIOD(x)              (((10 * TIMER_CLOCK_HZ / (x)) - 5) / 10)#define TIMER_CAST(x)           *(volatile UINT32 *)(x)#define AU_TOY_TRIM_REG         TIMER_CAST(AU_SYS_TOY_TRIM)#define AU_TOY_WRITE_REG        TIMER_CAST(AU_SYS_TOY_WRITE)#define AU_TOY_MATCH_0_REG      TIMER_CAST(AU_SYS_TOY_MATCH_0)#define AU_TOY_MATCH_1_REG      TIMER_CAST(AU_SYS_TOY_MATCH_1)#define AU_TOY_MATCH_2_REG      TIMER_CAST(AU_SYS_TOY_MATCH_2)#define AU_TOY_CONTROL_REG      TIMER_CAST(AU_SYS_COUNTER_CONTROL)#define AU_TOY_READ_REG         TIMER_CAST(AU_SYS_TOY_READ)#define AU_RTC_TRIM_REG         TIMER_CAST(AU_SYS_RTC_TRIM)#define AU_RTC_WRITE_REG        TIMER_CAST(AU_SYS_RTC_WRITE)#define AU_RTC_MATCH_0_REG      TIMER_CAST(AU_SYS_RTC_MATCH_0)#define AU_RTC_MATCH_1_REG      TIMER_CAST(AU_SYS_RTC_MATCH_1)#define AU_RTC_MATCH_2_REG      TIMER_CAST(AU_SYS_RTC_MATCH_2)#define AU_RTC_CONTROL_REG      TIMER_CAST(AU_SYS_COUNTER_CONTROL)#define AU_RTC_READ_REG         TIMER_CAST(AU_SYS_RTC_READ)/* extern declarations */IMPORT STATUS	intConnect();IMPORT int      sysCompareSet ();	/* define in sysALib.s of BSP */IMPORT int      sysCompareGet ();	/* define in sysALib.s of BSP */IMPORT int      sysCountGet ();		/* define in sysALib.s of BSP */IMPORT int      sysCountSet ();		/* define in sysALib.s of BSP *//* globals */ULONG sysSoftCompare = 0;               /* last target compare reg value *//* Locals */LOCAL FUNCPTR   sysClkRoutine    = NULL;     /* clock interrupt routine   */LOCAL int   sysClkArg            = 0;        /* clock int routine arg     */LOCAL int   sysClkTicksPerSecond = 60;       /* default sys timer rate    */LOCAL BOOL  sysClkConnected      = FALSE;    /* sys clock connect flag    */LOCAL BOOL  sysClkRunning        = FALSE;    /* sys clock enabled flag    */#ifdef INCLUDE_AUX_CLKLOCAL FUNCPTR sysAuxClkRoutine   = NULL;     /* aux clock interrupt routine */LOCAL int sysAuxClkArg           = 0;        /* aux clock int routine arg   */LOCAL int auxClkTicksPerSecond   = 60;       /* default aux timer rate      */LOCAL BOOL auxClkConnected       = FALSE;    /* aux clock connect flag      */LOCAL BOOL auxClkRunning         = FALSE;    /* aux clock enabled flag      */#endif /* INCLUDE_AUX_CLK */#ifdef  INCLUDE_TIMESTAMPLOCAL FUNCPTR sysTimestampRoutine   = NULL;     /* timestamp clock interrupt routine */LOCAL int sysTimestampArg           = 0;        /* timestamp clock int routine arg   */LOCAL BOOL  sysTimestampRunning     = FALSE;    /* timestamp running flag */#endif  /* INCLUDE_TIMESTAMP *//******************************************************************************* sysToyControlPoll - poll the status bit in counter control register** This routine polls the required bit in TOY control register.* Routine can poll bit for both 0 and 1.** RETURNS: OK, ERROR** SEE ALSO: sysClkEnable()*/int sysToyControlPoll(    UINT32 bit,                              /* bit to poll  */    int pollvalue                            /* value to poll */    )    {    int count=0;    if (pollvalue == 0)        {        while (AU_TOY_CONTROL_REG & bit)   /* wait for bit=0 */            {            if (count++ > OSC_TIMEOUT)                {                return (ERROR);                }             }        }    else if (pollvalue == 1)        {        while (!(AU_TOY_CONTROL_REG & bit)) /* wait for bit=1 */            {            if (count++ > OSC_TIMEOUT)                {                return (ERROR);                }             }        }    return (OK);    }/******************************************************************************* sysClkConfig - Set up TOY device.** This routine enables system clock oscillator.* Set up oscillator divider (trim register), and initial value of system* clock counter (write register). At the end it enables TOY counter, but* leaves system clock disable.** RETURNS: N/A** SEE ALSO: sysClkEnable()*/void sysClkConfig (void)    {    /* configure TOY match2 interrupt as rising edge */    AU_INTC_CONFIG2_CLEAR(0) = (1 << 17);    AU_INTC_CONFIG1_CLEAR(0) = (1 << 17);    AU_INTC_CONFIG0_SET(0) = (1 << 17);    /* enable the 32.768khz oscillator, and make sure it is running */    AU_TOY_CONTROL_REG |= AU_SYS_COUNTER_CONTROL_EO;    sysWbFlush();    sysToyControlPoll (AU_SYS_COUNTER_CONTROL_32S, 1);    /* TOY is driven by 32.768 clock, set trim to 0(divider = 1) */    AU_TOY_CONTROL_REG |= AU_SYS_COUNTER_CONTROL_BTT;    sysWbFlush();    AU_TOY_TRIM_REG = 0;    sysWbFlush();    /* TOY trim is used now */    AU_TOY_CONTROL_REG &= ~AU_SYS_COUNTER_CONTROL_BTT;    sysWbFlush();    /* enable TOY block, query ETS bit before writing */    sysToyControlPoll (AU_SYS_COUNTER_CONTROL_ETS, 0);    AU_TOY_CONTROL_REG |= AU_SYS_COUNTER_CONTROL_TEN;    sysWbFlush();    /* initialize counter(write register) to 0, query TS before writing */    sysToyControlPoll (AU_SYS_COUNTER_CONTROL_TS, 0);    AU_TOY_WRITE_REG = 0;    sysWbFlush();    sysToyControlPoll (AU_SYS_COUNTER_CONTROL_TS, 0);    }/******************************************************************************* sysClkEnable - turn on system clock interrupts** This routine enables system clock interrupts. System clock use TOY match2* interrupt, that is 17.** RETURNS: N/A** SEE ALSO: sysClkDisable(), sysClkRateSet()*/void sysClkEnable (void)    {    /* set match2, query TM2 bit before writing  */    sysToyControlPoll (AU_SYS_COUNTER_CONTROL_TM2, 0);    AU_TOY_MATCH_2_REG = PERIOD(sysClkTicksPerSecond);    sysWbFlush();    /* adjust counter  */    AU_TOY_WRITE_REG = TIMER_WRITE_DELAY;    sysWbFlush();    /* enable interrupts */    AU_INTC_MASK_SET(0) = (1 << 17);    sysWbFlush();    sysClkRunning = TRUE;    }/******************************************************************************* sysClkRateGet - get the system clock rate** This routine returns the interrupt rate of the system clock.** RETURNS: The number of ticks per second of the system clock.** SEE ALSO: sysClkRateSet()*/int sysClkRateGet (void)    {    return (sysClkTicksPerSecond);    }/******************************************************************************* sysClkRateSet - set the system clock rate** This routine sets the interrupt rate of the system clock.  It does not* enable system clock interrupts.  Normally, it is called by usrRoot() in* usrConfig.c.** NOTE: The Au internal TOY timer is used to provide the system clock.** RETURNS: OK, or ERROR if the tick rate is invalid or the timer cannot be* set.** SEE ALSO: sysClkDisable(), sysClkEnable(), sysClkRateGet()*/STATUS sysClkRateSet    (    int ticksPerSecond  /* number of clock interrupts per second */    )    {    /* parameter checking */    if (ticksPerSecond < SYS_CLK_RATE_MIN || ticksPerSecond > SYS_CLK_RATE_MAX)        return (ERROR);    sysClkTicksPerSecond = ticksPerSecond;    if (sysClkRunning)        {        sysClkDisable ();        sysClkEnable ();        }    return (OK);    }/******************************************************************************* sysClkInt - handle a system clock interrupt** This routine handles a system clock interrupt.  It increments the value* on the front panel display and calls the routine installed by* sysClkConnect().** RETURNS: N/A*/void sysClkInt (void)    {    /* mask interrupt 17 */    AU_INTC_MASK_CLEAR(0) = (1 << 17);    sysWbFlush();    /* clear pending bit */    AU_INTC_RISING_EDGE_CLEAR (0) = (1 << 17);    sysWbFlush();    /* adjust counter */    AU_TOY_WRITE_REG = TIMER_WRITE_DELAY;    sysWbFlush();    sysToyControlPoll (AU_SYS_COUNTER_CONTROL_TS, 0);    /* enable interrupt */    AU_INTC_MASK_SET(0) = (1 << 17);    sysWbFlush();    /* execute connected routine */    if (sysClkRoutine != NULL)            (*sysClkRoutine) (sysClkArg);    }/******************************************************************************* sysClkConnect - connect a routine to the system clock interrupt** This routine specifies the interrupt handler to be called at each system* clock interrupt.  It does not enable system clock interrupts.  Normally,* it is called from usrRoot() in usrConfig.c to connect usrClock() to the* system clock interrupt.  Other standard interrupt handlers are also set up* at this time.** RETURN: OK, or ERROR if the routine cannot be connected to the interrupt.** SEE ALSO: intConnect(), usrClock()*/STATUS sysClkConnect    (    FUNCPTR routine,    /* routine called at each system clock interrupt */    int arg             /* argument with which to call routine           */    )    {    if (sysClkConnected == FALSE)        {        sysHwInit2 ();        sysClkConnected = TRUE;        }    sysClkRoutine   = routine;    sysClkArg       = arg;    return (OK);    }/******************************************************************************* sysClkDisable - turn off system clock interrupts** This routine disables system clock interrupts.** RETURNS: N/A** SEE ALSO: sysClkEnable(), sysClkRateSet()*/void sysClkDisable (void)    {    if (sysClkRunning)        {        AU_INTC_MASK_CLEAR(0) = (1 << 17);        sysWbFlush();        sysClkRunning = FALSE;        }    }#ifdef INCLUDE_AUX_CLK/******************************************************************************* sysRtcControlPoll - poll the status bit in counter control register** This routine polls the required bit in RTC control register.* Routine can poll bit for both 0 and 1.** RETURNS: OK, ERROR** SEE ALSO: sysClkEnable()*/int sysRtcControlPoll (UINT32 bit, int pollvalue)    {    int count=0;    if (pollvalue == 0)        {        while (AU_RTC_CONTROL_REG & bit)   /* wait for bit=0 */

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