config.h

au1500开发的应用程序

/* config.h - V100R001SCB configuration header file */

/* Copyright 2002-2005 Founder Communications,Inc. */

/*
modification history
--------------------
01a,20feb05,fhchen  adapted from wrSbc8260Atm/config.h (ver 01i)
*/

/*
DESCRIPTION  

This file contains the configuration parameters for the BSP.
V100R001 SCB only support hardcoded frequency configuration.

*/

#ifndef	__INCconfigh
#define	__INCconfigh

#ifdef __cplusplus
extern "C" {
#endif

/*
 * BSP version/revision identification
 * Should be placed before the the #include "configAll.h"
 */

#define BSP_VER_1_1   1
#define BSP_VERSION   "1.2"
#define BSP_REV       "/0"  

/* Global configuration information */

#include "configAll.h"

/* Frequency configuration */

#undef  HARDCODED_FREQ_PARMS
#define HARDCODED_FREQ_PARMS

#ifdef  HARDCODED_FREQ_PARMS
# define INPUT_FREQUENCY        FREQ_66MHZ
# define CPM_FREQUENCY          FREQ_166MHZ
# define CORE_FREQUENCY         FREQ_200MHZ
#endif /* HARDCODED_FREQ_PARMS */

#define DEC_CLOCK_FREQ          sysInputFreqGet()
#define SYS_CPU_FREQ            sysInputFreqGet()

/* Cache configuration  */

#define INCLUDE_CACHE_SUPPORT
#define USER_I_CACHE_ENABLE  
#undef	USER_I_CACHE_MODE
#define USER_I_CACHE_MODE       CACHE_COPYBACK /* select COPYBACK or WRITETHROUGH */

#define USER_D_CACHE_ENABLE  
#undef	USER_D_CACHE_MODE
#define USER_D_CACHE_MODE       CACHE_COPYBACK /* select COPYBACK or WRITETHROUGH */

/* MMU configuration  */

#define INCLUDE_MMU_BASIC
#undef  INCLUDE_MMU_FULL
#define USER_I_MMU_ENABLE
#define USER_D_MMU_ENABLE

/* Flash address definitions */

#define SIZE_64MB		0x04000000
#define SIZE_16MB		0x01000000
#define SIZE_512KB		0x00080000
#define SIZE_64KB               0x10000
#define SIZE_8KB		0x2000
#define SIZE_4KB                0x1000    

#define CS0_FLASH_ADRS          0xFFF00000
#define CS0_FLASH_SIZE          SIZE_512KB  /* 512KB */
#define CS0_RESERVE_SIZE        SIZE_64KB   /* 64KB for NvRam, the last sector */
#define CS0_RESERVE_ADRS        (CS0_FLASH_ADRS + CS0_FLASH_SIZE - CS0_RESERVE_SIZE)
#define CS1_FLASH_ADRS          0x10000000
#define CS1_FLASH_SIZE          SIZE_16MB   /* 16MB */
#define CS2_FLASH_ADRS	        0x11000000
#define CS2_FLASH_SIZE	        SIZE_16MB   /* 16MB */

/* CPLD */

#define CPLD_ADRS		0x30000000   /* on board CPLD base address */
#define CPLD_SIZE  		SIZE_4KB     /* 4KB CPLD space */

/* FPGA */

#define CS9_FPGA_ADRS                0x40000000   /* on board FPGA base address */
#define CS9_FPGA_SIZE                SIZE_64KB    /* 64KB */

/* Memory configuration */

/*
 * The constants ROM_TEXT_ADRS, ROM_SIZE, and RAM_HIGH_ADRS are defined
 * in config.h and Makefile. All definitions for these constants must be
 * identical.  (can be fine-tuned for various configurations)
 * 
 */

#define INCLUDE_CS4_60X_SDRAM
#undef  INCLUDE_CS4_60X_SDRAM

#define LOCAL_MEM_LOCAL_ADRS    0x00000000        /* Base of RAM                */

#if defined(INCLUDE_CS4_60X_SDRAM)
# define LOCAL_MEM_SIZE          0x08000000        /* 128MByte memory            */
#else
# define LOCAL_MEM_SIZE          0x04000000        /* 64MByte memory            */
#endif    

#define USER_RESERVED_MEM       0x00040000        /* reserve 256KB  */
#define ROM_SIZE                (CS0_FLASH_SIZE - CS0_RESERVE_SIZE)
                                                  /* (512 - 64)KByte ROM space         */
#define ROM_BASE_ADRS           0xFFF00000        /* base address of ROM        */
#define ROM_TEXT_ADRS           ROM_BASE_ADRS + 0x100
#define RAM_LOW_ADRS            0x00010000        /* RAM address for sys image  */
#define RAM_HIGH_ADRS           0x00500000        /* RAM address for ROM boot   */
                                
#define ROM_WARM_ADRS	        (ROM_TEXT_ADRS+8) /* warm reboot entry */
                                
#ifndef RAM_DST_ADRS                        /* default uncompress destination */
# define RAM_DST_ADRS            RAM_HIGH_ADRS
#endif  /* RAM_DST_ADRS */

/* Local Bus SDRAM configuration */

#define INCLUDE_LOCAL_BUS_SDRAM              /* Include SDRAM on local bus */
#define LOCAL_BUS_SDRAM_ADRS    0x20000000   /* Local Bus SDRAM base adrs */
#define LOCAL_BUS_SDRAM_SIZE    0x02000000   /* 32MB Local Bus SDRAM */

/* Timer */

#define INCLUDE_AUX_CLK
#define INCLUDE_TIMESTAMP

#undef	SYS_CLK_RATE
#define SYS_CLK_RATE		100
#define AUX_CLK_RATE		1000    

#define SYS_CLK_RATE_MIN	1            /* minimum system clock rate */
#define SYS_CLK_RATE_MAX	8000         /* maximum system clock rate */
#define AUX_CLK_RATE_MIN	1            /* minimum auxiliary clock rate */
#define AUX_CLK_RATE_MAX	10000        /* maximum auxiliary clock rate */

/* TTY */

#define INCLUDE_TTY_DEV                      /* for command line building */
#undef	NUM_TTY
#define	NUM_TTY		        N_SIO_CHANNELS		

#undef  CONSOLE_TTY
#define CONSOLE_TTY		0
#undef  CONSOLE_BAUD_RATE
#define CONSOLE_BAUD_RATE	115200

/* Networking */

#define	INCLUDE_NETWORK
#define INCLUDE_NET_INIT
#define	INCLUDE_END    
#define INCLUDE_MOTFCCEND          
#undef  INCLUDE_BSD                          /*BSD driver not supported */

/* MAC Address */

#define ETHERNET_ADR_SET                /* enable 'N' command in bootConfig.c */
#define SCB_ENET_DEFAULT        0xA01E0000 
#define ENET_DEFAULT	        SCB_ENET_DEFAULT

#define MAC_ADRS_LEN	        6            /* 6 bytes in MAC address */
#define MAX_MAC_ADRS            4

#define SCB_ENET0  	    	0x00         /* from MSB to LSB */
#define SCB_ENET1  	    	0xA0
#define SCB_ENET2  	    	0x1E	  

#define SCB_ENET3_0	    	0xA0
#define SCB_ENET3_1	        0xA1
#define SCB_ENET3_2	        0xA2
#define SCB_ENET3_3	        0xA3
                                
#define SCB_ENET4 	        0xAA
#define SCB_ENET5	        0xA0

/* WDB */

#define INCLUDE_WDB

#ifdef INCLUDE_WDB
# undef  WDB_MODE    
# undef  WDB_COMM_TYPE
# define WDB_MODE        	WDB_MODE_TASK /* WDB_MODE_[DUAL|TASK|EXTERN] */
# define WDB_COMM_TYPE   	WDB_COMM_END
#endif  /* INCLUDE_WDB */ 

/* NvRAM configuration, emulated by flash (AM29LV040B * 1, 8bit) */

#if defined(CS0_RESERVE_SIZE) && defined(CS0_RESERVE_ADRS)
# define FLASH_WIDTH	        1
# define FLASH_CHIP_WIDTH       1    
# define FLASH_SIZE	        CS0_RESERVE_SIZE
# define FLASH_ADRS 	        CS0_RESERVE_ADRS
# define SYS_FLASH_TYPE         FLASH_29LV040B    
# define NV_RAM_SIZE	        CS0_RESERVE_SIZE
# define NV_RAM_ADRS            CS0_RESERVE_ADRS
#endif  /* if reserved space in CS0 */

#if (NV_RAM_SIZE != NONE)
# define NVRAM_INITIALIZED     "MAC_ADRS="  /* Initialization Indicator */
# define NV_RAM_INIT_SIZE       (sizeof(NVRAM_INITIALIZED)-1)
# undef  NV_BOOT_OFFSET
# define NV_BOOT_OFFSET         (NV_RAM_INIT_SIZE + (MAC_ADRS_LEN * MAX_MAC_ADRS))  
# define NV_MAC_ADRS_OFFSET     -(MAC_ADRS_LEN * MAX_MAC_ADRS)
#endif  /* (NV_RAM_SIZE != NONE) */

/* TrueFFS */

#undef  INCLUDE_TFFS                         /* turn off temp */

#ifdef INCLUDE_TFFS
# define INCLUDE_TFFS_SHOW
# define INCLUDE_DOSFS
#endif  /* INCLUDE_TFFS */

/* Boot-line*/

#define BOOT_VIA_TFFS           0
#define BOOT_VIA_MOTFCC         1

#define BOOT_DEVICE             BOOT_VIA_MOTFCC    

#if (BOOT_DEVICE == BOOT_VIA_MOTFCC)
# define BOOT_DEV_NAME          "motfcc"
#elif (BOOT_DEVICE == BOOT_VIA_TFFS)
# define BOOT_DEV_NAME          "/tffs"
#else
# define BOOT_DEV_NAME          "none"    
#endif 

#define DEFAULT_BOOT_LINE    BOOT_DEV_NAME                      \
                             "(0,0)test012:vxWorks "            \
                             "e=192.168.80.166:ffffff00 "       \
                             "h=192.168.81.10 "                 \
                             "g=192.168.80.2 "                  \
                             "u=scb pw=scb tn=SCB "             \
                             "f=0x00" 

 /*
  * If the FORCE_DEFAULT_BOOT_LINE is defined then the DEFAULT_BOOT_LINE
  * parameters are always used regardless of NVRAM values specified at
  * bootrom prompt, which will be stored in NVRAM.
  *
  * When debugging, if you intend to change DEFAULT_BOOT_LINE frequently,
  * then define FORCE_DEFAULT_BOOT_LINE. In final product image, undefine
  * this macro to use boot parameters in NVRAM.
  */

#define FORCE_DEFAULT_BOOT_LINE
#undef  FORCE_DEFAULT_BOOT_LINE

#ifdef  FORCE_DEFAULT_BOOT_LINE
# undef  NV_RAM_SIZE
# define NV_RAM_SIZE       NONE           /* disable boot parameters in NVRAM */
#endif  /* FORCE_DEFAULT_BOOT_LINE */

/* Hard Reset Configuration Word  */

#define INCLUDE_HRCW

#ifdef INCLUDE_HRCW
# define HRCW_BYTE_0       0x04
# define HRCW_BYTE_1       0x82
# define HRCW_BYTE_2       0x02
# define HRCW_BYTE_3       0x06
#endif  /* INCLUDE_HRCW */

/* Misc */

#define INCLUDE_SYSLED                       /* Include LED control routines */
#define INCLUDE_EXTERNAL_WATCHDOG            /* external hardware watchdog */
#define INCLUDE_REAL_TIME
#undef  INCLUDE_BP
#undef	INCLUDE_EX
#undef	INCLUDE_ENP
#undef	INCLUDE_SM_NET
#undef  INCLUDE_SM_SEQ_ADD

/*
 * User application initialization
 *
 * USER_APPL_INIT must be a valid C statement or block.  It is
 * included in the usrRoot() routine only if INCLUDE_USER_APPL is
 * defined. The code for USER_APPL_INIT is only an example.  The
 * user is expected to change it as needed.  The use of taskSpawn
 * is recommended over direct execution of the user routine.
 */

#undef	INCLUDE_USER_APPL
#define	USER_APPL_INIT \
	{ \
	IMPORT int myAppInit(); \
	taskSpawn ("myApp", 30, 0, 5120, \
		   myAppInit, 0x1, 0x2, 0x3, 0,0,0,0,0,0,0); \
	}

/* debug */

#define BSP_DEBUG

/* Include hardware header file */

#include "V100R001SCB.h"

#ifdef __cplusplus
}
#endif

#endif	/* __INCconfigh */

#if defined(PRJ_BUILD)
#include "prjParams.h"
#endif