📄 sysserial.c
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/* sysSerial.c - BSP serial device initialization */
/* Copyright 2002-2005 Founder Communications, Inc. */
/*
modification history
--------------------
01a,17feb05,fhchen adapted from ads8260/sysSerial.c (ver 01h)
*/
/*
DESCRIPTION
This library contains routines for initializing the on board SCCs and
SMCs. In V100R001 SCB board, SCC1, SCC4, SMC1 are used, they are
numbered as 1,2,0 respectively. SMC1 is used as console, SCC1 is used
to control power and monitor unit, SCC4 is used to control GPS.
REFERENCE
- ads8260/sysSerial.c
- wrSbc8260Atm/sysSerial.c
NOTE
- Original driver for SCC using 1 Rx BD followed by 1 Tx BD, and pBdBase
is pre-defined. This file uses m82xxDpramAlignedMalloc to get pBdBase,
and still use 1 Rx BD followed by 1 Tx BD. [Change this according SMC
driver if you got time, M8260_SCC_CHAN should be changed also.]
*/
/* includes */
#include "vxWorks.h"
#include "iv.h"
#include "intLib.h"
#include "config.h"
#include "sysLib.h"
#include "drv/mem/m82xxDpramLib.h"
#include "drv/sio/m8260Cp.h"
#include "drv/sio/m8260CpmMux.h"
#include "drv/mem/m8260Siu.h"
#include "m8260IntrCtl.h"
#include "m8260SccSio.h"
#include "m8260SmcSio.h"
/* externs */
IMPORT UINT32 vxImmrGet(void);
IMPORT int sysBaudClkFreq(void);
/* locals */
LOCAL PPC8260SMC_CHAN m8260SmcChan1;
LOCAL M8260_SCC_CHAN m8260SccChan1;
LOCAL M8260_SCC_CHAN m8260SccChan4;
/* forward declaration */
void sysSerialSccPinConfig(M8260_SCC_CHAN *pSccChan);
/******************************************************************************
*
* sysSerialHwInit - initialize the BSP serial devices to a quiesent state
*
* This routine initializes the BSP serial device descriptors and puts the
* devices in a quiesent state. It is called from sysHwInit() with
* interrupts locked.
*
* NOTE
* - In sysHwInit, IO ports must be initialized before sysSerialHwInit.
* - SMC1
* - Tx: 1 BD, buffer size is 1 byte
* - Rx: 16 BDs, buffer size is 1 byte
* - SCC1
* - Tx: 1 BD follow RxBD, buffer size is 1 byte
* - Rx: 1 BD, buffer size is 1 byte
* - SCC4
* - Tx: 1 BD follow RxBD, buffer size is 1 byte
* - Rx: 1 BD, buffer size is 1 byte
* - BGR are numbered through 1 ~ 4
*
* RETURNS: N/A
*/
void sysSerialHwInit (void)
{
UINT32 dpram1Base;
UINT32 allocatedAdrs;
int immrVal = vxImmrGet();
/*
* initialize SMC1 channel structure.
* smcNum should be 1 or 2, not 0 or 1.
*/
m8260SmcChan1.uart.smcNum = 1; /* SMC1 */
m8260SmcChan1.channelMode = 0; /* no mode yet,muse be 0 */
m8260SmcChan1.regBase = immrVal; /* IMMR reg has base addr */
m8260SmcChan1.clockRate = sysBaudClkFreq(); /* baud clock freq (Hz) */
m8260SmcChan1.bgrNum = 7; /* use BRG7 */
m8260SmcChan1.pBaud = (VINT32 *)BRGC7(m8260SmcChan1.regBase); /* BRGC7 */
m8260SmcChan1.uart.txBdNum = 1; /* use 1 transmit BD */
m8260SmcChan1.uart.txBufSize = 0x1; /* transmit buffer size */
m8260SmcChan1.uart.rxBdNum = 0x10; /* use 16 recive BD */
/* SMC1 registers */
m8260SmcChan1.uart.pSmcReg = (SMC_REG *)((UINT32)SMCMR1(m8260SmcChan1.regBase));
/*
* SMC1 TX/RX BD base
*
* - relative address, smc8260ResetChannel will add regBase to convert it
* to absolute address!
*/
allocatedAdrs = 0x0000ffff & (UINT32)m82xxDpramAlignedMalloc(8,8);
if(allocatedAdrs != 0)
{
m8260SmcChan1.uart.txBdBase = (SMC_BUF *) allocatedAdrs;
}
else
{
sysToMonitor(BOOT_NO_AUTOBOOT);
}
allocatedAdrs = 0x0000ffff & (UINT32)m82xxDpramAlignedMalloc(128,8);
if(allocatedAdrs != 0)
{
m8260SmcChan1.uart.rxBdBase = (SMC_BUF *) allocatedAdrs;
}
else
{
sysToMonitor(BOOT_NO_AUTOBOOT);
}
/* SMC1 Tx/Rx buffer base. why 2 bytes alignment? */
allocatedAdrs = (UINT32)m82xxDpramAlignedMalloc(0x80,2);
if(allocatedAdrs != 0)
{
m8260SmcChan1.uart.txBufBase = (u_char *) allocatedAdrs;
}
else
{
sysToMonitor(BOOT_NO_AUTOBOOT);
}
allocatedAdrs = (UINT32)m82xxDpramAlignedMalloc(0x80,2);
if(allocatedAdrs != 0)
{
m8260SmcChan1.uart.rxBufBase = (u_char *) allocatedAdrs;
}
else
{
sysToMonitor(BOOT_NO_AUTOBOOT);
}
/* SMC1 parameter RAM */
dpram1Base = MPC8260_DPRAM1_BASE(m8260SmcChan1.regBase);
allocatedAdrs = 0x0000ffff & (UINT32)m82xxDpramAlignedMalloc(0x34,64);
if(allocatedAdrs != 0)
{
*PPC8260_DPR_SMC1(dpram1Base) = allocatedAdrs;
}
else
{
sysToMonitor(BOOT_NO_AUTOBOOT);
}
m8260SmcChan1.uart.pSmc = (SMC *)((UINT32)
(*PPC8260_DPR_SMC1(dpram1Base) + m8260SmcChan1.regBase));
/*
* initialize SCC1 channel structure
*/
m8260SccChan1.sccNum = 1; /* scc1 */
m8260SccChan1.channelMode = 0; /* no mode yet, must be 0 */
m8260SccChan1.immrVal = immrVal; /* IMMR */
m8260SccChan1.clockRate = sysBaudClkFreq(); /* baud clock freq (Hz) */
m8260SccChan1.bgrNum = 1; /* use BRG1 */
/*
* BD base.
* - absolute address
* - 1 Rx BD followed by 1 Tx BD, 16 bytes
*/
allocatedAdrs = 0x0000ffff & (UINT32)m82xxDpramAlignedMalloc(16,8);
if(allocatedAdrs != 0)
{
m8260SccChan1.pBdBase = (char *)(immrVal + (UINT32) allocatedAdrs);
}
else
{
sysToMonitor(BOOT_NO_AUTOBOOT);
}
/* Rx/Tx buffer base */
allocatedAdrs = (UINT32)m82xxDpramAlignedMalloc(0x20,2);
if(allocatedAdrs != 0)
{
m8260SccChan1.txBufferAddr = (u_char *) allocatedAdrs;
}
else
{
sysToMonitor(BOOT_NO_AUTOBOOT);
}
allocatedAdrs = (UINT32)m82xxDpramAlignedMalloc(0x20,2);
if(allocatedAdrs != 0)
{
m8260SccChan1.rcvBufferAddr = (u_char *) allocatedAdrs;
}
else
{
sysToMonitor(BOOT_NO_AUTOBOOT);
}
/*
* initialize SCC4 channel structure
*/
m8260SccChan4.sccNum = 4; /* SCC4 */
m8260SccChan4.channelMode = 0; /* no mode yet, must be 0 */
m8260SccChan4.immrVal = immrVal; /* IMMR */
m8260SccChan4.clockRate = sysBaudClkFreq(); /* baud clock freq (Hz) */
m8260SccChan4.bgrNum = 4; /* use BRG4 */
/*
* BD base.
* - absolute address
* - 1 Rx BD followed by 1 Tx BD, 16 bytes
*/
allocatedAdrs = 0x0000ffff & (UINT32)m82xxDpramAlignedMalloc(16,8);
if(allocatedAdrs != 0)
{
m8260SccChan4.pBdBase = (char *) (immrVal + (UINT32) allocatedAdrs);
}
else
{
sysToMonitor(BOOT_NO_AUTOBOOT);
}
/* Rx/Tx buffer base */
allocatedAdrs = (UINT32)m82xxDpramAlignedMalloc(0x20,2);
if(allocatedAdrs != 0)
{
m8260SccChan4.txBufferAddr = (u_char *) allocatedAdrs;
}
else
{
sysToMonitor(BOOT_NO_AUTOBOOT);
}
allocatedAdrs = (UINT32)m82xxDpramAlignedMalloc(0x20,2);
if(allocatedAdrs != 0)
{
m8260SccChan4.rcvBufferAddr = (u_char *) allocatedAdrs;
}
else
{
sysToMonitor(BOOT_NO_AUTOBOOT);
}
/* disable interrupts from SMC1,SCC1 and SCC4 */
m8260IntDisable(INUM_SMC1);
m8260IntDisable(INUM_SCC1);
m8260IntDisable(INUM_SCC4);
/* configure pins for serial channels */
sysSerialSccPinConfig(&m8260SccChan4);
sysSerialSccPinConfig(&m8260SccChan1);
/* further initialize the channel */
smc8260DevInit(&m8260SmcChan1);
m8260SioDevInit(&m8260SccChan1);
m8260SioDevInit(&m8260SccChan4);
}
/******************************************************************************
*
* sysSerialHwInit2 - connect BSP serial device interrupts
*
* This routine connects the BSP serial device interrupts. It is called from
* sysHwInit2(). Serial device interrupts could not be connected in
* sysSerialHwInit() because the kernel memory allocator was not initialized
* at that point, and intConnect() calls malloc().
*
* RETURNS: N/A
*
* SEE ALSO: sysHwInit2()
*
*/
void sysSerialHwInit2 (void)
{
/* connect serial interrupts */
(void) intConnect (INUM_TO_IVEC(INUM_SMC1),
(VOIDFUNCPTR) smc8260Int, (int) &m8260SmcChan1);
(void) intConnect (INUM_TO_IVEC(INUM_SCC1),
(VOIDFUNCPTR) m8260SioInt, (int) &m8260SccChan1);
(void) intConnect (INUM_TO_IVEC(INUM_SCC4),
(VOIDFUNCPTR) m8260SioInt, (int) &m8260SccChan4);
/* enable serial interrupts */
intEnable(INUM_SMC1);
intEnable(INUM_SCC1);
intEnable(INUM_SCC4);
}
/******************************************************************************
*
* sysSerialChanGet - get the SIO_CHAN device associated with a serial channel
*
* This routine gets the SIO_CHAN device associated with a specified serial
* channel.SMC1, SCC1, SCC4 are numbered as 0,1,2 respectively.
*
* RETURNS: A pointer to the SIO_CHAN structure for the channel, or ERROR
* if the channel is invalid.
*/
SIO_CHAN * sysSerialChanGet
(
int channel /* serial channel */
)
{
if (0 == channel)
return ((SIO_CHAN *) &m8260SmcChan1);
else if (1 == channel)
return ((SIO_CHAN *) &m8260SccChan1);
else if (2 == channel)
return ((SIO_CHAN *) &m8260SccChan4);
else
return ((SIO_CHAN *) ERROR);
}
/*******************************************************************************
*
* sysSerialReset - reset the serail device
*
* This function calls sysSerialHwInit() to reset the serail device
*
* RETURNS: N/A
*
*/
void sysSerialReset (void)
{
sysSerialHwInit ();
}
/*******************************************************************************
*
* sysSerialSccPinConfig - configure SCC pins
*
* This function configure on board SCC pins according to hardware settings,
* enable/disable modem related signals.
*
* RETURNS: N/A
*
* NOTE:
* - pins of SCB SCC4
*
* PIN FUNC PODR PSOR PDIR PPAR
* ---- ------- ---- ---- ---- ----
* PC8 SCC4CD 0 0 0 0(1)
* PC3 SCC4CTS 0 0(1) 0 0(1)
* PD22 SCC4RXD 0 0 0 1
* PD21 SCC4TXD 0 0 1 1
* PD20 SCC4RTS 0 0 0(1) 0(1)
*
* - pins of SCB SCC1
*
* PIN FUNC PODR PSOR PDIR PPAR
* ---- ------- ---- ---- ---- ----
* PC15 SCC1CTS 0 0 0 0(1)
* PD31 SCC1RXD 0 0 0 1
* PD30 SCC1TXD 0 1 1 1
* PD29 SCC1RTS 0 0 0(1) 0(1)
* ???? SCC1CD ? ? ? ?
*
*/
void sysSerialSccPinConfig
(
M8260_SCC_CHAN *pSccChan /* serial channel */
)
{
UINT32 immrVal;
/* sanity check */
if(pSccChan == NULL)
return;
immrVal = pSccChan->immrVal;
switch(pSccChan->sccNum)
{
case 1: /* SCC1 */
/* PC */
*M8260_IOP_PCPAR(immrVal) &= ~PC15; /* disable CTS */
*M8260_IOP_PCSO(immrVal) &= ~PC15;
*M8260_IOP_PCDIR(immrVal) &= ~PC15;
*M8260_IOP_PCODR(immrVal) &= ~PC15;
/* PD */
*M8260_IOP_PDPAR(immrVal) |= (PD31 | PD30); /* enable RXD and TXD */
*M8260_IOP_PDPAR(immrVal) &= ~PD29; /* disable RTS */
*M8260_IOP_PDSO(immrVal) &= ~(PD31 | PD29);
*M8260_IOP_PDSO(immrVal) |= PD30;
*M8260_IOP_PDDIR(immrVal) &= ~(PD31 | PD29);
*M8260_IOP_PDDIR(immrVal) |= PD30;
*M8260_IOP_PDODR(immrVal) &= ~(PD31 | PD30 | PD29);
break;
case 4: /* SCC4 */
/* PC */
*M8260_IOP_PCPAR(immrVal) &= ~(PC8 | PC3); /* disable CD and CTS */
*M8260_IOP_PCSO(immrVal) &= ~(PC8 | PC3);
*M8260_IOP_PCDIR(immrVal) &= ~(PC8 | PC3);
*M8260_IOP_PCODR(immrVal) &= ~(PC8 | PC3);
/* PD */
*M8260_IOP_PDPAR(immrVal) |= (PD22 | PD21); /* enable RXD and TXD */
*M8260_IOP_PDPAR(immrVal) &= ~PD20; /* disable RTS */
*M8260_IOP_PDSO(immrVal) &= ~(PD22 | PD21 | PD20);
*M8260_IOP_PDDIR(immrVal) |= PD21;
*M8260_IOP_PDDIR(immrVal) &= ~(PD22 | PD20);
*M8260_IOP_PDODR(immrVal) &= ~(PD22 | PD21 | PD20);
break;
default:
break;
}
return;
}
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