ser_smdk24a0.cpp

来自「S3C24A0的完整BSP包,对开发此芯片的开发者很有用.」· C++ 代码 · 共 204 行

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
/*++
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.

Module Name:  

Abstract:

    Serial PDD for SamSang 24A0 Development Board.

Notes: 
--*/
#include <windows.h>
#include <types.h>
#include <ceddk.h>

#include <ddkreg.h>
#include <serhw.h>
#include <Serdbg.h>
#include <pdds3c24A0_ser.h>
#include <s3c24A0_base_regs.h>
#include <s3c24A0_ioport.h>

// CPdd24A0Serial1 is only use for UART 0 which 
// RTS CTS is use GPH0 GPH1
// DTR & DSR is USE GPH6 GPH7 which is UART2's Rx & Tx. You can not enable UART2 when this object is running.
class CPdd24A0Serial1 : public CPdd24A0Uart {
public:
    CPdd24A0Serial1(LPTSTR lpActivePath, PVOID pMdd, PHWOBJ pHwObj)
        : CPdd24A0Uart(lpActivePath, pMdd, pHwObj)
        {
        m_pIOPregs = NULL;
        m_fIsDSRSet = FALSE;
    }
    ~CPdd24A0Serial1() {
        if (m_pIOPregs!=NULL)
            MmUnmapIoSpace((PVOID)m_pIOPregs,0);
    }
    virtual BOOL Init() {
        PHYSICAL_ADDRESS    ioPhysicalBase = { S3C24A0_BASE_REG_PA_IOPORT, 0};
        ULONG               inIoSpace = 0;
        if (TranslateBusAddr(m_hParent,Internal,0, ioPhysicalBase,&inIoSpace,&ioPhysicalBase)) {
            // Map it if it is Memeory Mapped IO.
            m_pIOPregs = (S3C24A0_IOPORT_REG *)MmMapIoSpace(ioPhysicalBase, sizeof(S3C24A0_IOPORT_REG),FALSE);
        }
        if (m_pIOPregs) {
            DDKISRINFO ddi;
            if (GetIsrInfo(&ddi)== ERROR_SUCCESS && 
                    KernelIoControl(IOCTL_HAL_REQUEST_SYSINTR, &ddi.dwIrq, sizeof(UINT32), &ddi.dwSysintr, sizeof(UINT32), NULL))
            {   
                RegSetValueEx(DEVLOAD_SYSINTR_VALNAME,REG_DWORD,(PBYTE)&ddi.dwSysintr, sizeof(UINT32));
            }
            else
			{
                return FALSE;
			}

			m_pDTRPort = (volatile ULONG *)&(m_pIOPregs->GPDAT);
			m_pDSRPort = (volatile ULONG *)&(m_pIOPregs->GPDAT);
			m_dwDTRPortNum = 29;
			m_dwDSRPortNum = 28;            
            return CPdd24A0Uart::Init();
        }
        return FALSE;
    };
    virtual void    SetDefaultConfiguration() {

		m_pIOPregs->GPPU  |= (0x3<<28);
		m_pIOPregs->GPCON_U &= ~(0x3<<20 |3<<18); // clear uart 0 - dtr, dsr
		m_pIOPregs->GPCON_U |= (0x1<<20 | 0x0<<18); 
        
        CPdd24A0Uart::SetDefaultConfiguration();
    }
    virtual BOOL    InitModem(BOOL bInit) {
        SetDTR(bInit);
        return CPdd24A0Uart::InitModem(bInit);
    }
    virtual ULONG   GetModemStatus() {
        ULONG ulReturn = CPdd24A0Uart::GetModemStatus();
        ULONG ulEvent = 0;
        m_HardwareLock.Lock();
        BOOL fIsDSRSet = (((*m_pDSRPort) & (1<<m_dwDSRPortNum))==0);
        if (fIsDSRSet != m_fIsDSRSet) {
            ulEvent |= EV_DSR | EV_RLSD;
        }
        ulReturn |= (fIsDSRSet?(MS_DSR_ON|MS_RLSD_ON):0);
        m_fIsDSRSet = fIsDSRSet;
        m_HardwareLock.Unlock();
        if (ulEvent!=0)
            EventCallback(ulEvent,ulReturn);
        return ulReturn;
    }
    virtual void  SetDTR(BOOL bSet) {

        if (bSet)
            *m_pDTRPort &= ~(1<<m_dwDTRPortNum);
        else
            *m_pDTRPort |= (1<<m_dwDTRPortNum);

    };
private:
    volatile S3C24A0_IOPORT_REG * m_pIOPregs; 
    volatile ULONG *    m_pDTRPort;
    DWORD               m_dwDTRPortNum;
    volatile ULONG *    m_pDSRPort;
    DWORD               m_dwDSRPortNum;
    BOOL                m_fIsDSRSet;
};


// CPdd24A0Serial2 is only use for UART 2 which 
// RTS CTS is use GPH0 GPH1
// DTR & DSR is USE GPH6 GPH7 which is UART2's Rx & Tx. You can not enable UART2 when this object is running.
class CPdd24A0Serial2 : public CPdd24A0Uart {
public:
    CPdd24A0Serial2(LPTSTR lpActivePath, PVOID pMdd, PHWOBJ pHwObj)
        : CPdd24A0Uart(lpActivePath, pMdd, pHwObj)
        {
        m_pIOPregs = NULL;
    }
    ~CPdd24A0Serial2() {
        if (m_pIOPregs!=NULL)
            MmUnmapIoSpace((PVOID)m_pIOPregs,0);
    }
    virtual BOOL Init() {
        PHYSICAL_ADDRESS    ioPhysicalBase = { S3C24A0_BASE_REG_PA_IOPORT, 0};
        ULONG               inIoSpace = 0;
        if (TranslateBusAddr(m_hParent,Internal,0, ioPhysicalBase,&inIoSpace,&ioPhysicalBase)) {
            // Map it if it is Memeory Mapped IO.
            m_pIOPregs =(S3C24A0_IOPORT_REG *) MmMapIoSpace(ioPhysicalBase, sizeof(S3C24A0_IOPORT_REG),FALSE);
        }
        if (m_pIOPregs) {
            DDKISRINFO ddi;
            if (GetIsrInfo(&ddi)== ERROR_SUCCESS && 
                    KernelIoControl(IOCTL_HAL_REQUEST_SYSINTR, &ddi.dwIrq, sizeof(UINT32), &ddi.dwSysintr, sizeof(UINT32), NULL))
            {   
                RegSetValueEx(DEVLOAD_SYSINTR_VALNAME,REG_DWORD,(PBYTE)&ddi.dwSysintr, sizeof(UINT32));
            }
            else
                return FALSE;
            m_pIOPregs->GPCON_U &= ~(0x3<<20);	// clear GPCON_U for GP29 (IrDA_SDBW)
			m_pIOPregs->GPCON_U |= (0x1<<20);	// set GPCON_U for GP29 output
			m_pIOPregs->GPPU |= (0x1<<29);		// set GP29 pullup disable (external pullup)
			m_pIOPregs->GPDAT &= ~(0x1<<29);	// set GP29 signal low 

			m_pIOPregs->GPCON_U &= ~(0x3<<24 | 0x3<<22); // clear uart 1 - rx, tx
			m_pIOPregs->GPCON_U |= (0x2<<24 | 0x2<<22); 
			m_pIOPregs->GPPU |= (0x3<<30);
            return CPdd24A0Uart::Init();
        }
        return FALSE;
    };
    virtual void    SetDefaultConfiguration() {

		RETAILMSG(TRUE, (TEXT("CPdd24A0Serial2::IrDA Init virtual SetDefaultConfiguration \r\n")));
        CPdd24A0Uart::SetDefaultConfiguration();
    }
    virtual ULONG   GetModemStatus() {
        return (CPdd24A0Uart::GetModemStatus() | MS_CTS_ON);
    }
        virtual void    Rx_Pause(BOOL bSet) {
    	if(bSet)
    		m_pIOPregs->GPCON_U = (m_pIOPregs->GPCON_U & ~(0x3<<24)) | 0x0<<24;
    	else	
    		m_pIOPregs->GPCON_U = (m_pIOPregs->GPCON_U & ~(0x3<<24)) | 0x2<<24;
    }
    volatile S3C24A0_IOPORT_REG * m_pIOPregs; 
};
CSerialPDD * CreateSerialObject(LPTSTR lpActivePath, PVOID pMdd,PHWOBJ pHwObj, DWORD DeviceArrayIndex)
{
    CSerialPDD * pSerialPDD = NULL;
    switch (DeviceArrayIndex) {
      case 0:
        pSerialPDD = new CPdd24A0Serial1(lpActivePath,pMdd, pHwObj);
        break;
      case 1:
        pSerialPDD = new CPdd24A0Serial2(lpActivePath,pMdd, pHwObj);
        break;
    }
    if (pSerialPDD && !pSerialPDD->Init()) {
        delete pSerialPDD;
        pSerialPDD = NULL;
    }    
    return pSerialPDD;
}
void DeleteSerialObject(CSerialPDD * pSerialPDD)
{
    if (pSerialPDD)
        delete pSerialPDD;
}