📄 sys_control.h
字号:
#ifndef __AU1550_SYS_CONTROL_H#define __AU1550_SYS_CONTROL_H#define SYS_CTRL_PHYS_ADDRESS 0x11900000 typedef long uint32;/******System Control Register Offsets******/ #define SYS_TOYTRIM (0x0000)#define SYS_TOYWRITE (0x0004)#define SYS_TOYMATCH0 (0x0008)#define SYS_TOYMATCH1 (0x000C)#define SYS_TOYMATCH2 (0x0010)#define SYS_CNTRCTRL (0x0014)#define SYS_SCRATCH0 (0x0018)#define SYS_SCRATCH1 (0x001C)#define SYS_FREQCTRL0 (0x0020)#define SYS_FREQCTRL1 (0x0024)#define SYS_CLKSRC (0x0028)#define SYS_WAKEMSK (0x0034)#define SYS_ENDIAN (0x0038)#define SYS_POWERCTRL (0x003C)#define SYS_TOYREAD (0x0040)#define SYS_RTCTRIM (0x0044)#define SYS_RTCWRITE (0x0048)#define SYS_RTCMATCH0 (0x004C)#define SYS_RTCMATCH1 (0x0050)#define SYS_RTCMATCH2 (0x0054)#define SYS_RTCREAD (0x0058)#define SYS_WAKESRC (0x005C)#define SYS_CPUPLL (0x0060)#define SYS_AUXPLL (0x0064)#define SYS_SLPPWR (0x0078)#define SYS_SLEEP (0x007C) typedef volatile struct{ uint32 toytrim; uint32 toywrite; uint32 toymatch0; uint32 toymatch1; uint32 toymatch2; uint32 cntrctrl; uint32 scratch0; uint32 scratch1; uint32 freqctrl0; uint32 freqctrl1; uint32 clksrc; /* 0x002C */ uint32 sys_pinfunc; /* 0x0030 */ uint32 reserved0; uint32 wakemsk; uint32 endian; uint32 powerctrl; uint32 toyread; uint32 rtctrim; uint32 rtcwrite; uint32 rtcmatch0; uint32 rtcmatch1; uint32 rtcmatch2; uint32 rtcread; uint32 wakesrc; uint32 cpupll; uint32 auxpll; /* 0x0068 */ uint32 reserved1; /* 0x006C */ uint32 reserved2; /* 0x0070 */ uint32 reserved3; /* 0x0074 */ uint32 reserved4; uint32 slppwr; uint32 sleep; /* 0x0080 */ uint32 reserved5[32];} SYS_CTRL;/********Register content definitions*********/ /* Clocks */#define SYS_FREQCTRL0_FRDIV2 (255<<22)#define SYS_FREQCTRL0_FE2 (1<<21)#define SYS_FREQCTRL0_FS2 (1<<20)#define SYS_FREQCTRL0_FRDIV1 (255<<12)#define SYS_FREQCTRL0_FE1 (1<<11)#define SYS_FREQCTRL0_FS1 (1<<10)#define SYS_FREQCTRL0_FRDIV0 (255<<2)#define SYS_FREQCTRL0_FE0 (1<<1)#define SYS_FREQCTRL0_FS0 (1<<0)#define SYS_FREQCTRL0_FRDIV2_N(N) ((N/2)-1<<22)#define SYS_FREQCTRL0_FRDIV1_N(N) ((N/2)-1<<12)#define SYS_FREQCTRL0_FRDIV0_N(N) ((N/2)-1<<2)#define SYS_FREQCTRL1_FRDIV5 (255<<22)#define SYS_FREQCTRL1_FE5 (1<<21)#define SYS_FREQCTRL1_FS5 (1<<20)#define SYS_FREQCTRL1_FRDIV4 (255<<12)#define SYS_FREQCTRL1_FE4 (1<<11)#define SYS_FREQCTRL1_FS4 (1<<10)#define SYS_FREQCTRL1_FRDIV3 (255<<2)#define SYS_FREQCTRL1_FE3 (1<<1)#define SYS_FREQCTRL1_FS3 (1<<0)#define SYS_FREQCTRL1_FRDIV5_N(N) ((N/2)-1<<22)#define SYS_FREQCTRL1_FRDIV4_N(N) ((N/2)-1<<12)#define SYS_FREQCTRL1_FRDIV3_N(N) ((N/2)-1<<2)#define SYS_CLKSRC_ME1 (7<<27)#define SYS_CLKSRC_DE1 (1<<26)#define SYS_CLKSRC_CE1 (1<<25)#define SYS_CLKSRC_ME0 (7<<22)#define SYS_CLKSRC_DE0 (1<<21)#define SYS_CLKSRC_CE0 (1<<20)#define SYS_CLKSRC_MPC (7<<17)#define SYS_CLKSRC_DPC (1<<16)#define SYS_CLKSRC_CPC (1<<15)#define SYS_CLKSRC_MUH (7<<12)#define SYS_CLKSRC_DUH (1<<11)#define SYS_CLKSRC_CUH (1<<10)#define SYS_CLKSRC_MUD (7<<7)#define SYS_CLKSRC_DUD (1<<6)#define SYS_CLKSRC_CUD (1<<5)//#define SYS_CLKSRC_MIR (7<<2)//#define SYS_CLKSRC_DIR (1<<1)//#define SYS_CLKSRC_CIR (1<<0)#define SYS_CLKSRC_ME1_N(N) (N<<27)#define SYS_CLKSRC_ME0_N(N) (N<<22)#define SYS_CLKSRC_MPC_N(N) (N<<17)#define SYS_CLKSRC_MUH_N(N) (N<<12)#define SYS_CLKSRC_MUD_N(N) (N<<7)#define SYS_CLKSRC_MIR_N(N) (N<<2)#define SYS_CLKSRC_MUX_RES (0)#define SYS_CLKSRC_MUX_AUX (1)#define SYS_CLKSRC_MUX_FREQ0 (2)#define SYS_CLKSRC_MUX_FREQ1 (3)#define SYS_CLKSRC_MUX_FREQ2 (4)#define SYS_CLKSRC_MUX_FREQ3 (5)#define SYS_CLKSRC_MUX_FREQ4 (6)#define SYS_CLKSRC_MUX_FREQ5 (7)#define SYS_CPUPLL_PLL (63<<0)#define SYS_AUXPLL_PLL (63<<0) /* TOY & RTC */#define SYS_CNTRCTRL_RTS (1<<20)#define SYS_CNTRCTRL_RM2 (1<<19)#define SYS_CNTRCTRL_RM1 (1<<18)#define SYS_CNTRCTRL_RM0 (1<<17)#define SYS_CNTRCTRL_RS (1<<16)#define SYS_CNTRCTRL_BP (1<<14)#define SYS_CNTRCTRL_EO (1<<8)#define SYS_CNTRCTRL_CCS (1<<7)#define SYS_CNTRCTRL_TTS (1<<4)#define SYS_CNTRCTRL_TM2 (1<<3)#define SYS_CNTRCTRL_TM1 (1<<2)#define SYS_CNTRCTRL_TM0 (1<<1)#define SYS_CNTRCTRL_TS (1<<0) /* Power Management */#define SYS_WAKEMSK_M2 (1<<8)//#define SYS_WAKEMSK_GPIO7 (1<<7)//#define SYS_WAKEMSK_GPIO6 (1<<6)//#define SYS_WAKEMSK_GPIO5 (1<<5)//#define SYS_WAKEMSK_GPIO4 (1<<4)//#define SYS_WAKEMSK_GPIO3 (1<<3)//#define SYS_WAKEMSK_GPIO2 (1<<2)//#define SYS_WAKEMSK_GPIO1 (1<<1)//#define SYS_WAKEMSK_GPIO0 (1<<0)#define SYS_ENDIAN_EN (1<<0)#define SYS_ENDIAN_EN_EL (1<<0)#define SYS_ENDIAN_EN_EB (0<<0)#define SYS_POWERCTRL_VPUT (3<<2)#define SYS_POWERCTRL_VPUT_100ms (0<<2)#define SYS_POWERCTRL_VPUT_30ms (1<<2)#define SYS_POWERCTRL_VPUT_10ms (2<<2)#define SYS_POWERCTRL_VPUT_1ms (3<<2)#define SYS_POWERCTRL_SD (3<<0)#define SYS_POWERCTRL_SD_2 (0<<0)#define SYS_POWERCTRL_SD_3 (1<<0)#define SYS_POWERCTRL_SD_4 (2<<0)#define SYS_POWERCTRL_SD_5 (3<<0)#define SYS_WAKESRC_M2C (1<<25)#define SYS_WAKESRC_M2S (1<<24)#define SYS_WAKESRC_GP7 (1<<23)#define SYS_WAKESRC_GP6 (1<<22)#define SYS_WAKESRC_GP5 (1<<21)#define SYS_WAKESRC_GP4 (1<<20)#define SYS_WAKESRC_GP3 (1<<19)#define SYS_WAKESRC_GP2 (1<<18)#define SYS_WAKESRC_GP1 (1<<17)#define SYS_WAKESRC_GP0 (1<<16)#define SYS_WAKESRC_Cw (1<<2)#define SYS_WAKESRC_SW (1<<1)#define SYS_WAKESRC_IP (1<<0)#define SYS_SLPPWR_SP (1<<0)#define SYS_SLEEP_SL (1<<0)#endif⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -