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📄 240t.map.eqn

📁 很好的一个东西,希望能对大家有所帮助.关于PWM的编程.
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--B1_cnt[22] is t240t:inst|cnt[22]
--operation mode is arithmetic

B1_cnt[22]_carry_eqn = B1L36;
B1_cnt[22]_lut_out = B1_cnt[22] $ (B1_cnt[22]_carry_eqn);
B1_cnt[22] = DFFEAS(B1_cnt[22]_lut_out, clk, VCC, , , , , rst, );

--B1L38 is t240t:inst|cnt[22]~384
--operation mode is arithmetic

B1L38 = CARRY(!B1L36 # !B1_cnt[22]);


--B1_cnt[23] is t240t:inst|cnt[23]
--operation mode is arithmetic

B1_cnt[23]_carry_eqn = B1L38;
B1_cnt[23]_lut_out = B1_cnt[23] $ (!B1_cnt[23]_carry_eqn);
B1_cnt[23] = DFFEAS(B1_cnt[23]_lut_out, clk, VCC, , , , , rst, );

--B1L40 is t240t:inst|cnt[23]~388
--operation mode is arithmetic

B1L40 = CARRY(B1_cnt[23] & (!B1L38));


--B1_cnt[24] is t240t:inst|cnt[24]
--operation mode is arithmetic

B1_cnt[24]_carry_eqn = B1L40;
B1_cnt[24]_lut_out = B1_cnt[24] $ (B1_cnt[24]_carry_eqn);
B1_cnt[24] = DFFEAS(B1_cnt[24]_lut_out, clk, VCC, , , , , rst, );

--B1L42 is t240t:inst|cnt[24]~392
--operation mode is arithmetic

B1L42 = CARRY(!B1L40 # !B1_cnt[24]);


--B1_cnt[25] is t240t:inst|cnt[25]
--operation mode is arithmetic

B1_cnt[25]_carry_eqn = B1L42;
B1_cnt[25]_lut_out = B1_cnt[25] $ (!B1_cnt[25]_carry_eqn);
B1_cnt[25] = DFFEAS(B1_cnt[25]_lut_out, clk, VCC, , , , , rst, );

--B1L44 is t240t:inst|cnt[25]~396
--operation mode is arithmetic

B1L44 = CARRY(B1_cnt[25] & (!B1L42));


--E2L1 is sevenseg:inst8|reduce_or~121
--operation mode is normal

E2L1 = B1_cnt[22] & (B1_cnt[25] # B1_cnt[23] $ B1_cnt[24]) # !B1_cnt[22] & (B1_cnt[23] # B1_cnt[24] $ B1_cnt[25]);


--B1_cnt[26] is t240t:inst|cnt[26]
--operation mode is arithmetic

B1_cnt[26]_carry_eqn = B1L44;
B1_cnt[26]_lut_out = B1_cnt[26] $ (B1_cnt[26]_carry_eqn);
B1_cnt[26] = DFFEAS(B1_cnt[26]_lut_out, clk, VCC, , , , , rst, );

--B1L46 is t240t:inst|cnt[26]~400
--operation mode is arithmetic

B1L46 = CARRY(!B1L44 # !B1_cnt[26]);


--B1_cnt[27] is t240t:inst|cnt[27]
--operation mode is arithmetic

B1_cnt[27]_carry_eqn = B1L46;
B1_cnt[27]_lut_out = B1_cnt[27] $ (!B1_cnt[27]_carry_eqn);
B1_cnt[27] = DFFEAS(B1_cnt[27]_lut_out, clk, VCC, , , , , rst, );

--B1L48 is t240t:inst|cnt[27]~404
--operation mode is arithmetic

B1L48 = CARRY(B1_cnt[27] & (!B1L46));


--B1_cnt[28] is t240t:inst|cnt[28]
--operation mode is arithmetic

B1_cnt[28]_carry_eqn = B1L48;
B1_cnt[28]_lut_out = B1_cnt[28] $ (B1_cnt[28]_carry_eqn);
B1_cnt[28] = DFFEAS(B1_cnt[28]_lut_out, clk, VCC, , , , , rst, );

--B1L50 is t240t:inst|cnt[28]~408
--operation mode is arithmetic

B1L50 = CARRY(!B1L48 # !B1_cnt[28]);


--B1_cnt[29] is t240t:inst|cnt[29]
--operation mode is normal

B1_cnt[29]_carry_eqn = B1L50;
B1_cnt[29]_lut_out = B1_cnt[29] $ (!B1_cnt[29]_carry_eqn);
B1_cnt[29] = DFFEAS(B1_cnt[29]_lut_out, clk, VCC, , , , , rst, );


--E1L1 is sevenseg:inst7|reduce_or~121
--operation mode is normal

E1L1 = B1_cnt[26] & (B1_cnt[29] # B1_cnt[27] $ B1_cnt[28]) # !B1_cnt[26] & (B1_cnt[27] # B1_cnt[28] $ B1_cnt[29]);


--B1_cnt[17] is t240t:inst|cnt[17]
--operation mode is arithmetic

B1_cnt[17]_carry_eqn = B1L26;
B1_cnt[17]_lut_out = B1_cnt[17] $ (!B1_cnt[17]_carry_eqn);
B1_cnt[17] = DFFEAS(B1_cnt[17]_lut_out, clk, VCC, , , , , rst, );

--B1L28 is t240t:inst|cnt[17]~416
--operation mode is arithmetic

B1L28 = CARRY(B1_cnt[17] & (!B1L26));


--B1_cnt[18] is t240t:inst|cnt[18]
--operation mode is arithmetic

B1_cnt[18]_carry_eqn = B1L28;
B1_cnt[18]_lut_out = B1_cnt[18] $ (B1_cnt[18]_carry_eqn);
B1_cnt[18] = DFFEAS(B1_cnt[18]_lut_out, clk, VCC, , , , , rst, );

--B1L30 is t240t:inst|cnt[18]~420
--operation mode is arithmetic

B1L30 = CARRY(!B1L28 # !B1_cnt[18]);


--D1L12 is leddrv:inst3|out[6]~175
--operation mode is normal

D1L12 = !B1_cnt[18] & (B1_cnt[17] & E2L1 # !B1_cnt[17] & (E1L1));


--E2L2 is sevenseg:inst8|reduce_or~122
--operation mode is normal

E2L2 = B1_cnt[23] & (!B1_cnt[24] & !B1_cnt[25]) # !B1_cnt[23] & B1_cnt[22] & (B1_cnt[24] $ !B1_cnt[25]);


--E1L2 is sevenseg:inst7|reduce_or~122
--operation mode is normal

E1L2 = B1_cnt[27] & (!B1_cnt[28] & !B1_cnt[29]) # !B1_cnt[27] & B1_cnt[26] & (B1_cnt[28] $ !B1_cnt[29]);


--D1L11 is leddrv:inst3|out[5]~176
--operation mode is normal

D1L11 = B1_cnt[18] # B1_cnt[17] & E2L2 # !B1_cnt[17] & (E1L2);


--E2L3 is sevenseg:inst8|reduce_or~123
--operation mode is normal

E2L3 = B1_cnt[23] & B1_cnt[22] & (!B1_cnt[25]) # !B1_cnt[23] & (B1_cnt[24] & (!B1_cnt[25]) # !B1_cnt[24] & B1_cnt[22]);


--E1L3 is sevenseg:inst7|reduce_or~123
--operation mode is normal

E1L3 = B1_cnt[27] & B1_cnt[26] & (!B1_cnt[29]) # !B1_cnt[27] & (B1_cnt[28] & (!B1_cnt[29]) # !B1_cnt[28] & B1_cnt[26]);


--D1L10 is leddrv:inst3|out[4]~177
--operation mode is normal

D1L10 = B1_cnt[18] # B1_cnt[17] & E2L3 # !B1_cnt[17] & (E1L3);


--E2L4 is sevenseg:inst8|reduce_or~124
--operation mode is normal

E2L4 = B1_cnt[23] & (B1_cnt[22] & B1_cnt[24] # !B1_cnt[22] & !B1_cnt[24] & B1_cnt[25]) # !B1_cnt[23] & !B1_cnt[25] & (B1_cnt[22] $ B1_cnt[24]);


--E1L4 is sevenseg:inst7|reduce_or~124
--operation mode is normal

E1L4 = B1_cnt[27] & (B1_cnt[26] & B1_cnt[28] # !B1_cnt[26] & !B1_cnt[28] & B1_cnt[29]) # !B1_cnt[27] & !B1_cnt[29] & (B1_cnt[26] $ B1_cnt[28]);


--D1L9 is leddrv:inst3|out[3]~178
--operation mode is normal

D1L9 = B1_cnt[18] # B1_cnt[17] & E2L4 # !B1_cnt[17] & (E1L4);


--E2L5 is sevenseg:inst8|reduce_or~125
--operation mode is normal

E2L5 = B1_cnt[24] & B1_cnt[25] & (B1_cnt[23] # !B1_cnt[22]) # !B1_cnt[24] & !B1_cnt[22] & B1_cnt[23] & !B1_cnt[25];


--E1L5 is sevenseg:inst7|reduce_or~125
--operation mode is normal

E1L5 = B1_cnt[28] & B1_cnt[29] & (B1_cnt[27] # !B1_cnt[26]) # !B1_cnt[28] & !B1_cnt[26] & B1_cnt[27] & !B1_cnt[29];


--D1L8 is leddrv:inst3|out[2]~179
--operation mode is normal

D1L8 = B1_cnt[18] # B1_cnt[17] & E2L5 # !B1_cnt[17] & (E1L5);


--E2L6 is sevenseg:inst8|reduce_or~126
--operation mode is normal

E2L6 = B1_cnt[23] & (B1_cnt[22] & (B1_cnt[25]) # !B1_cnt[22] & B1_cnt[24]) # !B1_cnt[23] & B1_cnt[24] & (B1_cnt[22] $ B1_cnt[25]);


--E1L6 is sevenseg:inst7|reduce_or~126
--operation mode is normal

E1L6 = B1_cnt[27] & (B1_cnt[26] & (B1_cnt[29]) # !B1_cnt[26] & B1_cnt[28]) # !B1_cnt[27] & B1_cnt[28] & (B1_cnt[26] $ B1_cnt[29]);


--D1L7 is leddrv:inst3|out[1]~180
--operation mode is normal

D1L7 = B1_cnt[18] # B1_cnt[17] & E2L6 # !B1_cnt[17] & (E1L6);


--E2L7 is sevenseg:inst8|reduce_or~127
--operation mode is normal

E2L7 = B1_cnt[24] & !B1_cnt[23] & (B1_cnt[22] $ !B1_cnt[25]) # !B1_cnt[24] & B1_cnt[22] & (B1_cnt[23] $ !B1_cnt[25]);


--E1L7 is sevenseg:inst7|reduce_or~127
--operation mode is normal

E1L7 = B1_cnt[28] & !B1_cnt[27] & (B1_cnt[26] $ !B1_cnt[29]) # !B1_cnt[28] & B1_cnt[26] & (B1_cnt[27] $ !B1_cnt[29]);


--D1L6 is leddrv:inst3|out[0]~181
--operation mode is normal

D1L6 = B1_cnt[18] # B1_cnt[17] & E2L7 # !B1_cnt[17] & (E1L7);


--B1_cnt[13] is t240t:inst|cnt[13]
--operation mode is arithmetic

B1_cnt[13]_carry_eqn = B1L18;
B1_cnt[13]_lut_out = B1_cnt[13] $ (!B1_cnt[13]_carry_eqn);
B1_cnt[13] = DFFEAS(B1_cnt[13]_lut_out, clk, VCC, , , , , rst, );

--B1L20 is t240t:inst|cnt[13]~424
--operation mode is arithmetic

B1L20 = CARRY(B1_cnt[13] & (!B1L18));


--B1_cnt[14] is t240t:inst|cnt[14]
--operation mode is arithmetic

B1_cnt[14]_carry_eqn = B1L20;
B1_cnt[14]_lut_out = B1_cnt[14] $ (B1_cnt[14]_carry_eqn);
B1_cnt[14] = DFFEAS(B1_cnt[14]_lut_out, clk, VCC, , , , , rst, );

--B1L22 is t240t:inst|cnt[14]~428
--operation mode is arithmetic

B1L22 = CARRY(!B1L20 # !B1_cnt[14]);


--B1_cnt[15] is t240t:inst|cnt[15]
--operation mode is arithmetic

B1_cnt[15]_carry_eqn = B1L22;
B1_cnt[15]_lut_out = B1_cnt[15] $ (!B1_cnt[15]_carry_eqn);
B1_cnt[15] = DFFEAS(B1_cnt[15]_lut_out, clk, VCC, , , , , rst, );

--B1L24 is t240t:inst|cnt[15]~432
--operation mode is arithmetic

B1L24 = CARRY(B1_cnt[15] & (!B1L22));


--B1_cnt[16] is t240t:inst|cnt[16]
--operation mode is arithmetic

B1_cnt[16]_carry_eqn = B1L24;
B1_cnt[16]_lut_out = B1_cnt[16] $ (B1_cnt[16]_carry_eqn);
B1_cnt[16] = DFFEAS(B1_cnt[16]_lut_out, clk, VCC, , , , , rst, );

--B1L26 is t240t:inst|cnt[16]~436
--operation mode is arithmetic

B1L26 = CARRY(!B1L24 # !B1_cnt[16]);


--D1L2 is leddrv:inst3|cs[3]~185
--operation mode is normal

D1L2 = B1_cnt[13] # B1_cnt[14] # B1_cnt[15] # B1_cnt[16];


--D1L3 is leddrv:inst3|cs~186
--operation mode is normal

D1L3 = B1_cnt[18] & B1_cnt[17] & D1L2;


--D1L4 is leddrv:inst3|cs~187
--operation mode is normal

D1L4 = B1_cnt[18] & D1L2 & (!B1_cnt[17]);


--D1L5 is leddrv:inst3|cs~188
--operation mode is normal

D1L5 = B1_cnt[17] & D1L2 & (!B1_cnt[18]);


--D1L1 is leddrv:inst3|cs[0]~189
--operation mode is normal

D1L1 = D1L2 & (!B1_cnt[18] & !B1_cnt[17]);


--C1_out[7] is pwm:inst1|out[7]
--operation mode is normal

C1_out[7]_lut_out = C1L1;
C1_out[7] = DFFEAS(C1_out[7]_lut_out, clk, VCC, , !rst, , , , );


--B1_cnt[21] is t240t:inst|cnt[21]
--operation mode is arithmetic

B1_cnt[21]_carry_eqn = B1L34;
B1_cnt[21]_lut_out = B1_cnt[21] $ (!B1_cnt[21]_carry_eqn);
B1_cnt[21] = DFFEAS(B1_cnt[21]_lut_out, clk, VCC, , , , , rst, );

--B1L36 is t240t:inst|cnt[21]~440
--operation mode is arithmetic

B1L36 = CARRY(B1_cnt[21] & (!B1L34));


--B1_cnt[12] is t240t:inst|cnt[12]
--operation mode is arithmetic

B1_cnt[12]_carry_eqn = B1L16;
B1_cnt[12]_lut_out = B1_cnt[12] $ (B1_cnt[12]_carry_eqn);
B1_cnt[12] = DFFEAS(B1_cnt[12]_lut_out, clk, VCC, , , , , rst, );

--B1L18 is t240t:inst|cnt[12]~444
--operation mode is arithmetic

B1L18 = CARRY(!B1L16 # !B1_cnt[12]);


--C1L1 is pwm:inst1|LessThan~105
--operation mode is normal

C1L1_carry_eqn = C1L3;
C1L1 = C1L16 & B1_cnt[29] & C1L1_carry_eqn # !C1L16 & (B1_cnt[29] # C1L1_carry_eqn);


--B1_cnt[20] is t240t:inst|cnt[20]
--operation mode is arithmetic

B1_cnt[20]_carry_eqn = B1L32;
B1_cnt[20]_lut_out = B1_cnt[20] $ (B1_cnt[20]_carry_eqn);
B1_cnt[20] = DFFEAS(B1_cnt[20]_lut_out, clk, VCC, , , , , rst, );

--B1L34 is t240t:inst|cnt[20]~448
--operation mode is arithmetic

B1L34 = CARRY(!B1L32 # !B1_cnt[20]);


--B1_cnt[11] is t240t:inst|cnt[11]
--operation mode is arithmetic

B1_cnt[11]_carry_eqn = B1L14;
B1_cnt[11]_lut_out = B1_cnt[11] $ (!B1_cnt[11]_carry_eqn);
B1_cnt[11] = DFFEAS(B1_cnt[11]_lut_out, clk, VCC, , , , , rst, );

--B1L16 is t240t:inst|cnt[11]~452
--operation mode is arithmetic

B1L16 = CARRY(B1_cnt[11] & (!B1L14));


--C1L16 is pwm:inst1|add~121
--operation mode is normal

C1L16_carry_eqn = C1L18;
C1L16 = C1_cnt[7] $ (C1L16_carry_eqn);

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