prev_cmp_240t.qmsg

很好的一个东西,希望能对大家有所帮助.关于PWM的编程.

{ "Info" "ISGN_ELABORATION_HEADER" "lpm_compare1:inst5\|lpm_compare:lpm_compare_component " "Info: Elaborated megafunction instantiation \"lpm_compare1:inst5\|lpm_compare:lpm_compare_component\"" {  } { { "lpm_compare1.v" "" { Text "E:/1EPM240demo/pwm/lpm_compare1.v" 61 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cmpr_hti.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cmpr_hti.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cmpr_hti " "Info: Found entity 1: cmpr_hti" {  } { { "db/cmpr_hti.tdf" "" { Text "E:/1EPM240demo/pwm/db/cmpr_hti.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cmpr_hti lpm_compare1:inst5\|lpm_compare:lpm_compare_component\|cmpr_hti:auto_generated " "Info: Elaborating entity \"cmpr_hti\" for hierarchy \"lpm_compare1:inst5\|lpm_compare:lpm_compare_component\|cmpr_hti:auto_generated\"" {  } { { "lpm_compare.tdf" "auto_generated" { Text "d:/altera/72/quartus/libraries/megafunctions/lpm_compare.tdf" 280 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "lpm_dff0.v 1 1 " "Warning: Using design file lpm_dff0.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_dff0 " "Info: Found entity 1: lpm_dff0" {  } { { "lpm_dff0.v" "" { Text "E:/1EPM240demo/pwm/lpm_dff0.v" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_dff0 lpm_dff0:inst7 " "Info: Elaborating entity \"lpm_dff0\" for hierarchy \"lpm_dff0:inst7\"" {  } { { "240t.bdf" "inst7" { Schematic "E:/1EPM240demo/pwm/240t.bdf" { { 144 80 224 224 "inst7" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/72/quartus/libraries/megafunctions/lpm_ff.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/72/quartus/libraries/megafunctions/lpm_ff.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_ff " "Info: Found entity 1: lpm_ff" {  } { { "lpm_ff.tdf" "" { Text "d:/altera/72/quartus/libraries/megafunctions/lpm_ff.tdf" 48 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_ff lpm_dff0:inst7\|lpm_ff:lpm_ff_component " "Info: Elaborating entity \"lpm_ff\" for hierarchy \"lpm_dff0:inst7\|lpm_ff:lpm_ff_component\"" {  } { { "lpm_dff0.v" "lpm_ff_component" { Text "E:/1EPM240demo/pwm/lpm_dff0.v" 68 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_dff0:inst7\|lpm_ff:lpm_ff_component " "Info: Elaborated megafunction instantiation \"lpm_dff0:inst7\|lpm_ff:lpm_ff_component\"" {  } { { "lpm_dff0.v" "" { Text "E:/1EPM240demo/pwm/lpm_dff0.v" 68 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "lpm_counter1.v 1 1 " "Warning: Using design file lpm_counter1.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter1 " "Info: Found entity 1: lpm_counter1" {  } { { "lpm_counter1.v" "" { Text "E:/1EPM240demo/pwm/lpm_counter1.v" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_counter1 lpm_counter1:inst2 " "Info: Elaborating entity \"lpm_counter1\" for hierarchy \"lpm_counter1:inst2\"" {  } { { "240t.bdf" "inst2" { Schematic "E:/1EPM240demo/pwm/240t.bdf" { { 264 272 416 392 "inst2" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_counter lpm_counter1:inst2\|lpm_counter:lpm_counter_component " "Info: Elaborating entity \"lpm_counter\" for hierarchy \"lpm_counter1:inst2\|lpm_counter:lpm_counter_component\"" {  } { { "lpm_counter1.v" "lpm_counter_component" { Text "E:/1EPM240demo/pwm/lpm_counter1.v" 70 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_counter1:inst2\|lpm_counter:lpm_counter_component " "Info: Elaborated megafunction instantiation \"lpm_counter1:inst2\|lpm_counter:lpm_counter_component\"" {  } { { "lpm_counter1.v" "" { Text "E:/1EPM240demo/pwm/lpm_counter1.v" 70 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_jli.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_jli.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_jli " "Info: Found entity 1: cntr_jli" {  } { { "db/cntr_jli.tdf" "" { Text "E:/1EPM240demo/pwm/db/cntr_jli.tdf" 25 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cntr_jli lpm_counter1:inst2\|lpm_counter:lpm_counter_component\|cntr_jli:auto_generated " "Info: Elaborating entity \"cntr_jli\" for hierarchy \"lpm_counter1:inst2\|lpm_counter:lpm_counter_component\|cntr_jli:auto_generated\"" {  } { { "lpm_counter.tdf" "auto_generated" { Text "d:/altera/72/quartus/libraries/megafunctions/lpm_counter.tdf" 272 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "lpm_constant0.v 1 1 " "Warning: Using design file lpm_constant0.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_constant0 " "Info: Found entity 1: lpm_constant0" {  } { { "lpm_constant0.v" "" { Text "E:/1EPM240demo/pwm/lpm_constant0.v" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_constant0 lpm_constant0:inst8 " "Info: Elaborating entity \"lpm_constant0\" for hierarchy \"lpm_constant0:inst8\"" {  } { { "240t.bdf" "inst8" { Schematic "E:/1EPM240demo/pwm/240t.bdf" { { 304 128 224 352 "inst8" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/72/quartus/libraries/megafunctions/lpm_constant.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/72/quartus/libraries/megafunctions/lpm_constant.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_constant " "Info: Found entity 1: lpm_constant" {  } { { "lpm_constant.tdf" "" { Text "d:/altera/72/quartus/libraries/megafunctions/lpm_constant.tdf" 39 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_constant lpm_constant0:inst8\|lpm_constant:lpm_constant_component " "Info: Elaborating entity \"lpm_constant\" for hierarchy \"lpm_constant0:inst8\|lpm_constant:lpm_constant_component\"" {  } { { "lpm_constant0.v" "lpm_constant_component" { Text "E:/1EPM240demo/pwm/lpm_constant0.v" 48 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_constant0:inst8\|lpm_constant:lpm_constant_component " "Info: Elaborated megafunction instantiation \"lpm_constant0:inst8\|lpm_constant:lpm_constant_component\"" {  } { { "lpm_constant0.v" "" { Text "E:/1EPM240demo/pwm/lpm_constant0.v" 48 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "IFTM_CARRY_SINGLE_TO_DOUBLE" "2 " "Info: Converted 2 single input CARRY primitives to CARRY_SUM primitives" {  } {  } 0 0 "Converted %1!d! single input CARRY primitives to CARRY_SUM primitives" 0 0 "" 0}
{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "1 " "Warning: Design contains 1 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "clk " "Warning (15610): No output dependent on input pin \"clk\"" {  } { { "240t.bdf" "" { Schematic "E:/1EPM240demo/pwm/240t.bdf" { { 504 -200 -32 520 "clk" "" } } } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0}  } {  } 0 0 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "42 " "Info: Implemented 42 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "2 " "Info: Implemented 2 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "4 " "Info: Implemented 4 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "35 " "Info: Implemented 35 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0} { "Info" "ICUT_CUT_TM_UFMS" "1 " "Info: Implemented 1 User Flash Memory blocks" {  } {  } 0 0 "Implemented %1!d! User Flash Memory blocks" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 12 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 12 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "141 " "Info: Allocated 141 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Wed Apr 09 08:18:30 2008 " "Info: Processing ended: Wed Apr 09 08:18:30 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Apr 09 08:18:31 2008 " "Info: Processing started: Wed Apr 09 08:18:31 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off 240t -c 240t " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off 240t -c 240t" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "240t EPM2210GF324C3 " "Info: Selected device EPM2210GF324C3 for design \"240t\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Info: Low junction temperature is 0 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "Info: High junction temperature is 85 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" {  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0}
{ "Info" "ITDC_FITTER_TIMING_ENGINE" "Classic " "Info: Fitter is using the Classic Timing Analyzer" {  } {  } 0 0 "Fitter is using the %1!s! Timing Analyzer" 0 0 "" 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1000 MHz " "Info: Assuming a global fmax requirement of 1000 MHz" {  } {  } 0 0 "Assuming a global %1!s! requirement of %2!s!" 0 0 "" 0} { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "tsu 2.0 ns " "Info: Assuming a global tsu requirement of 2.0 ns" {  } {  } 0 0 "Assuming a global %1!s! requirement of %2!s!" 0 0 "" 0} { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "tco 1.0 ns " "Info: Assuming a global tco requirement of 1.0 ns" {  } {  } 0 0 "Assuming a global %1!s! requirement of %2!s!" 0 0 "" 0} { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "tpd 1.0 ns " "Info: Assuming a global tpd requirement of 1.0 ns" {  } {  } 0 0 "Assuming a global %1!s! requirement of %2!s!" 0 0 "" 0}  } {  } 0 0 "Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" 0 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Extra Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Performing register packing on registers with non-logic cell location assignments" 1 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Extra Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Completed register packing on registers with non-logic cell location assignments" 1 0 "" 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0 0 "Completed %1!s!" 0 0 "" 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "altufm_osc0:inst10\|altufm_osc0_altufm_osc_rv5:altufm_osc0_altufm_osc_rv5_component\|wire_maxii_ufm_block1_osc Global clock " "Info: Automatically promoted signal \"altufm_osc0:inst10\|altufm_osc0_altufm_osc_rv5:altufm_osc0_altufm_osc_rv5_component\|wire_maxii_ufm_block1_osc\" to use Global clock" {  } { { "altufm_osc0.v" "" { Text "E:/1EPM240demo/pwm/altufm_osc0.v" 53 -1 0 } }  } 0 0 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0 "" 0}