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📄 cim_processor.mof

📁 Pegasus is an open-source implementationof the DMTF CIM and WBEM standards. It is designed to be por
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// Copyright (c) 2005 DMTF.  All rights reserved.// <change cr="ArchCR00066.004" type="add">Add UmlPackagePath// qualifier values to CIM Schema.</change>// ==================================================================//  CIM_Processor// ==================================================================   [UMLPackagePath ( "CIM::Device::Processor" ), Version ( "2.7.0" ),     Description (       "Capabilities and management of the Processor LogicalDevice.")]class CIM_Processor : CIM_LogicalDevice {      [Description (          "A free form string describing the role of the Processor - "          "for example, \"Central Processor\" or \"Math Processor\".")]   string Role;      [Description (          "The Processor family type. For example, values include "          "\"Pentium(R) processor with MMX(TM) technology\" (14) and "          "\"68040\" (96)."),        ValueMap { "1", "2", "3", "4", "5", "6", "7", "8", "9", "10",           // 11                           "11", "12", "13", "14", "15", "16", "17", "18", "19",           // 24                           "24", "25", "26", "27", "28", "29", "30", "31", "32", "33",          "34", "35", "36", "37", "38", "39",           // 48                           "48", "49", "50", "51", "52", "53", "54", "55",           // 64                           "64", "65", "66", "67", "68", "69",           // 80                           "80", "81", "82", "83", "84", "85", "86", "87", "88",           // 96                              "96", "97", "98", "99", "100", "101",           // 112                           "112", "120", "121", "122", "128", "130", "131", "132",           // 144                              "144", "145", "146", "147", "148", "149", "150",           // 160                              "160", "176", "177", "178", "179", "180", "181", "182",          "183", "184", "185",           // 190                           "190",           // 200                           "200", "201", "202", "203", "204",           // 250                           "250", "251", "260", "261", "280", "281",           // 300                           "300", "301", "302", "320", "350", "500" },        Values { "Other", "Unknown", "8086", "80286", "80386", "80486",          "8087", "80287", "80387", "80487",           // 11                             "Pentium(R) brand", "Pentium(R) Pro", "Pentium(R) II",          "Pentium(R) processor with MMX(TM) technology",          "Celeron(TM)", "Pentium(R) II Xeon(TM)", "Pentium(R) III",          "M1 Family", "M2 Family",           // 24                            "K5 Family", "K6 Family", "K6-2", "K6-3",          "AMD Athlon(TM) Processor Family",          "AMD(R) Duron(TM) Processor", "AMD29000 Family",           // 31                            "K6-2+", "Power PC Family", "Power PC 601", "Power PC 603",          "Power PC 603+", "Power PC 604", "Power PC 620",          "Power PC X704", "Power PC 750",           // 48                             "Alpha Family", "Alpha 21064", "Alpha 21066", "Alpha 21164",          "Alpha 21164PC", "Alpha 21164a", "Alpha 21264",          "Alpha 21364",           // 64                             "MIPS Family", "MIPS R4000", "MIPS R4200", "MIPS R4400",          "MIPS R4600", "MIPS R10000",           // 80                             "SPARC Family", "SuperSPARC", "microSPARC II",          "microSPARC IIep", "UltraSPARC", "UltraSPARC II",          "UltraSPARC IIi", "UltraSPARC III", "UltraSPARC IIIi",           // 96                             "68040", "68xxx Family", "68000", "68010", "68020", "68030",           // 112                             "Hobbit Family", "Crusoe(TM) TM5000 Family",          "Crusoe(TM) TM3000 Family", "Efficeon(TM) TM8000 Family",          "Weitek", "Itanium(TM) Processor",          "AMD Athlon(TM) 64 Processor Family",          "AMD Opteron(TM) Processor Family",           // 144                             "PA-RISC Family", "PA-RISC 8500", "PA-RISC 8000",          "PA-RISC 7300LC", "PA-RISC 7200", "PA-RISC 7100LC",          "PA-RISC 7100",           // 160                             "V30 Family", "Pentium(R) III Xeon(TM)",          "Pentium(R) III Processor with Intel(R) SpeedStep(TM) "           "Technology", "Pentium(R) 4", "Intel(R) Xeon(TM)",           // 180                             "AS400 Family", "Intel(R) Xeon(TM) processor MP",          "AMD Athlon(TM) XP Family", "AMD Athlon(TM) MP Family",          "Intel(R) Itanium(R) 2", "Intel(R) Pentium(R) M processor",           // 190                             "K7",           // 200                             "S/390 and zSeries Family", "ESA/390 G4", "ESA/390 G5",          "ESA/390 G6", "z/Architectur base",           // 250                             "i860", "i960", "SH-3", "SH-4", "ARM", "StrongARM",           // 300                             "6x86", "MediaGX", "MII", "WinChip", "DSP",       "Video Processor" },        MappingStrings { "MIF.DMTF|Processor|017.3" },        ModelCorrespondence { "CIM_Processor.OtherFamilyDescription" }]   uint16 Family;      [Description (          "A string describing the Processor Family type - used when "          "the Family property is set to 1 (\"Other\"). This string "          "should be set to NULL when the Family property is any value "          "other than 1."),        MaxLen ( 64 ),        ModelCorrespondence { "CIM_Processor.Family" }]   string OtherFamilyDescription;      [Description (          "CPU socket information including data on how this Processor "          "can be upgraded (if upgrades are supported). This property "          "is an integer enumeration."),        ValueMap { "1", "2", "3", "4", "5", "6", "7", "8", "9", "10",          "11", "12", "13", "14", "15", "16", "17", "18" },        Values { "Other", "Unknown", "Daughter Board", "ZIF Socket",          "Replacement/Piggy Back", "None", "LIF Socket", "Slot 1",          "Slot 2", "370 Pin Socket", "Slot A", "Slot M", "Socket 423",          "Socket A (Socket 462)", "Socket 478", "Socket 754",          "Socket 940", "Socket 939" },        MappingStrings { "MIF.DMTF|Processor|017.7" }]   uint16 UpgradeMethod;      [Description (          "The maximum speed (in MHz) of this Processor."),        Units ( "MegaHertz" ),        MappingStrings { "MIF.DMTF|Processor|017.5" }]   uint32 MaxClockSpeed;      [Description (          "The current speed (in MHz) of this Processor."),        Units ( "MegaHertz" ),        MappingStrings { "MIF.DMTF|Processor|017.6" }]   uint32 CurrentClockSpeed;      [Description (          "Processor data width in bits."),        Units ( "Bits" )]   uint16 DataWidth;      [Description (          "Processor address width in bits."),        Units ( "Bits" )]   uint16 AddressWidth;      [Description (          "Loading of this Processor, averaged over the last minute, "          "in Percent."),        Units ( "Percent" ), Gauge,        MappingStrings { "MIB.IETF|HOST-RESOURCES-MIB.hrProcessorLoad" }]   uint16 LoadPercentage;      [Description (          "Stepping is a free-form string indicating the revision "          "level of the Processor within the Processor.Family."),        ModelCorrespondence { "CIM_Processor.Family" }]   string Stepping;      [Description (          "A globally unique identifier for the Processor. This "          "identifier may only be unique within a Processor Family.")]   string UniqueID;      [Description (          "The CPUStatus property indicates the current status of the "          "Processor. For example, it may be disabled by the user via "          "BIOS (value=2), or disabled due to a POST error (value= 3). "          "Information in this property can be obtained from SMBIOS, "          "the Type 4 structure, the Status attribute."),        ValueMap { "0", "1", "2", "3", "4", "7" },        Values { "Unknown", "CPU Enabled",          "CPU Disabled by User via BIOS Setup",          "CPU Disabled By BIOS (POST Error)", "CPU Is Idle", "Other" }]   uint16 CPUStatus;};

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