swfct.c

Switch,Ic,driver,英飛凌6996m驅動程式,包括bandwidth-control以及basic-control功能

/******************************************************************************
     Copyright (c) 2005, Infineon Technologies.  All rights reserved.

                               No Warranty
    Because the program is licensed free of charge, there is no warranty for
    the program, to the extent permitted by applicable law.  Except when
    otherwise stated in writing the copyright holders and/or other parties
    provide the program "as is" without warranty of any kind, either
    expressed or implied, including, but not limited to, the implied
    warranties of merchantability and fitness for a particular purpose. The
    entire risk as to the quality and performance of the program is with
    you.  should the program prove defective, you assume the cost of all
    necessary servicing, repair or correction.

    In no event unless required by applicable law or agreed to in writing
    will any copyright holder, or any other party who may modify and/or
    redistribute the program as permitted above, be liable to you for
    damages, including any general, special, incidental or consequential
    damages arising out of the use or inability to use the program
    (including but not limited to loss of data or data being rendered
    inaccurate or losses sustained by you or third parties or a failure of
    the program to operate with any other programs), even if such holder or
    other party has been advised of the possibility of such damages.
 ******************************************************************************
    Module      : swfct.c
    Date        : 2005-06-23
    Creator     : Bolo Tsai
    Description :
    Remarks:

 *****************************************************************************/

#include <stdio.h>
#include <fcntl.h>
#include <sys/ioctl.h>
#include <string.h>

#include "ifx_swioctl.h"
#include "swfct.h"

word    RegWriteMode = SWI_IOC_WRITESMI;
word    RegReadMode  = SWI_IOC_READSMI;

REGRW   ifr;

void delay(unsigned int x)
{
    unsigned int i,j;

	for(i = 0; i < x; i++)
	{	
		for(j = 0; j < 100; j++);
	}
} 


void SWPortLink(int port_no, int accessMode, word *nway, word *speed, word *duplex, word *flowctrl)
{
    word value;
    struct PORT_ACCESS_DEF portStatusReg[] = {{SWI_PORT_STATUS0, 0}, {SWI_PORT_STATUS0, 8}, {SWI_PORT_STATUS1, 0},
                                              {SWI_PORT_STATUS1, 8}, {SWI_PORT_STATUS1, 12}, {SWI_PORT_STATUS2, 0}};
    word portAbilityReg[] = {SWI_PORT0_BASIC_CTRLREG, SWI_PORT1_BASIC_CTRLREG, SWI_PORT2_BASIC_CTRLREG,
                             SWI_PORT3_BASIC_CTRLREG, SWI_PORT4_BASIC_CTRLREG, SWI_PORT5_BASIC_CTRLREG};

    if (! accessMode) { // Read the port link status

        ifr.regAddr = portStatusReg[port_no].regAddr;
        value = SWI_ioctl(SWI_IOC_READSMI, &ifr); // SWI_IOC_READSMI only
        value = (value >> portStatusReg[port_no].shift) & 0x0f;

#ifdef  DBG
        printf("SWPortLink: read reg[%#x]=%#lx, value=%#x\n", ifr.regAddr, ifr.regVal, value);
#endif
        *nway = value & SWI_PORT_LINK_STATUS;
        *speed = (value & SWI_PORT_SPEED_STATUS) >> SWI_PORT_SPEED_OFFSET;
        *duplex = (value & SWI_PORT_DUPLEX_STATUS) >> SWI_PORT_DUPLEX_OFFSET;
        *flowctrl = (value & SWI_PORT_FLOWCTRL_STATUS) >> SWI_PORT_FLOWCTRL_OFFSET;        

    } else { // Write the port link ability

        value = *flowctrl;
        value |= (*nway << SWI_PORT_NWAY_ABILITY);
        value |= (*speed << SWI_PORT_SPEED_ABILITY);
        value |= (*duplex << SWI_PORT_DUPLEX_ABILITY);
        ifr.regAddr = portAbilityReg[port_no];
        value |= (SWI_ioctl(RegReadMode, &ifr) & 0xfff0); // SWI_IOC_READEEPROM or SWI_IOC_READSMI
        ifr.regVal = (dword)value;
        SWI_ioctl(RegWriteMode, &ifr); // SWI_IOC_WRITEEEPROM or SWI_IOC_WRITESMI

#ifdef  DBG
        printf("SWPortLink: write reg[%#x]=%#lx\n", ifr.regAddr, ifr.regVal);
#endif
    }
}


void SWTrunkConfig(int trunkSwitch)
{
    word value;

    ifr.regAddr = SWI_SYSTEM_CTRLREG1;
    value = SWI_ioctl(RegReadMode, &ifr) & (~ SWI_SYSCTRL1_TRUNK_ENABLE); // SWI_IOC_READEEPROM or SWI_IOC_READSMI
    ifr.regVal = (dword)(value | (trunkSwitch << SWI_SYSCTRL1_TRUNK_SHIFT));
    SWI_ioctl(RegWriteMode, &ifr); // SWI_IOC_WRITEEEPROM or SWI_IOC_WRITESMI

#ifdef  DBG
    printf("SWTrunkConfig: reg[%#x]=%#lx\n", ifr.regAddr, ifr.regVal);
#endif
}


void SWMirrorGetConfig(int port_no, word *receiveOption, word *transmitOption, word *typeOption)
{
    word regValue;
    struct PORT_ACCESS_DEF portMirrorReg[] = {{SWI_MIRROR_CTRLREG0, 0}, {SWI_MIRROR_CTRLREG0, 4}, {SWI_MIRROR_CTRLREG0, 8},
                                              {SWI_MIRROR_CTRLREG0, 12}, {SWI_MIRROR_CTRLREG1, 0}, {SWI_MIRROR_CTRLREG1, 4}};


    ifr.regAddr = portMirrorReg[port_no].regAddr;
    regValue = SWI_ioctl(SWI_IOC_READSMI, &ifr);

#ifdef  DBG
    printf("SWMirrorGetConfig: reg[%#x]=%#lx, ", ifr.regAddr, ifr.regVal);
#endif

    *receiveOption = (regValue >> portMirrorReg[port_no].shift) & 0x03;
    *transmitOption = (regValue >> (portMirrorReg[port_no].shift + 2)) & 0x03;

    ifr.regAddr = SWI_MIRROR_CTRLREG1;
    regValue = SWI_ioctl(SWI_IOC_READSMI, &ifr);

#ifdef  DBG
    printf("reg[%#x]=%#lx\n", ifr.regAddr, ifr.regVal);
#endif

    *typeOption = regValue & 0xff00;
}



void SWMirrorSetConfig(int port_no, word rxOptItem, word txOptItem, int *typeOptItem)
{
    int i;
    word regValue, regMask, receiveOption, transmitOption, typeOption = SWI_MIRROR1_ENABLE_BIT;
    word txOptDef[] = {SWI_MIRROR0_NOT_MIRROR, SWI_MIRROR0_TXPKT_PORT, SWI_MIRROR0_TXDA_PORT, SWI_MIRROR0_TXSA_PORT};
    word rxOptDef[] = {SWI_MIRROR0_NOT_MIRROR, SWI_MIRROR0_RXPKT_PORT, SWI_MIRROR0_RXDA_PORT, SWI_MIRROR0_RXSA_PORT};
    struct OPTION_BITVAL_DEF typeOptDef[] = {{SWI_MIRROR1_OPT_CRC, SWI_MIRROR1_CRC_BIT},{SWI_MIRROR1_OPT_RXER, SWI_MIRROR1_RXER_BIT},
                                             {SWI_MIRROR1_OPT_PAUSE, SWI_MIRROR1_PAUSE_BIT},{SWI_MIRROR1_OPT_LONG, SWI_MIRROR1_LONG_BIT},
                                             {SWI_MIRROR1_OPT_SHORT, SWI_MIRROR1_SHORT_BIT},{SWI_MIRROR1_OPT_TXPKT_UMON,
                                              SWI_MIRROR1_TXPKT_UMON_BIT}};

    struct PORT_ACCESS_DEF portMirrorReg[] = {{SWI_MIRROR_CTRLREG0, 0}, {SWI_MIRROR_CTRLREG0, 4}, {SWI_MIRROR_CTRLREG0, 8},
                                              {SWI_MIRROR_CTRLREG0, 12}, {SWI_MIRROR_CTRLREG1, 0}, {SWI_MIRROR_CTRLREG1, 4}};
    
    receiveOption = rxOptDef[rxOptItem];
    transmitOption = txOptDef[txOptItem];

    for (i = 0; i < SWI_MAX_PORT_NUMBER; i++) {

        if (typeOptItem[i] == typeOptDef[i].optSel) {
            typeOption |= typeOptDef[i].bitVal;
        }
    }

    if (typeOptItem[i] == SWI_MIRROR1_OPT_MIRRORDIS) {

        typeOption &= ~ SWI_MIRROR1_ENABLE_BIT;
        ifr.regAddr = SWI_MIRROR_CTRLREG1;
        regValue = SWI_ioctl(SWI_IOC_READSMI, &ifr) & (~ SWI_MIRROR1_ENABLE_BIT);
        ifr.regVal = (dword)regValue;
        SWI_ioctl(SWI_IOC_WRITESMI, &ifr);
    }

    i = typeOptItem[i+1]; // Get the value for the type opiton configuration kept

    // Write the mirror0 & mirror1 options

    regMask = (0x03 << portMirrorReg[port_no].shift) + ( 0x03 << (portMirrorReg[port_no].shift + 2));
    ifr.regAddr = portMirrorReg[port_no].regAddr;
    regValue = SWI_ioctl(SWI_IOC_READSMI, &ifr) & (~ regMask);
    regValue |= ((receiveOption << portMirrorReg[port_no].shift) + (transmitOption << (portMirrorReg[port_no].shift + 2)));
    ifr.regVal = (dword)regValue;
    SWI_ioctl(SWI_IOC_WRITESMI, &ifr);

#ifdef  DBG
    printf("SWMirrorSetConfig: reg[%#x]=%#lx, ", ifr.regAddr, ifr.regVal);
#endif

    ifr.regAddr = SWI_MIRROR_CTRLREG1;

    if (! i) {

        regValue = (SWI_ioctl(SWI_IOC_READSMI, &ifr) & 0xff) | typeOption;
        ifr.regVal = (dword)regValue;
        SWI_ioctl(SWI_IOC_WRITESMI, &ifr);

    } else {

        regValue = (SWI_ioctl(SWI_IOC_READSMI, &ifr) & (~ typeOption)) | typeOption;
        ifr.regVal = (dword)regValue;
        SWI_ioctl(SWI_IOC_WRITESMI, &ifr);
        SWI_ioctl(SWI_IOC_READSMI, &ifr);
    }
#ifdef  DBG
    printf("reg[%#x]=%#lx\n", ifr.regAddr, ifr.regVal);
#endif
}


void SWPortVLANConfig(int group_no, int *portMapOpt)
{
    int i;
    word value = 0;
    word portMapDef[] = {SWI_PORT0_FWDGRP_BIT, SWI_PORT1_FWDGRP_BIT, SWI_PORT2_FWDGRP_BIT,
                         SWI_PORT3_FWDGRP_BIT, SWI_PORT4_FWDGRP_BIT, SWI_PORT5_FWDGRP_BIT};

    int vlanReg[] = {SWI_FWDGROUP0_PORTMAP, SWI_FWDGROUP1_PORTMAP, SWI_FWDGROUP2_PORTMAP,
                     SWI_FWDGROUP3_PORTMAP, SWI_FWDGROUP4_PORTMAP, SWI_FWDGROUP5_PORTMAP};

    for (i = 0; i < SWI_MAX_PORT_NUMBER; i++) {

        if (portMapOpt[i])
            value |= portMapDef[i];
    }   

    ifr.regAddr = SWI_SYSTEM_CTRLREG3;
    ifr.regVal = (dword)(SWI_ioctl(RegReadMode, &ifr) & (~ SWI_TAGGED_VLAN_MODE)); // SWI_IOC_READEEPROM or SWI_IOC_READSMI
    SWI_ioctl(RegWriteMode, &ifr); // SWI_IOC_WRITEEEPROM or SWI_IOC_WRITESMI

#ifdef  DBG
    printf("SWPortVLANConfig: reg[%#x]=%#lx, value=%#x, ", ifr.regAddr, ifr.regVal, value);
#endif

    ifr.regAddr = vlanReg[group_no];
    value |= SWI_ioctl(RegReadMode, &ifr) & (~ SWI_ALLPORT_FWDGRP_BIT); // SWI_IOC_READEEPROM or SWI_IOC_READSMI
    ifr.regVal = (dword)value;
    SWI_ioctl(RegWriteMode, &ifr); // SWI_IOC_WRITEEEPROM or SWI_IOC_WRITESMI

#ifdef  DBG
    printf("reg[%#x]=%#lx\n", ifr.regAddr, ifr.regVal);
#endif
}

void    SWTagVLANConfig(int filterIndex, int vid, int fid, int filterVlaid, int priQ, int *tagMapOpt, int *portMapOpt)
{
    int  i;
    int  vlanFilterLow = SWI_VLANFILTER_LOWREG0;
    int  vlanFilterHigh = SWI_VLANFILTER_HIGHREG0;
    word value, tagMap, portMap;

    ifr.regAddr = SWI_SYSTEM_CTRLREG3;
    value = SWI_ioctl(RegReadMode, &ifr) | SWI_TAGGED_VLAN_MODE; // SWI_IOC_READEEPROM or SWI_IOC_READSMI
    ifr.regVal = (dword)value;
    SWI_ioctl(RegWriteMode, &ifr); // SWI_IOC_WRITEEEPROM or SWI_IOC_WRITESMI

#ifdef  DBG
    printf("SWTagVLANConfig: reg[%#x]=%#lx, ", ifr.regAddr, ifr.regVal);
#endif

    tagMap = portMap = 0;

    for (i = 0; i < SWI_MAX_PORT_NUMBER; i++) {

        if (tagMapOpt[i])
            tagMap |= (1 << i);

        if (portMapOpt[i])
            portMap |= (1 << i);
    }   

    value = fid << SWI_VLFILTER_FID_OFFSET;
    value |= (portMap | (tagMap << SWI_TAGGED_MEMBER_OFFSET));
    ifr.regAddr = vlanFilterLow + filterIndex * SWI_VLFILTER_SHIFT;
    ifr.regVal = (dword)value;
    SWI_ioctl(RegWriteMode, &ifr); // SWI_IOC_WRITEEEPROM or SWI_IOC_WRITESMI

#ifdef  DBG
    printf("reg[%#x]=%#lx, ", ifr.regAddr, ifr.regVal);
#endif

    value = filterVlaid << SWI_VLFILTER_VAILD_OFFSET;
    value |= (vid | (priQ << SWI_VLFILTER_PRI_OFFSET));
    ifr.regAddr = vlanFilterHigh + filterIndex * SWI_VLFILTER_SHIFT;
    ifr.regVal = (dword)value;
    SWI_ioctl(RegWriteMode, &ifr); // SWI_IOC_WRITEEEPROM or SWI_IOC_WRITESMI

#ifdef  DBG
    printf("reg[%#x]=%#lx\n", ifr.regAddr, ifr.regVal);
#endif
}


void SWVLANOptionConfig(int optionItem, int *optionValue)
{
    int  i;
    word value, optionMap;
    struct REGBIT_OFFSET_DEF vlanOptReg[] = {{SWI_QW2VIDCHK_PPPOEPORT, SWI_VID_CHECK_BIT, SWI_VID_CHECK_OFFSET},
                                             {SWI_EXTEND_BANDWIDTH6, SWI_DFTVLAN_MEMBER_BIT, SWI_DFTVLAN_MEMBER_OFFSET},
                                             {SWI_SYSTEM_CTRLREG0, SWI_DEFAULT_FID_BIT, SWI_DEFAULT_FID_OFFSET},
                                             {SWI_QW3BKVLAN_VLTAGONLY, SWI_BACK_VLAN_BIT, SWI_BACK_VLAN_OFFSET},
                                             {SWI_INPUT_FORCE_NOTAG, SWI_FORCE_NOTAG_BIT, SWI_FORCE_NOTAG_OFFSET},
                                             {SWI_INGRESS_FILTER_REG, SWI_INGRESS_FILTER_BIT, SWI_INGRESS_FILTER_OFFSET},
                                             {SWI_QW3BKVLAN_VLTAGONLY, SWI_ADMIT_VLANTAG_BIT, SWI_ADMIT_VLANTAG_OFFSET},
                                             {SWI_OUTPUT_TAGPASS_REG, SWI_OUTPUT_TAGPASS_BIT, SWI_OUTPUT_TAGPASS_OFFSET},
                                             {SWI_FWDGROUP15_PORTMAP, SWI_VLAN_SECURITY_BIT, SWI_VLAN_SECURITY_OFFSET}};

    optionMap = 0;

    for (i = 0; i < SWI_MAX_PORT_NUMBER; i++) {

        if (optionValue[i])
            optionMap |= (1 << i);
    }   

    ifr.regAddr = vlanOptReg[optionItem].regAddr;
    value = SWI_ioctl(RegReadMode, &ifr) & (~ vlanOptReg[optionItem].bitVal); // SWI_IOC_READEEPROM or SWI_IOC_READSMI
    ifr.regVal = (dword)(value | (optionMap << vlanOptReg[optionItem].offset));
    SWI_ioctl(RegWriteMode, &ifr); // SWI_IOC_WRITEEEPROM or SWI_IOC_WRITESMI


    printf("SWVLANOptionConfig: reg[%#x]=%#lx\n", ifr.regAddr, ifr.regVal);

}


void SWPortPriConfig(int port_no, int portPriEn, int portPriQOpt, int portVID) // mod - 08/12/05 for the port VID
{
    word value, tmpVal; // mod - 08/12/05 for the port VID
    word portPriReg[] = {SWI_PORT0_BASIC_CTRLREG, SWI_PORT1_BASIC_CTRLREG, SWI_PORT2_BASIC_CTRLREG,
                         SWI_PORT3_BASIC_CTRLREG, SWI_PORT4_BASIC_CTRLREG, SWI_PORT5_BASIC_CTRLREG};

    // add - 08/12/05 for the port VID
    word portVIDReg[] = {SWI_PORT0_VIDREG,   SWI_PORT1_VIDREG,   SWI_PORT2_VIDREG,
                         SWI_PORT3P4_VIDREG, SWI_PORT3P4_VIDREG, SWI_PORT5_VIDREG};

    ifr.regAddr = portPriReg[port_no];
    value = SWI_ioctl(RegReadMode, &ifr) & (~ SWI_PORT_PRI_BIT); // SWI_IOC_READEEPROM or SWI_IOC_READSMI
    value |= (portPriQOpt << SWI_PORT_PRI_OFFSET);
    value |= (portPriEn << SWI_PORT_PRIEN_OFFSET);
    ifr.regVal = (dword)value;
    SWI_ioctl(RegWriteMode, &ifr); // SWI_IOC_WRITEEEPROM or SWI_IOC_WRITESMI

#ifdef  DBG
    printf("SWPortPriConfig: reg[%#x]=%#lx\n", ifr.regAddr, ifr.regVal);
#endif

    if (portVID >= 0) { // add - 08/12/05 for the port VID

        ifr.regAddr = portPriReg[port_no];
        value = SWI_ioctl(RegReadMode, &ifr) & (~ SWI_PORT_VID0B3_BIT); // SWI_IOC_READEEPROM or SWI_IOC_READSMI
        tmpVal = portVID & SWI_PORT_VID0B3_MASK;
        value |= (tmpVal << SWI_PORT_VID0B3_OFFSET);
        ifr.regVal = (dword)value;
        SWI_ioctl(RegWriteMode, &ifr); // SWI_IOC_WRITEEEPROM or SWI_IOC_WRITESMI

#ifdef  DBG
        printf("PVID0-3 reg[%#x]=%#lx\n", ifr.regAddr, ifr.regVal);
#endif

        ifr.regAddr = portVIDReg[port_no];
        tmpVal = portVID & SWI_PORT_VID4B11_MASK;

        if (port_no != 4) {

            value = SWI_ioctl(RegReadMode, &ifr) & (~ SWI_PORT_VID4B11_BIT); // SWI_IOC_READEEPROM or SWI_IOC_READSMI
            value |= (tmpVal >> SWI_PORT_VID0B3_SHIFT);

        } else {

            value = SWI_ioctl(RegReadMode, &ifr) & (~ SWI_PORT4_VID4B11_BIT); // SWI_IOC_READEEPROM or SWI_IOC_READSMI
            tmpVal >>= SWI_PORT_VID0B3_SHIFT;
            value |= (tmpVal << SWI_PORT4_VID4B11_OFFSET);
        }

        ifr.regVal = (dword)value;
        SWI_ioctl(RegWriteMode, &ifr); // SWI_IOC_WRITEEEPROM or SWI_IOC_WRITESMI

#ifdef  DBG
        printf("PVID4-11 reg[%#x]=%#lx\n", ifr.regAddr, ifr.regVal);
#endif
    
    }    
}


void SWVLANPriConfig(int port_no, int *vlanPriEn, int priQID, int vlanQOpt, int ipoVlan)
{
    int i;
    word value, vlanPriQOpt, vlanPriEnMap = 0;
    word portPriReg[] = {SWI_PORT0_BASIC_CTRLREG, SWI_PORT1_BASIC_CTRLREG, SWI_PORT2_BASIC_CTRLREG,
                               SWI_PORT3_BASIC_CTRLREG, SWI_PORT4_BASIC_CTRLREG, SWI_PORT5_BASIC_CTRLREG};
    word vlanPriOffset[] = {SWI_PRIQ0_MAP_OFFSET, SWI_PRIQ1_MAP_OFFSET, SWI_PRIQ2_MAP_OFFSET,
                            SWI_PRIQ3_MAP_OFFSET, SWI_PRIQ4_MAP_OFFSET, SWI_PRIQ5_MAP_OFFSET,
                            SWI_PRIQ6_MAP_OFFSET, SWI_PRIQ7_MAP_OFFSET};


    ifr.regAddr = portPriReg[port_no];
    value = SWI_ioctl(RegReadMode, &ifr) & (~ SWI_IPOVLAN_PRI_BIT); // SWI_IOC_READEEPROM or SWI_IOC_READSMI
    value |= (ipoVlan << SWI_IPOVLAN_PRI_OFFSET);
    ifr.regVal = (dword)value;
    SWI_ioctl(RegWriteMode, &ifr); // SWI_IOC_WRITEEEPROM or SWI_IOC_WRITESMI

#ifdef  DBG
    printf("SWVLANPriConfig: reg[%#x]=%#lx, ", ifr.regAddr, ifr.regVal);