📄 ifx_gpio.h
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#ifndef _IFX_GPIO_H_
#define _IFX_GPIO_H_
// define the base address for the switch controller embedded in ADM5120 and for reference only
#define SWI_CTRL_BASE 0x12000000 // must be modified according to the switch controller base address on the customer board
// define the GPIO config register address in ADM5120 and for reference only
#define IFX_GPIO_CFG_REG0 0x00B8 // must be modified according to the GPIO register address on the customer board
#define IFX_GPIO0_INPUT_MASK 0x00000100 // must be modified according to the GPIO mask value on the customer board
/* GPIO 012 enabled, output mode */
#define GPIO_ENABLEBITS 0x000700f8 // must be modified according to the GPIO enable/output setting on the customer board
/*
define ADM5120 GPIO port to ADM6996I/M SMI interface
MDIO -> EEDI (GPIO 0, bi-direction)
MDCS -> EECS (GPIO 1, output only)
MDC -> EESK (GPIO 2, output only)
EEDO (do not need this one!)
*/
// these definitions must be modified according to the defined access pins to the switch controller on the customer board
#define GPIO_MDIO 0
#define GPIO_MDCS 1
#define GPIO_MDC 2
#define MDIO_INPUT 0x00000001
#define MDIO_OUTPUT_EN 0x00010000
// this macro must be modified according to the system low-level I/O access method on the customer board
/* Macros for accessing the switch control registers */
#define IFX_SW_REG(_reg) \
(*((volatile unsigned long *)(KSEG1ADDR(SWI_CTRL_BASE + (_reg)))))
// if you are using the GPIO as the read/write pins to access the switch controller, you can use these macros listed below
// otherwise, please use the self-defined I/O access macros to read/write the switch controller
#define MDIO_SET_HIGH(num) \
do { \
IFX_SW_REG(IFX_GPIO_CFG_REG0) |= 1 << (24 + num); \
} while (0)
#define MDIO_SET_LOW(num) \
do { \
IFX_SW_REG(IFX_GPIO_CFG_REG0) &= ~(1 << (24 + num)); \
} while (0)
/*
initialize GPIO pins.
output mode, low
*/
void ifx_gpio_init(void)
{
IFX_SW_REG(IFX_GPIO_CFG_REG0) = GPIO_ENABLEBITS;
return;
}
/* read one bit from mdio port */
int ifx_sw_mdio_readbit(void)
{
int val;
val = (IFX_SW_REG(IFX_GPIO_CFG_REG0) & IFX_GPIO0_INPUT_MASK) >> 8;
return val;
}
/*
MDIO mode selection
1 -> output
0 -> input
switch input/output mode of GPIO 0
*/
void ifx_mdio_mode(int mode)
{
IFX_SW_REG(IFX_GPIO_CFG_REG0) = mode ? GPIO_ENABLEBITS : ((GPIO_ENABLEBITS | MDIO_INPUT) & ~MDIO_OUTPUT_EN);
}
void ifx_mdc_hi(void)
{
MDIO_SET_HIGH(GPIO_MDC);
}
void ifx_mdio_hi(void)
{
MDIO_SET_HIGH(GPIO_MDIO);
}
void ifx_mdcs_hi(void)
{
MDIO_SET_HIGH(GPIO_MDCS);
}
void ifx_mdc_lo(void)
{
MDIO_SET_LOW(GPIO_MDC);
}
void ifx_mdio_lo(void)
{
MDIO_SET_LOW(GPIO_MDIO);
}
void ifx_mdcs_lo(void)
{
MDIO_SET_LOW(GPIO_MDCS);
}
#endif
/* _IFX_GPIO_H_ */
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