demob-16sm.s

大量ATMEGA16实例, 都可以运行,包括驱动LCD1602, 上位机显示等多功能

	.module DEMOB-16sm.c
	.area text(rom, con, rel)
	.dbfile C:\+samples-16small\DEMOB-16sm\DEMOB-16sm.c
	.area vector(rom, abs)
	.org 44
	jmp _uart_rx_isr
	.area text(rom, con, rel)
	.dbfile C:\+samples-16small\DEMOB-16sm\DEMOB-16sm.c
	.area data(ram, con, rel)
	.dbfile C:\+samples-16small\DEMOB-16sm\DEMOB-16sm.c
_rec_head::
	.blkb 2
	.area idata
	.word 0
	.area data(ram, con, rel)
	.dbfile C:\+samples-16small\DEMOB-16sm\DEMOB-16sm.c
	.dbsym e rec_head _rec_head I
_rec_tail::
	.blkb 2
	.area idata
	.word 0
	.area data(ram, con, rel)
	.dbfile C:\+samples-16small\DEMOB-16sm\DEMOB-16sm.c
	.dbsym e rec_tail _rec_tail I
	.area text(rom, con, rel)
	.dbfile C:\+samples-16small\DEMOB-16sm\DEMOB-16sm.c
	.dbfunc e uart_rx_isr _uart_rx_isr fV
	.even
_uart_rx_isr::
	st -y,R2
	st -y,R3
	st -y,R24
	st -y,R25
	st -y,R30
	st -y,R31
	in R2,0x3f
	st -y,R2
	.dbline -1
	.dbline 91
; /*
; Title: 		DEMOB-16sm.c
; Connection:	RS232 connection to PC
;             PC runs a terminal program such as Tera Term Pro
; 			Set Baudrate to 38400, 1 Start, 8 Data and 1 Stop			
; Operation:
;  			1. Messages "Baudrate=38400" displayed on LCD panel for about 1 minuite
; 			2. LCD panel is cleared and cursor goes to Home (firat line, first coloumn)
; 			3. Any key typed on PC's keyboard will be on LCD panel 
; 			4. When 'CR' key pressed, the cursor of LCD panel will starts from next line  
; Attention:	A terminal program "Tera Term Pro" is contained in CD 
; 			  for PC to communicate with the AVR Study Board	
; */	 
; /* UCSRA: Control & Status Register A
;    b7-RXC: 	USART receive complete
;    b6-TXC: 	USART transmit complete
;    b5-UDRE:	USART Data register empty
;    b4-FE:	Frame Error
;    b3-DOR:  Data overtun
;    b2-PE: 	Parity error
;    b1-U2X: 	double the USART transmission speed
;    b0-MPCM: multi-processor communication mode
;    
;    USARB
; *  b7-RXCIE: RX complete interrupt enable
;    b6-TXCIE: TX complete interrupt enable
;    b5-UDRIE: USART data register empty interrupt enable
; *  b4-RXEN:	 Receiver enable
; *  b3-TXEN:  Transmitter enable
;    b2-UCSZ2: chracter size     	 ------->0
;    b1-RXB8	 receive data bit 8
;    b0-TXB8:	 Transmit data 8
;    
;    UCSRC
; *  b7-URSEL: register select   	 0/UBRRH,	  1/UCSRC
;    b6-UMSEL: USART mode select 	 0/Asyn		  1/Synchronous
;    b5-UPM1:  -------- Parity mode 00/disable, 01 reserved
;    b4-UPM0:	 -------- 		 	  10 even,	  11 odd 
;    b3-USBS:	stop bit selection 0/1-bit, 1/2-bit
; *  b2-UCSZ1	 		  	   	   --------> 1
; *  b1-UCSZ0  				   --------> 1
;    b0-UCPOL: clock polarity	  0 rising XCK edge, 1 falling XCK edge  
; */
; 
; 
; #include <iom16v.h>
; #include <macros.h>
; 
; #pragma interrupt_handler uart_rx_isr: 12
; 
; // external definition from LCD-16sn.c
; extern unsigned char lcd_enable, lcd_disable;
; extern unsigned char in_instr_wr, in_data_wr;
; extern unsigned char in_instr_rd, in_data_rd;
; extern int indexhead, indextail, indexcount;
; extern int cursor_index;
; extern unsigned char swin, swin2;
; extern const char message1[];
; extern const char message2[]; 
; extern const char message3[];
; extern const char message4[];
; extern const char message5[];
; extern const char message6[];
; extern const char message7[];
; extern const char message8[];
; 
; extern void port_init(void);
; extern void WDT_off(void);
; extern void delay(int);
; extern void ldelay(int);
; extern void wr_instruction(unsigned char);
; extern void wr_data(unsigned char);
; extern void wr_instruction2(unsigned char);
; extern void wr_data2(unsigned char);
; extern void cursor_home(void);
; extern void cursor_line1(void); 
; extern void cursor_line2(void);
; extern void space(void); 
; extern void out_string(const char array[]);
; extern void lcd_on(void);
; void clear_line1(void);
; void clear_line2(void);
; 
; //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 
;  
; unsigned char RecBuf[40];
; int rec_head=0, rec_tail=0;
; unsigned rec_data;
; 
; void uart_rx_isr(void)
; {
	.dbline 92
;  RecBuf[rec_head]=UDR;
	ldi R24,<_RecBuf
	ldi R25,>_RecBuf
	lds R30,_rec_head
	lds R31,_rec_head+1
	add R30,R24
	adc R31,R25
	in R2,0xc
	std z+0,R2
	.dbline 93
;  rec_head++;
	lds R24,_rec_head
	lds R25,_rec_head+1
	adiw R24,1
	sts _rec_head+1,R25
	sts _rec_head,R24
	.dbline 94
;  if(rec_head>=40)
	cpi R24,40
	ldi R30,0
	cpc R25,R30
	brlt L2
X0:
	.dbline 95
;  	rec_head=0;			  
	clr R2
	clr R3
	sts _rec_head+1,R3
	sts _rec_head,R2
L2:
	.dbline -2
L1:
	.dbline 0 ; func end
	ld R2,y+
	out 0x3f,R2
	ld R31,y+
	ld R30,y+
	ld R25,y+
	ld R24,y+
	ld R3,y+
	ld R2,y+
	reti
	.dbend
	.dbfunc e port_init _port_init fV
	.even
_port_init::
	.dbline -1
	.dbline 99
; }
; 
; void port_init(void)
; {
	.dbline 100
;  DDRA  = 0xFF;		//set PortA output
	ldi R24,255
	out 0x1a,R24
	.dbline 101
;  DDRB  = 0xff;		//set PORTB output
	out 0x17,R24
	.dbline 102
;  DDRC  = 0x00;		//set PORTC output
	clr R2
	out 0x14,R2
	.dbline 103
;  PORTC = 0xff;
	out 0x15,R24
	.dbline 104
;  DDRD  = 0x7f;		//set PD.7 input for RX
	ldi R24,127
	out 0x11,R24
	.dbline -2
L4:
	.dbline 0 ; func end
	ret
	.dbend
	.dbfunc e USART_init _USART_init fV
	.even
_USART_init::
	sbiw R28,2
	.dbline -1
	.dbline 108
; }
; 
; void USART_init(void)
; {
	.dbline 109
;  UCSRB=0x00;
	clr R2
	out 0xa,R2
	.dbline 110
;  UCSRA=0x00;
	out 0xb,R2
	.dbline 111
;  UCSRB=0b10011000;	 //b7: RXCIE enabeled, b4: RXEN enabled, B3: TXEN enabled
	ldi R24,152
	out 0xa,R24
	.dbline 112
;  UBRRH=0x00;		 //
	out 0x20,R2
	.dbline 116
;  					 //Crystal=16MHx
;  //UBRRL=103;		 //Bausdrate=9600 tested work fine
;  //UBRRL=51;		 //Baudrate=19200 tested work fine
;  UBRRL=25;		 	 //Baudrate=38400 tested work fine
	ldi R24,25
	out 0x9,R24
	.dbline 118
;  //UBRRL=8;	 		 //Baurate=115200 tested work fine
;  UCSRC=0b10000110;	 //Asyn, No parity, 1-stop, 8-bit, rising edge
	ldi R24,134
	out 0x20,R24
	.dbline 119
;  memset(RecBuf, 0, sizeof(RecBuf));
	ldi R24,40
	ldi R25,0
	std y+1,R25
	std y+0,R24
	clr R18
	clr R19
	ldi R16,<_RecBuf
	ldi R17,>_RecBuf
	xcall _memset
	.dbline 120
;  rec_head=0;
	clr R2
	clr R3
	sts _rec_head+1,R3
	sts _rec_head,R2
	.dbline 121
;  rec_tail=0;
	sts _rec_tail+1,R3
	sts _rec_tail,R2
	.dbline -2
L5:
	.dbline 0 ; func end
	adiw R28,2
	ret
	.dbend
	.dbfunc e transmit _transmit fV
;          abyte -> R16
	.even
_transmit::
	.dbline -1
	.dbline 134
; } 
; 
; /*
; void delay2(int count)
; {
;  int i, j;
;  for(i=count; i>0; i--)
;     for(j=10; j>0; j--)
; 	   ;
; }*/
; 
; void transmit(unsigned char abyte)
; {
	.dbline 135
;  UDR=abyte;
	out 0xc,R16
L7:
	.dbline 137
;  while(!(UCSRA&0b01000000))	//b6=1 TXE
; 	  ;
L8:
	.dbline 136
	sbis 0xb,6
	rjmp L7
X1:
	.dbline -2
L6:
	.dbline 0 ; func end
	ret
	.dbsym r abyte 16 c
	.dbend
	.dbfunc e main _main fV
;           outd -> R10
;           outc -> R10
;           outb -> R20
;           outa -> R20
;          dswin -> R10,R11
	.even
_main::
	.dbline -1
	.dbline 142
; }
; 
; //*****************************************************************
; void main(void)
; {
	.dbline 143
;  unsigned char outa=0b01010101, outb=0b10101010, outc=0x00, outd=0x00;
	.dbline 143
	ldi R20,170
	.dbline 143
	clr R10
	.dbline 143
	.dbline 145
;  int dswin;
;  port_init();
	xcall _port_init
	.dbline 146
;  USART_init();
	xcall _USART_init
	.dbline 147
;  SEI();
	sei
	.dbline 148
;  WDT_off();
	xcall _WDT_off
	.dbline 149
;  ldelay(50);
	ldi R16,50
	ldi R17,0
	xcall _ldelay
	.dbline 150
;  lcd_on();
	xcall _lcd_on
	.dbline 151
;  PORTD=0x50;
	ldi R24,80
	out 0x12,R24
	.dbline 152
;  ldelay(50);
	ldi R16,50
	ldi R17,0
	xcall _ldelay
	.dbline 153
;  PORTD=0x05;
	ldi R24,5
	out 0x12,R24
	.dbline 154
;  ldelay(50);
	ldi R16,50
	ldi R17,0
	xcall _ldelay
	.dbline 155
;  out_string(message1);
	ldi R16,<_message1
	ldi R17,>_message1
	xcall _out_string
	.dbline 156
;  cursor_line2();
	xcall _cursor_line2
	.dbline 157
;  out_string(message2);
	ldi R16,<_message2
	ldi R17,>_message2
	xcall _out_string
	.dbline 158
;  ldelay(500);
	ldi R16,500
	ldi R17,1
	xcall _ldelay
	.dbline 159
;  clear_line2();
	xcall _clear_line2
	.dbline 160
;  clear_line1();
	xcall _clear_line1
	xjmp L12
L11:
	.dbline 162
;  while(1)
;    {
	.dbline 163
;     WDR();				  	//Watchdog reset
	wdr
	.dbline 164
; 	if(rec_head!=rec_tail)
	lds R2,_rec_tail
	lds R3,_rec_tail+1
	lds R4,_rec_head
	lds R5,_rec_head+1
	cp R4,R2
	cpc R5,R3
	brne X7
	xjmp L14
X7:
X2:
	.dbline 165
; 	   {
	.dbline 166
; 	    rec_data=RecBuf[rec_tail];
	ldi R24,<_RecBuf
	ldi R25,>_RecBuf
	movw R30,R2
	add R30,R24
	adc R31,R25
	ldd R2,z+0
	clr R3
	sts _rec_data+1,R3
	sts _rec_data,R2
	.dbline 167
; 		rec_tail++;
	lds R24,_rec_tail
	lds R25,_rec_tail+1
	adiw R24,1
	sts _rec_tail+1,R25
	sts _rec_tail,R24
	.dbline 168
; 		if(rec_tail>=40)
	cpi R24,40
	ldi R30,0
	cpc R25,R30
	brlt L16
X3:
	.dbline 169
; 		   rec_tail=0;
	clr R2
	sts _rec_tail+1,R3
	sts _rec_tail,R2
L16:
	.dbline 171
; 		   
; 		dswin=rec_head<<2;
	lds R10,_rec_head
	lds R11,_rec_head+1
	lsl R10
	rol R11
	lsl R10
	rol R11
	.dbline 172
; 	    PORTD=dswin;
	out 0x12,R10
	.dbline 174
; 		
; 		if(rec_data==13)
	lds R24,_rec_data
	lds R25,_rec_data+1
	cpi R24,13
	ldi R30,0
	cpc R25,R30
	brne L18
X4:
	.dbline 175
; 		  {
	.dbline 176
; 		   transmit(13);
	ldi R16,13
	xcall _transmit
	.dbline 177
; 		   transmit(10);
	ldi R16,10
	xcall _transmit
	.dbline 178
; 		   if(cursor_index<=15)
	ldi R24,15
	ldi R25,0
	lds R2,_cursor_index
	lds R3,_cursor_index+1
	cp R24,R2
	cpc R25,R3
	brlt L20
X5:
	.dbline 179
; 		      clear_line2();
	xcall _clear_line2
	xjmp L19
L20:
	.dbline 181
; 		   else
; 		      clear_line1();	  
	xcall _clear_line1
	.dbline 182
; 		  }			
	xjmp L19
L18:
	.dbline 184
; 		else
; 		  {
	.dbline 185
; 		  transmit(rec_data);
	lds R16,_rec_data
	xcall _transmit
	.dbline 186
; 		  wr_data2(rec_data);
	lds R16,_rec_data
	xcall _wr_data2
	.dbline 187
; 		  }
L19:
	.dbline 188
; 	   } 
L14:
	.dbline 189
;    }
L12:
	.dbline 161
	xjmp L11
X6:
	.dbline -2
L10:
	.dbline 0 ; func end
	ret
	.dbsym r outd 10 c
	.dbsym r outc 10 c
	.dbsym r outb 20 c
	.dbsym r outa 20 c
	.dbsym r dswin 10 I
	.dbend
	.area bss(ram, con, rel)
	.dbfile C:\+samples-16small\DEMOB-16sm\DEMOB-16sm.c
_rec_data::
	.blkb 2
	.dbsym e rec_data _rec_data i
_RecBuf::
	.blkb 40
	.dbsym e RecBuf _RecBuf A[40:40]c
; }