segdisp-16sm.lst

来自「大量ATMEGA16实例, 都可以运行,包括驱动LCD1602, 上位机显示等多」· LST 代码 · 共 430 行

__text_start:
__start:
      85 EFCF      LDI	R28,0xFF
      86 E2D1      LDI	R29,0x21
      87 BFCD      OUT	0x3D,R28
      88 BFDE      OUT	0x3E,R29
      89 51CE      SUBI	R28,0x1E
      8A 40D0      SBCI	R29,0
      8B EA0A      LDI	R16,0xAA
      8C 8308      STD	Y+0,R16
      8D 2400      CLR	R0
      8E E2E1      LDI	R30,0x21
      8F E0F2      LDI	R31,2
      90 E012      LDI	R17,2
      91 32E7      CPI	R30,0x27
      92 07F1      CPC	R31,R17
      93 F011      BEQ	0x0096
      94 9201      ST	R0,Z+
      95 CFFB      RJMP	0x0091
      96 8300      STD	Z+0,R16
      97 EEE9      LDI	R30,0xE9
      98 E0F0      LDI	R31,0
      99 E0A0      LDI	R26,0
      9A E0B2      LDI	R27,2
      9B E011      LDI	R17,1
      9C E000      LDI	R16,0
      9D BF0B      OUT	0x3B,R16
      9E 30EA      CPI	R30,0xA
      9F 07F1      CPC	R31,R17
      A0 F021      BEQ	0x00A5
      A1 95C8      LPM
      A2 9631      ADIW	R30,1
      A3 920D      ST	R0,X+
      A4 CFF9      RJMP	0x009E
      A5 940E 0160 CALL	_main
_exit:
      A7 CFFF      RJMP	_exit
FILE: C:\+samples-16small\SegDisp-16sm\SegDisp-16sm.c
(0001) /*
(0002) Title:	SegDisp-16sm.c
(0003) Connection:
(0004) 	  Factory fixed setting:
(0005) 	  PORTA:
(0006) 	  		PA0-PA2 LCD control
(0007) 			PA3-PA7 4x7-segment display control
(0008) 			Drive LED group2 (the right group of LED)
(0009) 	  PORTB:
(0010) 	  		Shared by LCD and 4x7-segment displays
(0011) 	  		output 8-bit data to LCD or 8-bit data to 4x7-segment displays
(0012) 	  PORTC:
(0013) 	        shared by 8-bit dipswitch and 4 x touch switches + 4 buttons
(0014) 			receive inputs from dipswitch, touch switches and buttons 				
(0015) 	  PORTD: 
(0016) 	  		Drive LED group1 (the left group of LED) 
(0017) Attention:
(0018) 	  1. J12 should be capped (connectted)
(0019) 	  2. J5 is the Jump for LCD back light power 	  
(0020) 
(0021) Operation:
(0022) 	  1. 4 x 7-segment displays show the inputs to PORTC in Binary
(0023) */
(0024)    
(0025) 
(0026) #include <iom16v.h>
(0027) #include <macros.h>
(0028) 
(0029) unsigned char pattern[]={0x01, 0x03, 0x07, 0x0F, 0x1f, 0x3f, 0x7f, 0xff, 0x7f,
(0030) 						 0x3f, 0x1f, 0x0f, 0x07, 0x03, 0x01};
(0031) unsigned char rowused[]={0x01, 0x02, 0x10, 0x08, 0x04, 0x20, 0x40, 0x80};
(0032) 
(0033) const char dig0 = 0x40, dig1 = 0x80, dig2=0x10, dig3=0x08, dot=0x20;
(0034) char segconv[]={0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7d, 0x07, 0x7f, 0x6f};
(0035) unsigned char BCD0, BCD1, BCD2, BCD3;
(0036) int count;
(0037) 
(0038) void port_init(void)
(0039) {
(0040)  DDRA  = 0xFF;		//set PortA output
_port_init:
      A8 EF8F      LDI	R24,0xFF
      A9 BB8A      OUT	0x1A,R24
(0041)  DDRB  = 0xff;		//set PORTB output
      AA BB87      OUT	0x17,R24
(0042)  DDRC  = 0x00;		//set PORTC output
      AB 2422      CLR	R2
      AC BA24      OUT	0x14,R2
(0043)  PORTC = 0xff;
      AD BB85      OUT	0x15,R24
(0044)  DDRD  = 0xFF;		//set PORTD output
      AE BB81      OUT	0x11,R24
      AF 9508      RET
_delay:
  i                    --> R20
  j                    --> R22
  count                --> R16
      B0 940E 01AB CALL	push_xgsetF000
(0045) }
(0046) 
(0047) void delay(int count)
(0048) {
(0049)  int i, j;
(0050)  for(i=count; i>0; i--)
      B2 01A8      MOVW	R20,R16
      B3 C00B      RJMP	0x00BF
(0051)     for(j=10; j>0; j--)
      B4 E06A      LDI	R22,0xA
      B5 E070      LDI	R23,0
      B6 5061      SUBI	R22,1
      B7 4070      SBCI	R23,0
      B8 2422      CLR	R2
      B9 2433      CLR	R3
      BA 1626      CP	R2,R22
      BB 0637      CPC	R3,R23
      BC F3CC      BLT	0x00B6
      BD 5041      SUBI	R20,1
      BE 4050      SBCI	R21,0
      BF 2422      CLR	R2
      C0 2433      CLR	R3
      C1 1624      CP	R2,R20
      C2 0635      CPC	R3,R21
      C3 F384      BLT	0x00B4
      C4 940C 01B0 JMP	pop_xgsetF000
_BinToBCD:
  data                 --> R20
      C6 934A      ST	R20,-Y
      C7 935A      ST	R21,-Y
      C8 01A8      MOVW	R20,R16
(0052) 	   ;
(0053) } 
(0054) //*****************************************************************
(0055) void BinToBCD(int data)
(0056) {
(0057)  BCD0=0;
      C9 2422      CLR	R2
      CA 9220 0226 STS	BCD0,R2
(0058)  BCD1=0;
      CC 9220 0225 STS	BCD1,R2
(0059)  BCD2=0;
      CE 9220 0224 STS	BCD2,R2
(0060)  BCD3=0;
      D0 9220 0223 STS	BCD3,R2
(0061)  if(data>=10000)
      D2 3140      CPI	R20,0x10
      D3 E2E7      LDI	R30,0x27
      D4 075E      CPC	R21,R30
      D5 F014      BLT	0x00D8
(0062)     data=0;
      D6 2744      CLR	R20
      D7 2755      CLR	R21
(0063)  if(data>=1000)
      D8 3E48      CPI	R20,0xE8
      D9 E0E3      LDI	R30,3
      DA 075E      CPC	R21,R30
      DB F06C      BLT	0x00E9
(0064)     {
(0065)     BCD3=data/1000;
      DC EE28      LDI	R18,0xE8
      DD E033      LDI	R19,3
      DE 018A      MOVW	R16,R20
      DF 940E 0175 CALL	div16s
      E1 9300 0223 STS	BCD3,R16
(0066) 	data=data%1000;
      E3 EE28      LDI	R18,0xE8
      E4 E033      LDI	R19,3
      E5 018A      MOVW	R16,R20
      E6 940E 0171 CALL	mod16s
      E8 01A8      MOVW	R20,R16
(0067) 	}	
(0068)  if(data>=100)
      E9 3644      CPI	R20,0x64
      EA E0E0      LDI	R30,0
      EB 075E      CPC	R21,R30
      EC F06C      BLT	0x00FA
(0069)     {
(0070)     BCD2=data/100;
      ED E624      LDI	R18,0x64
      EE E030      LDI	R19,0
      EF 018A      MOVW	R16,R20
      F0 940E 0175 CALL	div16s
      F2 9300 0224 STS	BCD2,R16
(0071) 	data=data%100;
      F4 E624      LDI	R18,0x64
      F5 E030      LDI	R19,0
      F6 018A      MOVW	R16,R20
      F7 940E 0171 CALL	mod16s
      F9 01A8      MOVW	R20,R16
(0072) 	}	
(0073) 	
(0074)  if(data>=10)
      FA 304A      CPI	R20,0xA
      FB E0E0      LDI	R30,0
      FC 075E      CPC	R21,R30
      FD F06C      BLT	0x010B
(0075)     {
(0076)     BCD1=data/10;
      FE E02A      LDI	R18,0xA
      FF E030      LDI	R19,0
     100 018A      MOVW	R16,R20
     101 940E 0175 CALL	div16s
     103 9300 0225 STS	BCD1,R16
(0077) 	data=data%10;
     105 E02A      LDI	R18,0xA
     106 E030      LDI	R19,0
     107 018A      MOVW	R16,R20
     108 940E 0171 CALL	mod16s
     10A 01A8      MOVW	R20,R16
(0078) 	}		
(0079)  BCD0=data;	
     10B 9340 0226 STS	BCD0,R20
     10D 9159      LD	R21,Y+
     10E 9149      LD	R20,Y+
     10F 9508      RET
(0080) }
(0081) 
(0082) void dispseg(void)
(0083) {
(0084)  PORTB=~segconv[BCD0];
_dispseg:
     110 E187      LDI	R24,0x17
     111 E092      LDI	R25,2
     112 91E0 0226 LDS	R30,BCD0
     114 27FF      CLR	R31
     115 0FE8      ADD	R30,R24
     116 1FF9      ADC	R31,R25
     117 8020      LDD	R2,Z+0
     118 9420      COM	R2
     119 BA28      OUT	0x18,R2
(0085)  PORTA=dig0;
     11A EEE4      LDI	R30,0xE4
     11B E0F0      LDI	R31,0
     11C 9026      ELPM	R2,0(Z)
     11D BA2B      OUT	0x1B,R2
(0086)  delay(20);
     11E E104      LDI	R16,0x14
     11F E010      LDI	R17,0
     120 DF8F      RCALL	_delay
(0087)  PORTB=~segconv[BCD1];
     121 E187      LDI	R24,0x17
     122 E092      LDI	R25,2
     123 91E0 0225 LDS	R30,BCD1
     125 27FF      CLR	R31
     126 0FE8      ADD	R30,R24
     127 1FF9      ADC	R31,R25
     128 8020      LDD	R2,Z+0
     129 9420      COM	R2
     12A BA28      OUT	0x18,R2
(0088)  PORTA=dig1;
     12B EEE5      LDI	R30,0xE5
     12C E0F0      LDI	R31,0
     12D 9026      ELPM	R2,0(Z)
     12E BA2B      OUT	0x1B,R2
(0089)  delay(20);
     12F E104      LDI	R16,0x14
     130 E010      LDI	R17,0
     131 DF7E      RCALL	_delay
(0090)  PORTB=~segconv[BCD2];
     132 E187      LDI	R24,0x17
     133 E092      LDI	R25,2
     134 91E0 0224 LDS	R30,BCD2
     136 27FF      CLR	R31
     137 0FE8      ADD	R30,R24
     138 1FF9      ADC	R31,R25
     139 8020      LDD	R2,Z+0
     13A 9420      COM	R2
     13B BA28      OUT	0x18,R2
(0091)  PORTA=dig2;
     13C EEE6      LDI	R30,0xE6
     13D E0F0      LDI	R31,0
     13E 9026      ELPM	R2,0(Z)
     13F BA2B      OUT	0x1B,R2
(0092)  delay(20);
     140 E104      LDI	R16,0x14
     141 E010      LDI	R17,0
     142 DF6D      RCALL	_delay
(0093)  PORTB=~segconv[BCD3];
     143 E187      LDI	R24,0x17
     144 E092      LDI	R25,2
     145 91E0 0223 LDS	R30,BCD3
     147 27FF      CLR	R31
     148 0FE8      ADD	R30,R24
     149 1FF9      ADC	R31,R25
     14A 8020      LDD	R2,Z+0
     14B 9420      COM	R2
     14C BA28      OUT	0x18,R2
(0094)  PORTA=dig3;
     14D EEE7      LDI	R30,0xE7
     14E E0F0      LDI	R31,0
     14F 9026      ELPM	R2,0(Z)
     150 BA2B      OUT	0x1B,R2
(0095)  delay(20);
     151 E104      LDI	R16,0x14
     152 E010      LDI	R17,0
     153 DF5C      RCALL	_delay
     154 9508      RET
(0096) }
(0097) 
(0098) void dot_on(void)
(0099) {
(0100)  PORTB=~0x80;
_dot_on:
     155 E78F      LDI	R24,0x7F
     156 EF9F      LDI	R25,0xFF
     157 BB88      OUT	0x18,R24
(0101)  PORTA=dot; 
     158 EEE8      LDI	R30,0xE8
     159 E0F0      LDI	R31,0
     15A 9026      ELPM	R2,0(Z)
     15B BA2B      OUT	0x1B,R2
(0102)  delay(20);
     15C E104      LDI	R16,0x14
     15D E010      LDI	R17,0
     15E DF51      RCALL	_delay
     15F 9508      RET
(0103) }
(0104) 
(0105) 
(0106) //*****************************************************************
(0107) void main(void)
(0108) {
(0109)  unsigned char outa=0x00, outb=0x00, outc=0x00, outd=0x00;
_main:
  outd                 --> R10
  outc                 --> R10
  outb                 --> R10
  outa                 --> R10
  dswin                --> R10
     160 24AA      CLR	R10
(0110)  unsigned char dswin;  
(0111)  port_init();
     161 DF46      RCALL	_port_init
     162 C00C      RJMP	0x016F
(0112)  while(1)
(0113)    {
(0114)     WDR();				  //Watchdog reset
     163 95A8      WDR
(0115) 	dswin=PINC;
     164 B2A3      IN	R10,0x13
(0116) 	BinToBCD(dswin);
     165 2D0A      MOV	R16,R10
     166 2711      CLR	R17
     167 DF5E      RCALL	_BinToBCD
(0117) 	dispseg();
     168 DFA7      RCALL	_dispseg
(0118) 	dot_on();
     169 DFEB      RCALL	_dot_on
(0119) 	PORTD=0x55;
     16A E585      LDI	R24,0x55
     16B BB82      OUT	0x12,R24
(0120) 	delay(5);
FILE: <library>
     16C E005      LDI	R16,5
     16D E010      LDI	R17,0
     16E DF41      RCALL	_delay
     16F CFF3      RJMP	0x0163
     170 9508      RET
mod16s:
     171 9468      BSET	6
     172 92DA      ST	R13,-Y
     173 2ED1      MOV	R13,R17
     174 C004      RJMP	0x0179
div16s:
     175 94E8      BCLR	6
     176 92DA      ST	R13,-Y
     177 2ED1      MOV	R13,R17
     178 26D3      EOR	R13,R19
     179 FF17      SBRS	R17,7
     17A C004      RJMP	0x017F
     17B 9510      COM	R17
     17C 9500      COM	R16
     17D 5F0F      SUBI	R16,0xFF
     17E 4F1F      SBCI	R17,0xFF
     17F FF37      SBRS	R19,7
     180 C004      RJMP	0x0185
     181 9530      COM	R19
     182 9520      COM	R18
     183 5F2F      SUBI	R18,0xFF
     184 4F3F      SBCI	R19,0xFF
     185 940E 0192 CALL	xdiv16u
     187 FED7      SBRS	R13,7
     188 C004      RJMP	0x018D
     189 9510      COM	R17
     18A 9500      COM	R16
     18B 5F0F      SUBI	R16,0xFF
     18C 4F1F      SBCI	R17,0xFF
     18D 90D9      LD	R13,Y+
     18E 9508      RET
mod16u:
     18F 9468      BSET	6
     190 C001      RJMP	xdiv16u
div16u:
     191 94E8      BCLR	6
xdiv16u:
     192 92EA      ST	R14,-Y
     193 92FA      ST	R15,-Y
     194 938A      ST	R24,-Y
     195 24EE      CLR	R14
     196 24FF      CLR	R15
     197 E180      LDI	R24,0x10
     198 0F00      LSL	R16
     199 1F11      ROL	R17
     19A 1CEE      ROL	R14
     19B 1CFF      ROL	R15
     19C 16E2      CP	R14,R18
     19D 06F3      CPC	R15,R19
     19E F018      BCS	0x01A2
     19F 1AE2      SUB	R14,R18
     1A0 0AF3      SBC	R15,R19
     1A1 9503      INC	R16
     1A2 958A      DEC	R24
     1A3 F7A1      BNE	0x0198
     1A4 F416      BRTC	0x01A7
     1A5 2D0E      MOV	R16,R14
     1A6 2D1F      MOV	R17,R15
     1A7 9189      LD	R24,Y+
     1A8 90F9      LD	R15,Y+
     1A9 90E9      LD	R14,Y+
     1AA 9508      RET
push_xgsetF000:
     1AB 937A      ST	R23,-Y
     1AC 936A      ST	R22,-Y
     1AD 935A      ST	R21,-Y
     1AE 934A      ST	R20,-Y
     1AF 9508      RET
pop_xgsetF000:
     1B0 9149      LD	R20,Y+
     1B1 9159      LD	R21,Y+
     1B2 9169      LD	R22,Y+
     1B3 9179      LD	R23,Y+
     1B4 9508      RET