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}
Line {
SrcBlock " "
SrcPort 1
DstBlock "Integrator"
DstPort 1
}
Line {
SrcBlock " "
SrcPort 1
DstBlock "Integrator1"
DstPort 1
}
Line {
SrcBlock "Integrator"
SrcPort 1
Points [0, 0; 45, 0]
Branch {
DstBlock "phidr"
DstPort 1
}
Branch {
Points [0, 110; -275, 0; 0, 15]
DstBlock " "
DstPort 1
}
}
Line {
SrcBlock "Integrator1"
SrcPort 1
Points [0, 0; 20, 0]
Branch {
DstBlock "phiqr"
DstPort 1
}
Branch {
Points [0, -90; -250, 0; 0, -20]
DstBlock " "
DstPort 2
}
}
Annotation {
Position [346, 133]
UseDisplayTextAsClickCallback off
}
}
}
Block {
BlockType SubSystem
Name "Stator"
Ports [5, 2]
Position [160, 78, 255, 222]
TreatAsAtomicUnit off
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
MaskHideContents off
System {
Name "Stator"
Location [500, 134, 973, 555]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "100"
Block {
BlockType Inport
Name "Uds"
Position [25, 28, 55, 42]
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "Uqs"
Position [30, 313, 60, 327]
Port "2"
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "ids"
Position [25, 78, 55, 92]
Port "3"
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "iqs"
Position [30, 268, 60, 282]
Port "4"
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "w1"
Position [30, 138, 60, 152]
Port "5"
IconDisplay "Port number"
}
Block {
BlockType Gain
Name " "
Position [110, 70, 150, 100]
Gain "rs"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name " "
Ports [3, 1]
Position [215, 242, 235, 308]
Inputs "--+"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutScaling "2^-10"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name " "
Ports [3, 1]
Position [205, 52, 225, 118]
Inputs "+-+"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutScaling "2^-10"
SaturateOnIntegerOverflow off
}
Block {
BlockType Gain
Name " "
Position [120, 260, 150, 290]
Gain "rs"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name " "
Ports [2, 1]
Position [120, 134, 135, 176]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name " "
Ports [2, 1]
Position [120, 199, 135, 241]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Integrator
Name "Integrator"
Ports [1, 1]
Position [290, 70, 320, 100]
IgnoreLimit off
}
Block {
BlockType Integrator
Name "Integrator1"
Ports [1, 1]
Position [290, 260, 320, 290]
IgnoreLimit off
}
Block {
BlockType Outport
Name "phids"
Position [390, 78, 420, 92]
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "phiqs"
Position [395, 268, 425, 282]
Port "2"
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
SrcBlock "ids"
SrcPort 1
DstBlock " "
DstPort 1
}
Line {
SrcBlock " "
SrcPort 1
Points [0, 0]
DstBlock " "
DstPort 2
}
Line {
SrcBlock "Uds"
SrcPort 1
Points [65, 0; 0, 30]
DstBlock " "
DstPort 1
}
Line {
SrcBlock "iqs"
SrcPort 1
DstBlock " "
DstPort 1
}
Line {
SrcBlock " "
SrcPort 1
DstBlock " "
DstPort 2
}
Line {
SrcBlock "Uqs"
SrcPort 1
Points [75, 0; 0, -25]
DstBlock " "
DstPort 3
}
Line {
SrcBlock "w1"
SrcPort 1
Points [5, 0]
Branch {
DstBlock " "
DstPort 1
}
Branch {
Points [0, 85]
DstBlock " "
DstPort 2
}
}
Line {
SrcBlock " "
SrcPort 1
Points [25, 0; 0, -50]
DstBlock " "
DstPort 3
}
Line {
SrcBlock " "
SrcPort 1
Points [30, 0; 0, 35]
DstBlock " "
DstPort 1
}
Line {
SrcBlock " "
SrcPort 1
Points [0, 0]
DstBlock "Integrator"
DstPort 1
}
Line {
SrcBlock " "
SrcPort 1
Points [0, 0]
DstBlock "Integrator1"
DstPort 1
}
Line {
SrcBlock "Integrator"
SrcPort 1
Points [0, 0; 40, 0]
Branch {
DstBlock "phids"
DstPort 1
}
Branch {
Points [0, 110; -275, 0; 0, 15]
DstBlock " "
DstPort 1
}
}
Line {
SrcBlock "Integrator1"
SrcPort 1
Points [0, 0; 20, 0]
Branch {
DstBlock "phiqs"
DstPort 1
}
Branch {
Points [0, -90; -255, 0; 0, -20]
DstBlock " "
DstPort 2
}
}
}
}
Block {
BlockType Sum
Name "Sum"
Ports [2, 1]
Position [80, 385, 100, 405]
ShowName off
IconShape "round"
Inputs "|+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType SubSystem
Name "Tm-Te"
Ports [5, 2]
Position [595, 194, 705, 306]
TreatAsAtomicUnit off
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
MaskHideContents off
System {
Name "Tm-Te"
Location [347, 120, 987, 396]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "100"
Block {
BlockType Inport
Name "phids"
Position [25, 28, 55, 42]
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "phiqs"
Position [30, 178, 60, 192]
Port "2"
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "Tm"
Position [260, 48, 290, 62]
Port "3"
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "ids"
Position [30, 238, 60, 252]
Port "4"
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "iqs"
Position [25, 98, 55, 112]
Port "5"
IconDisplay "Port number"
}
Block {
BlockType Product
Name " "
Ports [2, 1]
Position [115, 49, 135, 96]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name " "
Ports [2, 1]
Position [210, 119, 230, 161]
Inputs "+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutScaling "2^-10"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name " "
Ports [2, 1]
Position [115, 194, 135, 241]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Gain
Name " "
Position [265, 126, 310, 154]
Gain "np"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name " "
Ports [2, 1]
Position [345, 109, 365, 151]
Inputs "-+"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutScaling "2^-10"
SaturateOnIntegerOverflow off
}
Block {
BlockType Gain
Name " "
Position [395, 116, 440, 144]
Gain "1/J"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Integrator
Name "Integrator"
Ports [1, 1]
Position [500, 115, 530, 145]
IgnoreLimit off
}
Block {
BlockType Outport
Name "Te"
Position [585, 198, 615, 212]
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "wr"
Position [580, 123, 610, 137]
Port "2"
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
SrcBlock "phids"
SrcPort 1
Points [15, 0; 0, 25]
DstBlock " "
DstPort 1
}
Line {
SrcBlock "iqs"
SrcPort 1
Points [15, 0; 0, -20]
DstBlock " "
DstPort 2
}
Line {
SrcBlock "phiqs"
SrcPort 1
Points [15, 0; 0, 20]
DstBlock " "
DstPort 1
}
Line {
SrcBlock "ids"
SrcPort 1
Points [15, 0; 0, -15]
DstBlock " "
DstPort 2
}
Line {
SrcBlock " "
SrcPort 1
Points [25, 0; 0, 55]
DstBlock " "
DstPort 1
}
Line {
SrcBlock " "
SrcPort 1
Points [25, 0; 0, -70]
DstBlock " "
DstPort 2
}
Line {
SrcBlock " "
SrcPort 1
Points [0, 0]
DstBlock " "
DstPort 1
}
Line {
SrcBlock " "
SrcPort 1
Points [0, 0; 5, 0]
Branch {
DstBlock " "
DstPort 2
}
Branch {
Points [0, 65]
DstBlock "Te"
DstPort 1
}
}
Line {
SrcBlock "Tm"
SrcPort 1
Points [15, 0; 0, 65]
DstBlock " "
DstPort 1
}
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