16c554.h

C51实现西门子PPI协议

//串口1
#define uc_16c554a_RHR  XBYTE[0x7000]         //RECEIVE HOLDING REGISTER
#define uc_16c554a_THR  XBYTE[0x7000]         //TRANSMIT HOLDING REGISTER
#define uc_16c554a_IER   XBYTE[0x7100]        //INTERRUPT  ENABLE REGISTER
#define uc_16c554a_ISR   XBYTE[0x7200]        //INTERRUPT  STATUE REGISTER
#define uc_16c554a_FCR  XBYTE[0x7200]        //FIFO CONTROL REGISTER
#define uc_16c554a_LCR  XBYTE[0x7300]        //LINE CONTROL REGISTER
#define uc_16c554a_MCR  XBYTE[0x7400]       //MODEM  CONTEROL REGISTER
#define uc_16c554a_LSR  XBYTE[0x7500]        //LINE  STATUE REGISTER
#define uc_16c554a_MSR  XBYTE[0x7600]       //MODEM STATUE REGISTER
#define uc_16c554a_SPR  XBYTE[0x7700]       //SCRATCHPAD REGISTER

#define uc_16c554a_DLL  XBYTE[0x7000]      //LSB OF DIVISOR LATCH
#define uc_16c554a_DLM  XBYTE[0x7100]      //MSB  OF DIVISOR LATCH

//串口2
#define uc_16c554b_RHR  XBYTE[0x6800]         //RECEIVE HOLDING REGISTER
#define uc_16c554b_THR  XBYTE[0x6800]         //TRANSMIT HOLDING REGISTER
#define uc_16c554b_IER   XBYTE[0x6900]        //INTERRUPT  ENABLE REGISTER
#define uc_16c554b_ISR   XBYTE[0x6A00]        //INTERRUPT  STATUE REGISTER
#define uc_16c554b_FCR  XBYTE[0x6A00]        //FIFO CONTROL REGISTER
#define uc_16c554b_LCR  XBYTE[0x6B00]        //LINE CONTROL REGISTER
#define uc_16c554b_MCR  XBYTE[0x6C00]       //MODEM  CONTEROL REGISTER
#define uc_16c554b_LSR  XBYTE[0x6D00]        //LINE  STATUE REGISTER
#define uc_16c554b_MSR  XBYTE[0x6E00]       //MODEM STATUE REGISTER
#define uc_16c554b_SPR  XBYTE[0x6F00]       //SCRATCHPAD REGISTER

#define uc_16c554b_DLL  XBYTE[0x6800]      //LSB OF DIVISOR LATCH
#define uc_16c554b_DLM XBYTE[0x6900]      //MSB  OF DIVISOR LATCH
		 
//串口3
#define uc_16c554c_RHR  XBYTE[0x5800]         //RECEIVE HOLDING REGISTER
#define uc_16c554c_THR  XBYTE[0x5800]         //TRANSMIT HOLDING REGISTER
#define uc_16c554c_IER   XBYTE[0x5900]        //INTERRUPT  ENABLE REGISTER
#define uc_16c554c_ISR   XBYTE[0x5A00]        //INTERRUPT  STATUE REGISTER
#define uc_16c554c_FCR  XBYTE[0x5A00]        //FIFO CONTROL REGISTER
#define uc_16c554c_LCR  XBYTE[0x5B00]        //LINE CONTROL REGISTER
#define uc_16c554c_MCR  XBYTE[0x5C00]       //MODEM  CONTEROL REGISTER
#define uc_16c554c_LSR  XBYTE[0x5D00]        //LINE  STATUE REGISTER
#define uc_16c554c_MSR  XBYTE[0x5E00]       //MODEM STATUE REGISTER
#define uc_16c554c_SPR  XBYTE[0x5F00]       //SCRATCHPAD REGISTER

#define uc_16c554c_DLL  XBYTE[0x5800]      //LSB OF DIVISOR LATCH
#define uc_16c554c_DLM  XBYTE[0x5900]      //MSB  OF DIVISOR LATCH

//串口4
#define uc_16c554d_RHR  XBYTE[0x3800]         //RECEIVE HOLDING REGISTER
#define uc_16c554d_THR  XBYTE[0x3800]         //TRANSMIT HOLDING REGISTER
#define uc_16c554d_IER   XBYTE[0x3900]        //INTERRUPT  ENABLE REGISTER
#define uc_16c554d_ISR   XBYTE[0x3A00]        //INTERRUPT  STATUE REGISTER
#define uc_16c554d_FCR  XBYTE[0x3A00]        //FIFO CONTROL REGISTER
#define uc_16c554d_LCR  XBYTE[0x3B00]        //LINE CONTROL REGISTER
#define uc_16c554d_MCR  XBYTE[0x3C00]       //MODEM  CONTEROL REGISTER
#define uc_16c554d_LSR  XBYTE[0x3D00]        //LINE  STATUE REGISTER
#define uc_16c554d_MSR  XBYTE[0x3E00]       //MODEM STATUE REGISTER
#define uc_16c554d_SPR  XBYTE[0x3F00]       //SCRATCHPAD REGISTER

#define uc_16c554d_DLL  XBYTE[0x3800]      //LSB OF DIVISOR LATCH
#define uc_16c554d_DLM  XBYTE[0x3900]      //MSB  OF DIVISOR LATCH
	




unsigned char  bdata uc_554a_isr;
sbit uc_554a_isr_status=uc_554a_isr^0;
unsigned char bdata uc_554b_isr;
sbit uc_554b_isr_status=uc_554b_isr^0;

unsigned char uc_554a_r_buffer[18];
unsigned char uc_554a_r_number=0;
unsigned char uc_554a_r_complete=0;


unsigned char uc_554b_r_buffer[18];
unsigned char uc_554b_r_number=0;
unsigned char uc_554b_r_complete=0;

unsigned char bdata uc_554c_isr;
sbit uc_554c_isr_status=uc_554c_isr^0;
unsigned char bdata uc_554d_isr;
sbit uc_554d_isr_status=uc_554d_isr^0;
unsigned char uc_554c_r_buffer[18];
unsigned char uc_554c_r_number=0;
unsigned char uc_554c_r_complete=0;

unsigned char uc_554d_r_buffer[18];
unsigned char uc_554d_r_number=0;
unsigned char uc_554d_r_complete=0;

unsigned char sy_u_c;

extern unsigned char s_buffer[18];
unsigned char i;



void uart_16C554asend(unsigned char s);
void frame_16c554asend(unsigned char t);
void uart_16C554bsend(unsigned char s);
void frame_16c554bsend(unsigned char t);
void uart_16C554csend(unsigned char s);
void frame_16c554csend(unsigned char t);
void uart_16C554dsend(unsigned char s);
void frame_16c554dsend(unsigned char t);
 void init_16c554uart(void);