📄 autof020config.lst
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173 1 //----------------------------------------------------------------
174 1
175 1 REF0CN = 0x03; // Reference Control Register
176 1
177 1 //----------------------------------------------------------------
178 1 // ADC Configuration
C51 COMPILER V7.06 AUTOF020CONFIG 12/21/2004 15:11:27 PAGE 4
179 1 //----------------------------------------------------------------
180 1
181 1 AMX0CF = 0x60; // AMUX Configuration Register //page 37
182 1 AMX0SL = 0x00; // AMUX Channel Select Register //page 38
183 1 ADC0CF = 0xF8; // ADC Configuration Register //page 39
184 1 ADC0CN = 0xC0; // ADC Control Register //page 40
185 1
186 1 ADC0LTH = 0x00; // ADC Less-Than High Byte Register
187 1 ADC0LTL = 0x00; // ADC Less-Than Low Byte Register
188 1 ADC0GTH = 0xFF; // ADC Greater-Than High Byte Register
189 1 ADC0GTL = 0xFF; // ADC Greater-Than Low Byte Register
190 1
191 1 AMX1SL = 0x00; // AMUX1 Channel Select Register
192 1 ADC1CF = 0xF8; // ADC1 Configuration Register
193 1 ADC1CN = 0x00; // ADC1 Control Register
194 1
195 1 //----------------------------------------------------------------
196 1 // DAC Configuration
197 1 //----------------------------------------------------------------
198 1
199 1 DAC0CN = 0x80; // DAC0 Control Register
200 1 DAC0L = 0x55; // DAC0 Low Byte Register
201 1 DAC0H = 0x10; // DAC0 High Byte Register
202 1
203 1 DAC1CN = 0x80; // DAC1 Control Register
204 1 DAC1L = 0x55; // DAC1 Low Byte Register
205 1 DAC1H = 0x10; // DAC1 High Byte Register
206 1
207 1 //----------------------------------------------------------------
208 1 // SPI Configuration
209 1 //----------------------------------------------------------------
210 1
211 1 SPI0CN = 0x00; // SPI Control Register
212 1 SPI0CFG = 0x00; // SPI Configuration Register
213 1 SPI0CKR = 0x00; // SPI Clock Rate Register
214 1
215 1 //----------------------------------------------------------------
216 1 // UART Configuration
217 1 //----------------------------------------------------------------
218 1
219 1 SCON0 = 0x50; // Serial Port Control Register
220 1 SADEN0 = 0x00; // Serial 0 Slave Address Enable
221 1 SADDR0 = 0x00; // Serial 0 Slave Address Register
222 1
223 1 PCON = 0x00; // Power Control Register
224 1
225 1 SCON1 = 0x00; // Serial Port 1 Control Register
226 1 SADEN1 = 0x00; // Serial 1 Slave Address Enable
227 1 SADDR1 = 0x00; // Serial 1 Slave Address Register
228 1
229 1 //----------------------------------------------------------------
230 1 // SMBus Configuration
231 1 //----------------------------------------------------------------
232 1
233 1 SMB0CN = 0x00; // SMBus Control Register page 171
234 1 SMB0ADR = 0x00; // SMBus Address Register page 173
235 1 SMB0CR = 0x00; // SMBus Clock Rate Register page 172
236 1
237 1
238 1 //----------------------------------------------------------------
239 1 // PCA Configuration
240 1 //----------------------------------------------------------------
C51 COMPILER V7.06 AUTOF020CONFIG 12/21/2004 15:11:27 PAGE 5
241 1
242 1 PCA0MD = 0x00; // PCA Mode Register
243 1 PCA0CN = 0x00; // PCA Control Register
244 1 PCA0H = 0x00; // PCA Counter/Timer High Byte
245 1 PCA0L = 0x00; // PCA Counter/Timer Low Byte
246 1
247 1
248 1 //Module 0
249 1 PCA0CPM0 = 0x00; // PCA Capture/Compare Register 0
250 1 PCA0CPL0 = 0x00; // PCA Counter/Timer Low Byte
251 1 PCA0CPH0 = 0x00; // PCA Counter/Timer High Byte
252 1
253 1 //Module 1
254 1 PCA0CPM1 = 0x00; // PCA Capture/Compare Register 1
255 1 PCA0CPL1 = 0x00; // PCA Counter/Timer Low Byte
256 1 PCA0CPH1 = 0x00; // PCA Counter/Timer High Byte
257 1
258 1 //Module 2
259 1 PCA0CPM2 = 0x00; // PCA Capture/Compare Register 2
260 1 PCA0CPL2 = 0x00; // PCA Counter/Timer Low Byte
261 1 PCA0CPH2 = 0x00; // PCA Counter/Timer High Byte
262 1
263 1 //Module 3
264 1 PCA0CPM3 = 0x00; // PCA Capture/Compare Register 3
265 1 PCA0CPL3 = 0x00; // PCA Counter/Timer Low Byte
266 1 PCA0CPH3 = 0x00; // PCA Counter/Timer High Byte
267 1
268 1 //Module 4
269 1 PCA0CPM4 = 0x00; // PCA Capture/Compare Register 4
270 1 PCA0CPL4 = 0x00; // PCA Counter/Timer Low Byte
271 1 PCA0CPH4 = 0x00; // PCA Counter/Timer High Byte
272 1
273 1 //----------------------------------------------------------------
274 1 // Timer Configuration
275 1 //----------------------------------------------------------------
276 1
277 1 CKCON = 0x10; // Clock Control Register
278 1 TH0 = 0x00; // Timer 0 High Byte
279 1 TL0 = 0x00; // Timer 0 Low Byte
280 1 TH1 = 0xDC; // Timer 1 High Byte
281 1 TL1 = 0x00; // Timer 1 Low Byte
282 1 TMOD = 0x21; // Timer Mode Register
283 1 TCON = 0x40; // Timer Control Register
284 1
285 1 RCAP2H = 0x10; // Timer 2 Capture Register High Byte
286 1 RCAP2L = 0x00; // Timer 2 Capture Register Low Byte
287 1 TH2 = 0x00; // Timer 2 High Byte
288 1 TL2 = 0x00; // Timer 2 Low Byte
289 1 T2CON = 0x04; // Timer 2 Control Register
290 1
291 1 TMR3RLL = 0x00; // Timer 3 Reload Register Low Byte
292 1 TMR3RLH = 0x00; // Timer 3 Reload Register High Byte
293 1 TMR3H = 0x00; // Timer 3 High Byte
294 1 TMR3L = 0x00; // Timer 3 Low Byte
295 1 TMR3CN = 0x00; // Timer 3 Control Register
296 1
297 1 RCAP4H = 0x00; // Timer 4 Capture Register High Byte
298 1 RCAP4L = 0xFF; // Timer 4 Capture Register Low Byte
299 1 TH4 = 0x00; // Timer 4 High Byte
300 1 TL4 = 0x00; // Timer 4 Low Byte
301 1 T4CON = 0x00; // Timer 4 Control Register
302 1
C51 COMPILER V7.06 AUTOF020CONFIG 12/21/2004 15:11:27 PAGE 6
303 1 //----------------------------------------------------------------
304 1 // Reset Source Configuration
305 1 //
306 1 // Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0
307 1 //------------------------------------------------------------------
308 1 // R | R/W | R/W | R/W | R | R | R/W | R
309 1 //------------------------------------------------------------------
310 1 // JTAG |Convert | Comp.0 | S/W | WDT | Miss. | POR | HW
311 1 // Reset |Start | Reset/ | Reset | Reset | Clock | Force | Pin
312 1 // Flag |Reset/ | Enable | Force | Flag | Detect| & | Reset
313 1 // |Enable | Flag | & | | Flag | Flag | Flag
314 1 // |Flag | | Flag | | | |
315 1 //------------------------------------------------------------------
316 1 // NOTE! : Comparator 0 must be enabled before it is enabled as a
317 1 // reset source.
318 1 //
319 1 // NOTE! : External CNVSTR must be enalbed through the crossbar, and
320 1 // the crossbar enabled prior to enabling CNVSTR as a reset source
321 1 //------------------------------------------------------------------
322 1
323 1 //RSTSRC = 0x00; // Reset Source Register由于偶尔出现不复位现象依技术支持部门要求而做
324 1
325 1
326 1 //----------------------------------------------------------------
327 1 // Interrupt Configuration
328 1 //----------------------------------------------------------------
329 1
330 1 IE = 0x32; //Interrupt Enable
331 1 IP = 0x00; //Interrupt Priority
332 1 EIE1 = 0x00; //Extended Interrupt Enable 1 Page 103
333 1 EIE2 = 0x00; //Extended Interrupt Enable 2 Page 103
334 1 EIP1 = 0x00; //Extended Interrupt Priority 1 Page 103
335 1 EIP2 = 0x00; //Extended Interrupt Priority 2 Page 103
336 1 // other initialization code here...
337 1 } //End of config
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 237 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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