📄 autof020config.lst
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176 1 //----------------------------------------------------------------
177 1 // Reference Control Register Configuration
178 1 //----------------------------------------------------------------
C51 COMPILER V7.06 AUTOF020CONFIG 06/06/2005 16:32:36 PAGE 4
179 1
180 1 REF0CN = 0x03; // Reference Control Register
181 1
182 1 //----------------------------------------------------------------
183 1 // ADC Configuration
184 1 //----------------------------------------------------------------
185 1
186 1 AMX0CF = 0x60; // AMUX Configuration Register //page 37
187 1 AMX0SL = 0x00; // AMUX Channel Select Register //page 38
188 1 ADC0CF = 0xF8; // ADC Configuration Register //page 39
189 1 ADC0CN = 0xC0; // ADC Control Register //page 40
190 1
191 1 ADC0LTH = 0x00; // ADC Less-Than High Byte Register
192 1 ADC0LTL = 0x00; // ADC Less-Than Low Byte Register
193 1 ADC0GTH = 0xFF; // ADC Greater-Than High Byte Register
194 1 ADC0GTL = 0xFF; // ADC Greater-Than Low Byte Register
195 1
196 1 AMX1SL = 0x00; // AMUX1 Channel Select Register
197 1 ADC1CF = 0xF8; // ADC1 Configuration Register
198 1 ADC1CN = 0x00; // ADC1 Control Register
199 1
200 1 //----------------------------------------------------------------
201 1 // DAC Configuration
202 1 //----------------------------------------------------------------
203 1
204 1 DAC0CN = 0x80; // DAC0 Control Register
205 1 DAC0L = 0x55; // DAC0 Low Byte Register
206 1 DAC0H = 0x10; // DAC0 High Byte Register
207 1
208 1 DAC1CN = 0x80; // DAC1 Control Register
209 1 DAC1L = 0x55; // DAC1 Low Byte Register
210 1 DAC1H = 0x10; // DAC1 High Byte Register
211 1
212 1 //----------------------------------------------------------------
213 1 // SPI Configuration
214 1 //----------------------------------------------------------------
215 1
216 1 SPI0CN = 0x00; // SPI Control Register
217 1 SPI0CFG = 0x00; // SPI Configuration Register
218 1 SPI0CKR = 0x00; // SPI Clock Rate Register
219 1
220 1 //----------------------------------------------------------------
221 1 // UART Configuration
222 1 //----------------------------------------------------------------
223 1
224 1 SCON0 = 0x50; // Serial Port Control Register
225 1 SADEN0 = 0x00; // Serial 0 Slave Address Enable
226 1 SADDR0 = 0x00; // Serial 0 Slave Address Register
227 1
228 1 PCON = 0x00; // Power Control Register
229 1
230 1 SCON1 = 0x00; // Serial Port 1 Control Register
231 1 SADEN1 = 0x00; // Serial 1 Slave Address Enable
232 1 SADDR1 = 0x00; // Serial 1 Slave Address Register
233 1
234 1 //----------------------------------------------------------------
235 1 // SMBus Configuration
236 1 //----------------------------------------------------------------
237 1
238 1 SMB0CN = 0x00; // SMBus Control Register page 171
239 1 SMB0ADR = 0x00; // SMBus Address Register page 173
240 1 SMB0CR = 0x00; // SMBus Clock Rate Register page 172
C51 COMPILER V7.06 AUTOF020CONFIG 06/06/2005 16:32:36 PAGE 5
241 1
242 1
243 1 //----------------------------------------------------------------
244 1 // PCA Configuration
245 1 //----------------------------------------------------------------
246 1
247 1 PCA0MD = 0x00; // PCA Mode Register
248 1 PCA0CN = 0x00; // PCA Control Register
249 1 PCA0H = 0x00; // PCA Counter/Timer High Byte
250 1 PCA0L = 0x00; // PCA Counter/Timer Low Byte
251 1
252 1
253 1 //Module 0
254 1 PCA0CPM0 = 0x00; // PCA Capture/Compare Register 0
255 1 PCA0CPL0 = 0x00; // PCA Counter/Timer Low Byte
256 1 PCA0CPH0 = 0x00; // PCA Counter/Timer High Byte
257 1
258 1 //Module 1
259 1 PCA0CPM1 = 0x00; // PCA Capture/Compare Register 1
260 1 PCA0CPL1 = 0x00; // PCA Counter/Timer Low Byte
261 1 PCA0CPH1 = 0x00; // PCA Counter/Timer High Byte
262 1
263 1 //Module 2
264 1 PCA0CPM2 = 0x00; // PCA Capture/Compare Register 2
265 1 PCA0CPL2 = 0x00; // PCA Counter/Timer Low Byte
266 1 PCA0CPH2 = 0x00; // PCA Counter/Timer High Byte
267 1
268 1 //Module 3
269 1 PCA0CPM3 = 0x00; // PCA Capture/Compare Register 3
270 1 PCA0CPL3 = 0x00; // PCA Counter/Timer Low Byte
271 1 PCA0CPH3 = 0x00; // PCA Counter/Timer High Byte
272 1
273 1 //Module 4
274 1 PCA0CPM4 = 0x00; // PCA Capture/Compare Register 4
275 1 PCA0CPL4 = 0x00; // PCA Counter/Timer Low Byte
276 1 PCA0CPH4 = 0x00; // PCA Counter/Timer High Byte
277 1
278 1 //----------------------------------------------------------------
279 1 // Timer Configuration
280 1 //----------------------------------------------------------------
281 1
282 1 CKCON = 0x10; // Clock Control Register
283 1 TH0 = 0x00; // Timer 0 High Byte
284 1 TL0 = 0x00; // Timer 0 Low Byte
285 1 TH1 = 0xDC; // Timer 1 High Byte
286 1 TL1 = 0x00; // Timer 1 Low Byte
287 1 TMOD = 0x21; // Timer Mode Register
288 1 TCON = 0x40; // Timer Control Register
289 1
290 1 RCAP2H = 0x10; // Timer 2 Capture Register High Byte
291 1 RCAP2L = 0x00; // Timer 2 Capture Register Low Byte
292 1 TH2 = 0x00; // Timer 2 High Byte
293 1 TL2 = 0x00; // Timer 2 Low Byte
294 1 T2CON = 0x04; // Timer 2 Control Register
295 1
296 1 TMR3RLL = 0x00; // Timer 3 Reload Register Low Byte
297 1 TMR3RLH = 0x00; // Timer 3 Reload Register High Byte
298 1 TMR3H = 0x00; // Timer 3 High Byte
299 1 TMR3L = 0x00; // Timer 3 Low Byte
300 1 TMR3CN = 0x00; // Timer 3 Control Register
301 1
302 1 RCAP4H = 0x00; // Timer 4 Capture Register High Byte
C51 COMPILER V7.06 AUTOF020CONFIG 06/06/2005 16:32:36 PAGE 6
303 1 RCAP4L = 0xFF; // Timer 4 Capture Register Low Byte
304 1 TH4 = 0x00; // Timer 4 High Byte
305 1 TL4 = 0x00; // Timer 4 Low Byte
306 1 T4CON = 0x00; // Timer 4 Control Register
307 1
308 1 //----------------------------------------------------------------
309 1 // Reset Source Configuration
310 1 //
311 1 // Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0
312 1 //------------------------------------------------------------------
313 1 // R | R/W | R/W | R/W | R | R | R/W | R
314 1 //------------------------------------------------------------------
315 1 // JTAG |Convert | Comp.0 | S/W | WDT | Miss. | POR | HW
316 1 // Reset |Start | Reset/ | Reset | Reset | Clock | Force | Pin
317 1 // Flag |Reset/ | Enable | Force | Flag | Detect| & | Reset
318 1 // |Enable | Flag | & | | Flag | Flag | Flag
319 1 // |Flag | | Flag | | | |
320 1 //------------------------------------------------------------------
321 1 // NOTE! : Comparator 0 must be enabled before it is enabled as a
322 1 // reset source.
323 1 //
324 1 // NOTE! : External CNVSTR must be enalbed through the crossbar, and
325 1 // the crossbar enabled prior to enabling CNVSTR as a reset source
326 1 //------------------------------------------------------------------
327 1
328 1 //RSTSRC = 0x00; // Reset Source Register由于偶尔出现不复位现象依技术支持部门要求而做
329 1
330 1
331 1 //----------------------------------------------------------------
332 1 // Interrupt Configuration
333 1 //----------------------------------------------------------------
334 1
335 1 IE = 0x32; //Interrupt Enable
336 1 IP = 0x00; //Interrupt Priority
337 1 EIE1 = 0x00; //Extended Interrupt Enable 1 Page 103
338 1 EIE2 = 0x00; //Extended Interrupt Enable 2 Page 103
339 1 EIP1 = 0x00; //Extended Interrupt Priority 1 Page 103
340 1 EIP2 = 0x00; //Extended Interrupt Priority 2 Page 103
341 1 // other initialization code here...
342 1 } //End of config
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 240 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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