📄 mcu.h
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/*H**************************************************************************
* NAME: mcu.h
*----------------------------------------------------------------------------
* Copyright (c) 2006 Atmel.
*----------------------------------------------------------------------------
* RELEASE: at90usb162-hidgen-1_0_1
* REVISION: 1.5
*----------------------------------------------------------------------------
* PURPOSE:
* SFR Description file for at90usb16.
*****************************************************************************/
#ifndef MCU_H
#define MCU_H
/*==========================*/
/* Predefined SFR Addresses */
/*==========================*/
/******************************************************************************/
#if defined(__ICCAVR__) || defined(__IAR_SYSTEMS_ASM__)
/******************************************************************************/
SFR_B(PINB, 0x03) /* Input Pins, Port B */
SFR_B(DDRB, 0x04) /* Data Direction Register, Port B */
SFR_B(PORTB, 0x05) /* Data Register, Port B */
SFR_B(PINC, 0x06) /* Input Pins, Port C */
SFR_B(DDRC, 0x07) /* Data Direction Register, Port C */
SFR_B(PORTC, 0x08) /* Data Register, Port C */
SFR_B(PIND, 0x09) /* Input Pins, Port D */
SFR_B(DDRD, 0x0A) /* Data Direction Register, Port D */
SFR_B(PORTD, 0x0B) /* Data Register, Port D */
SFR_B(TIFR0, 0x15) /* Timer/Counter Interrupt Flag register 0 */
SFR_B(TIFR1, 0x16) /* Timer/Counter Interrupt Flag register 1 */
SFR_B(PCIFR, 0x1B) /* Pin Change Interrupt Flag Register */
SFR_B(EIFR, 0x1C) /* External Interrupt Flag Register */
SFR_B(EIMSK, 0x1D) /* External Interrupt Mask Register */
SFR_B(GPIOR0, 0x1E) /* General Purpose Register 0 */
SFR_B(EECR, 0x1F) /* EEPROM Control Register */
SFR_B(EEDR, 0x20) /* EEPROM Data Register */
SFR_W(EEAR, 0x21) /* EEPROM Address Register */
SFR_B(GTCCR, 0x23) /* General Purpose Register */
SFR_B(TCCR0A, 0x24) /* Timer/Counter 0 Control Register */
SFR_B(TCCR0B, 0x25) /* Timer/Counter 0 Control Register */
SFR_B(TCNT0, 0x26) /* Timer/Counter 0 */
SFR_B(OCR0A, 0x27) /* Timer/Counter 0 Output Compare Register */
SFR_B(OCR0B, 0x28) /* Timer/Counter 0 Output Compare Register */
SFR_B(PLLCSR, 0x29) /* PLL Control and Status Register */
SFR_B(GPIOR1, 0x2A) /* General Purpose Register 1 */
SFR_B(GPIOR2, 0x2B) /* General Purpose Register 2 */
SFR_B(SPCR, 0x2C) /* SPI Control Register */
SFR_B(SPSR, 0x2D) /* SPI Status Register */
SFR_B(SPDR, 0x2E) /* SPI I/O Data Register */
SFR_B(ACSR, 0x30) /* Analog Comparator Control and Status Register */
SFR_B(DWDR, 0x31) /* DebugWire Register */
SFR_B(SMCR, 0x33) /* Sleep Mode Control Register */
SFR_B(MCUSR, 0x34) /* MCU Status Register */
SFR_B(MCUCR, 0x35) /* MCU Control Register */
SFR_B(SPMCSR, 0x37) /* Store Program Memory Control and Status Register */
SFR_W(SP, 0x3D) /* Stack Pointer */
SFR_B(SREG, 0x3F) /* Status Register */
SFR_B_EXT(WDTCR, 0x60) /* Watchdog Timer Control Register for compatibility */
SFR_B_EXT(WDTCSR, 0x60) /* Watchdog Timer Control Register */
SFR_B_EXT(CLKPR, 0x61) /* Clock Prescale Register */
SFR_B_EXT(WDTCKD, 0x62) /* Watchdog Timer Clock Divider and Early Interrupt */
SFR_B_EXT(REGCR, 0x63) /* Regulator Control Register */
SFR_B_EXT(OSCCAL, 0x66) /* Oscillator Calibration Register */
SFR_B_EXT(PCICR, 0x68) /* Pin Change interrupt enable */
SFR_B_EXT(EICRA, 0x69) /* External Interrupt Control Register A */
SFR_B_EXT(EICRB, 0x6A) /* External Interrupt Control Register B */
SFR_B_EXT(PCMSK0, 0x6B) /* Pin Change interrupt mask */
SFR_B_EXT(PCMSK1, 0x6C) /* Pin Change interrupt mask */
SFR_B_EXT(TIMSK0, 0x6E) /* Timer/Counter 0 Interrupt Mask Register */
SFR_B_EXT(TIMSK1, 0x6F) /* Timer/Counter 1 Interrupt Mask Register */
SFR_B_EXT(TCCR1A, 0x80) /* Timer/Counter 1 Control Register A */
SFR_B_EXT(TCCR1B, 0x81) /* Timer/Counter 1 Control Register B */
SFR_B_EXT(TCCR1C, 0x82) /* Timer/Counter 1 Control Register C */
SFR_W_EXT(TCNT1, 0x84) /* Timer/Counter 1 Register */
SFR_W_EXT(ICR1, 0x86) /* Timer/Counter 1 Input Capture Register */
SFR_W_EXT(OCR1A, 0x88) /* Timer/Counter 1 Output Compare Register A */
SFR_W_EXT(OCR1B, 0x8A) /* Timer/Counter 1 Output Compare Register B */
SFR_W_EXT(OCR1C, 0x8C) /* Timer/Counter 1 Output Compare Register C */
SFR_B_EXT(UCSR1A, 0xC8) /* USART1 Control and Status Register A */
SFR_B_EXT(UCSR1B, 0xC9) /* USART1 Control and Status Register B */
SFR_B_EXT(UCSR1C, 0xCA) /* USART1 Control and Status Register C */
SFR_B_EXT(UCSR1D, 0xCB) /* USART1 Control and Status Register D */
SFR_W_EXT(UBRR1, 0xCC) /* USART1 Baud Rate Register Low */
SFR_B_EXT(UDR1, 0xCE) /* USART1 I/O Data Register */
// USB CONTROLLER
// USB General
// Page 1
SFR_B_EXT(USBCON, 0xD8);
SFR_B_EXT(UDPADDL, 0xDB);
SFR_B_EXT(UDPADDH, 0xDC);
// USB Device
// Page 1
SFR_B_EXT(UDCON, 0xE0);
SFR_B_EXT(UDINT, 0xE1);
SFR_B_EXT(UDIEN, 0xE2);
SFR_B_EXT(UDADDR, 0xE3);
SFR_B_EXT(UDFNUML, 0xE4);
SFR_B_EXT(UDFNUMH, 0xE5);
SFR_B_EXT(UDMFN, 0xE6);
SFR_B_EXT(UDTST, 0xE7);
// USB Endpoint
// Page 1
SFR_B_EXT(UENUM, 0xE9);
SFR_B_EXT(UERST, 0xEA);
SFR_B_EXT(UECONX, 0xEB);
SFR_B_EXT(UECFG0X, 0xEC);
SFR_B_EXT(UECFG1X, 0xED);
SFR_B_EXT(UESTA0X, 0xEE);
SFR_B_EXT(UESTA1X, 0xEF);
SFR_B_EXT(UEINTX, 0xE8);
SFR_B_EXT(UEIENX, 0xF0);
SFR_B_EXT(UEDATX, 0xF1);
SFR_B_EXT(UEBCLX, 0xF2);
SFR_B_EXT(UEINT, 0xF4);
// PS2 and USB
SFR_B_EXT(PS2CON, 0xFA);
SFR_B_EXT(UPOE, 0xFB);
// Clock Switching
SFR_B_EXT(CKSEL0, 0xD0);
SFR_B_EXT(CKSEL1, 0xD1);
SFR_B_EXT(CKSTA, 0xD2);
/*==============================*/
/* Interrupt Vector Definitions */
/*==============================*/
/* NB! vectors are specified as byte addresses */
#define RESET_vect (0x00)
#define INT0_vect (0x04)
#define INT1_vect (0x08)
#define INT2_vect (0x0C)
#define INT3_vect (0x10)
#define INT4_vect (0x14)
#define INT5_vect (0x18)
#define INT6_vect (0x1C)
#define INT7_vect (0x20)
#define PCINT0_vect (0x24)
#define PCINT1_vect (0x28)
#define USB_GENERAL_vect (0x2C)
#define USB_ENDPOINT_vect (0x30)
#define WDT_vect (0x34)
#define TIMER1_CAPT_vect (0x38)
#define TIMER1_COMPA_vect (0x3C)
#define TIMER1_COMPB_vect (0x40)
#define TIMER1_COMPC_vect (0x44)
#define TIMER1_OVF_vect (0x48)
#define TIMER0_COMPA_vect (0x4C)
#define TIMER0_COMPB_vect (0x50)
#define TIMER0_OVF_vect (0x54)
#define SPI_STC_vect (0x58)
#define USART1_RXC_vect (0x5C)
#define USART1_UDRE_vect (0x60)
#define USART1_TXC_vect (0x64)
#define ANA_COMP_vect (0x68)
#define EE_RDY_vect (0x6C)
#define SPM_RDY_vect (0x70)
//#define (0x74)
#endif /* _IAR_ */
/******************************************************************************/
#ifdef __CODEVISIONAVR__
/******************************************************************************/
#define PINB (*(volatile unsigned char *)0x23) /* Input Pins, Port B */
#define DDRB (*(volatile unsigned char *)0x24) /* Data Direction Register, Port B */
#define PORTB (*(volatile unsigned char *)0x25) /* Data Register, Port B */
#define PINC (*(volatile unsigned char *)0x26) /* Input Pins, Port C */
#define DDRC (*(volatile unsigned char *)0x27) /* Data Direction Register, Port C */
#define PORTC (*(volatile unsigned char *)0x28) /* Data Register, Port C */
#define PIND (*(volatile unsigned char *)0x29) /* Input Pins, Port D */
#define DDRD (*(volatile unsigned char *)0x2A) /* Data Direction Register, Port D */
#define PORTD (*(volatile unsigned char *)0x2B) /* Data Register, Port D */
#define TIFR0 (*(volatile unsigned char *)0x35) /* Timer/Counter Interrupt Flag register 0 */
#define TIFR1 (*(volatile unsigned char *)0x36) /* Timer/Counter Interrupt Flag register 1 */
#define PCIFR (*(volatile unsigned char *)0x3B) /* Pin Change Interrupt Flag Register */
#define EIFR (*(volatile unsigned char *)0x3C) /* External Interrupt Flag Register */
#define EIMSK (*(volatile unsigned char *)0x3D) /* External Interrupt Mask Register */
#define GPIOR0 (*(volatile unsigned char *)0x3E) /* General Purpose Register 0 */
#define EECR (*(volatile unsigned char *)0x3F) /* EEPROM Control Register */
#define EEDR (*(volatile unsigned char *)0x40) /* EEPROM Data Register */
#define EEAR (*(volatile unsigned int *)0x41) /* EEPROM Address Register */
#define GTCCR (*(volatile unsigned char *)0x43) /* General Purpose Register */
#define TCCR0A (*(volatile unsigned char *)0x44) /* Timer/Counter 0 Control Register */
#define TCCR0B (*(volatile unsigned char *)0x45) /* Timer/Counter 0 Control Register */
#define TCNT0 (*(volatile unsigned char *)0x46) /* Timer/Counter 0 */
#define OCR0A (*(volatile unsigned char *)0x47) /* Timer/Counter 0 Output Compare Register */
#define OCR0B (*(volatile unsigned char *)0x48) /* Timer/Counter 0 Output Compare Register */
#define PLLCSR (*(volatile unsigned char *)0x49) /* PLL Control and Status Register */
#define GPIOR1 (*(volatile unsigned char *)0x4A) /* General Purpose Register 1 */
#define GPIOR2 (*(volatile unsigned char *)0x4B) /* General Purpose Register 2 */
#define SPCR (*(volatile unsigned char *)0x4C) /* SPI Control Register */
#define SPSR (*(volatile unsigned char *)0x4D) /* SPI Status Register */
#define SPDR (*(volatile unsigned char *)0x4E) /* SPI I/O Data Register */
#define ACSR (*(volatile unsigned char *)0x50) /* Analog Comparator Control and Status Register */
#define DWDR (*(volatile unsigned char *)0x51) /* DebugWire Register */
#define SMCR (*(volatile unsigned char *)0x53) /* Sleep Mode Control Register */
#define MCUSR (*(volatile unsigned char *)0x54) /* MCU Status Register */
#define MCUCR (*(volatile unsigned char *)0x55) /* MCU Control Register */
#define SPMCSR (*(volatile unsigned char *)0x57) /* Store Program Memory Control and Status Register */
#define SP (*(volatile unsigned int *)0x5D) /* Stack Pointer */
#define SREG (*(volatile unsigned char *)0x5F) /* Status Register */
#define WDTCR (*(volatile unsigned char *)0x60) /* Watchdog Timer Control Register */
#define CLKPR (*(volatile unsigned char *)0x61) /* Clock Prescale Register */
#define OSCCAL (*(volatile unsigned char *)0x66) /* Oscillator Calibration Register */
#define PCICR (*(volatile unsigned char *)0x68) /* Pin Change interrupt enable */
#define EICRA (*(volatile unsigned char *)0x69) /* External Interrupt Control Register A */
#define EICRB (*(volatile unsigned char *)0x6A) /* External Interrupt Control Register B */
#define PCMSK0 (*(volatile unsigned char *)0x6B) /* Pin Change interrupt mask */
#define PCMSK1 (*(volatile unsigned char *)0x6C) /* Pin Change interrupt mask */
#define TIMSK0 (*(volatile unsigned char *)0x6E) /* Timer/Counter 0 Interrupt Mask Register */
#define TIMSK1 (*(volatile unsigned char *)0x6F) /* Timer/Counter 1 Interrupt Mask Register */
#define TCCR1A (*(volatile unsigned char *)0x80) /* Timer/Counter 1 Control Register A */
#define TCCR1B (*(volatile unsigned char *)0x81) /* Timer/Counter 1 Control Register B */
#define TCCR1C (*(volatile unsigned char *)0x82) /* Timer/Counter 1 Control Register C */
#define TCNT1 (*(volatile unsigned int *)0x84) /* Timer/Counter 1 Register */
#define ICR1 (*(volatile unsigned int *)0x86) /* Timer/Counter 1 Input Capture Register */
#define OCR1A (*(volatile unsigned int *)0x88) /* Timer/Counter 1 Output Compare Register A */
#define OCR1B (*(volatile unsigned int *)0x8A) /* Timer/Counter 1 Output Compare Register B */
#define OCR1C (*(volatile unsigned int *)0x8C) /* Timer/Counter 1 Output Compare Register C */
#define UCSR1A (*(volatile unsigned char *)0xC8) /* USART1 Control and Status Register A */
#define UCSR1B (*(volatile unsigned char *)0xC9) /* USART1 Control and Status Register B */
#define UCSR1C (*(volatile unsigned char *)0xCA) /* USART1 Control and Status Register C */
#define UBRR1 (*(volatile unsigned int *)0xCC) /* USART1 Baud Rate Register */
#define UBRR1L (*(volatile unsigned char *)0xCC) /* USART1 Baud Rate Register Low */
#define UBRR1H (*(volatile unsigned char *)0xCD) /* USART1 Baud Rate Register High */
#define UDR1 (*(volatile unsigned char *)0xCE) /* USART1 I/O Data Register */
// USB CONTROLLER
// USB General
// Page 1
#define USBCON (*(volatile unsigned char *)0xD8) /* */
#define UDPADDL (*(volatile unsigned char *)0xDB) /* */
#define UDPADDH (*(volatile unsigned char *)0xDC) /* */
// USB Device
// Page 1
#define UDCON (*(volatile unsigned char *)0xE0) /* */
#define UDINT (*(volatile unsigned char *)0xE1) /* */
#define UDIEN (*(volatile unsigned char *)0xE2) /* */
#define UDADDR (*(volatile unsigned char *)0xE3) /* */
#define UDFNUML (*(volatile unsigned char *)0xE4) /* */
#define UDFNUMH (*(volatile unsigned char *)0xE5) /* */
#define UDMFN (*(volatile unsigned char *)0xE6) /* */
#define UDTST (*(volatile unsigned char *)0xE7) /* */
// USB Endpoint
// Page 1
#define UENUM (*(volatile unsigned char *)0xE9) /* */
#define UERST (*(volatile unsigned char *)0xEA) /* */
#define UECONX (*(volatile unsigned char *)0xEB) /* */
#define UECFG0X (*(volatile unsigned char *)0xEC) /* */
#define UECFG1X (*(volatile unsigned char *)0xED) /* */
#define UESTA0X (*(volatile unsigned char *)0xEE) /* */
#define UESTA1X (*(volatile unsigned char *)0xEF) /* */
#define UEINTX (*(volatile unsigned char *)0xE8) /* */
#define UEIENX (*(volatile unsigned char *)0xF0) /* */
#define UEDATX (*(volatile unsigned char *)0xF1) /* */
#define UEBCLX (*(volatile unsigned char *)0xF2) /* */
#define UEINT (*(volatile unsigned char *)0xF4) /* */
// PS2 and USB
#define PS2CON (*(volatile unsigned char *)0xFA) /* */
#define UPOE (*(volatile unsigned char *)0xFB) /* */
// Clock Switching
#define CKSEL0 (*(volatile unsigned char *)0xD0) /* */
#define CKSEL1 (*(volatile unsigned char *)0xD1) /* */
#define CKSTA (*(volatile unsigned char *)0xD2) /* */
/*==============================*/
/* Interrupt Vector Definitions */
/*==============================*/
/* NB! vectors are specified as byte addresses */
#define RESET_vect 1
#define INT0_vect 2
#define INT1_vect 3
#define INT2_vect 4
#define INT3_vect 5
#define INT4_vect 6
#define INT5_vect 7
#define INT6_vect 8
#define INT7_vect 9
#define PCINT0_vect 10
#define PCINT1_vect 11
#define USB_GENERAL_vect 12
#define USB_ENDPOINT_vect 13
#define WDT_vect 14
#define TIMER1_CAPT_vect 15
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