init.lst

这是一个在KEIL环境下个人编译通过并调试过的ARM的UCOS例子

ARM Macro Assembler    Page 1 


    1 00000000         ;;; Copyright ARM Ltd 2001. All rights reserved.
    2 00000000         ;
    3 00000000         ; This module performs ROM/RAM remapping (if required), 
                       initializes stack 
    4 00000000         ; pointers and interrupts for each mode, and finally bra
                       nches to __main in 
    5 00000000         ; the C library (which eventually calls main()).
    6 00000000         ;
    7 00000000         ; On reset, the ARM core starts up in Supervisor (SVC) m
                       ode, in ARM state, 
    8 00000000         ; with IRQ and FIQ disabled.
    9 00000000         
   10 00000000         
   11 00000000         ; --- Standard definitions of mode bits and interrupt (I
                        & F) flags in PSRs
   12 00000000         
   13 00000000         
   14 00000000                 AREA             Init, CODE, READONLY
   15 00000000                 CODE32
   16 00000000                 GET              snds.s
    1 00000000         ;/******************************************************
                       *******************/
    2 00000000         ;/*                                                     
                                         */
    3 00000000         ;/* FILE NAME                                      VERSI
                       ON                */
    4 00000000         ;/*                                                     
                                         */
    5 00000000         ;/* snds.a                                 ARM7100 Board
                        version 1.0      */
    6 00000000         ;/*                                                     
                                         */
    7 00000000         ;/* COMPONENT                                           
                                         */
    8 00000000         ;/*                                                     
                                         */
    9 00000000         ;/* DESCRIPTION                                         
                                         */
   10 00000000         ;/*                                                     
                                         */
   11 00000000         ;/*     ARM7100 for KS32C5000, KS32C50100 ASSEBLER SYSTE
                       M HEADER FILE     */
   12 00000000         ;/*                                                     
                                         */
   13 00000000         ;/* AUTHOR                                              
                                         */
   14 00000000         ;/*                                                     
                                         */
   15 00000000         ;/*      Young Sun KIM, Samsung Electronics, Inc.       
                                         */
   16 00000000         ;/*                                                     
                                         */
   17 00000000         ;/* DATA STRUCTURES                                     
                                         */
   18 00000000         ;/*                                                     
                                         */
   19 00000000         ;/*                                                     
                                         */
   20 00000000         ;/* FUNCTIONS                                           



ARM Macro Assembler    Page 2 


                                         */
   21 00000000         ;/*                                                     
                                         */
   22 00000000         ;/* DEPENDENCIES                                        
                                         */
   23 00000000         ;/*                                                     
                                         */
   24 00000000         ;/*                                                     
                                         */
   25 00000000         ;/* HISTORY                                             
                                         */
   26 00000000         ;/*                                                     
                                         */
   27 00000000         ;/*         NAME            DATE                    REMA
                       RKS               */
   28 00000000         ;/*                                                     
                                         */
   29 00000000         ;/*      Young Sun KIM   09-25-1998      Created initial
                        version 1.0      */
   30 00000000         ;/******************************************************
                       *******************/
   31 00000000         ;/******************************************************
                       *******************/
   32 00000000         ;/* Format of the Program Status Register               
                                         */
   33 00000000         ;/******************************************************
                       *******************/
   34 00000000         ;/*                                                     
                                         */
   35 00000000         ;/* 31  30  29   28         7   6   5   4   3   2   1   
                       0                 */
   36 00000000         ;/*+---+---+---+---+--ss--+---+---+---+---+---+---+---+-
                       --+               */
   37 00000000         ;/*| N | Z | C | V |      | I | F | T |     M4 ~ M0     
                         |               */
   38 00000000         ;/*+---+---+---+---+--ss--+---+---+---+---+---+---+---+-
                       --+               */
   39 00000000         ;/*                                                     
                                         */
   40 00000000         ;/* Processor Mode and Mask                             
                                         */
   41 00000000         ;/*                                                     
                                         */
   42 00000000         ;/******************************************************
                       *******************/
   43 00000000         ;
   44 00000000 00000010 
                       Mode_USR
                               EQU              0x10
   45 00000000 00000011 
                       Mode_FIQ
                               EQU              0x11
   46 00000000 00000012 
                       Mode_IRQ
                               EQU              0x12
   47 00000000 00000013 
                       Mode_SVC
                               EQU              0x13
   48 00000000 00000017 



ARM Macro Assembler    Page 3 


                       Mode_ABT
                               EQU              0x17
   49 00000000 0000001B 
                       Mode_UND
                               EQU              0x1B
   50 00000000 0000001F 
                       Mode_SYS
                               EQU              0x1F        ; available on ARM 
                                                            Arch 4 and later
   51 00000000         
   52 00000000 0000003F 
                       MASK_MODE
                               EQU              0x0000003F
   53 00000000 00000013 
                       MODE_SVC32
                               EQU              0x00000013
   54 00000000         
   55 00000000 00000080 
                       I_BIT   EQU              0x80        ; when I bit is set
                                                            , IRQ is disabled
   56 00000000 00000040 
                       F_BIT   EQU              0x40        ; when F bit is set
                                                            , FIQ is disabled
   57 00000000         
   58 00000000         
   59 00000000         ; --- System memory locations
   60 00000000         
   61 00000000 1000000C 
                       CM_ctl_reg
                               EQU              0x1000000C  ; Address of Core M
                                                            odule Control Regis
                                                            ter
   62 00000000 00000004 
                       Remap_bit
                               EQU              0x04        ; Bit 2 is remap bi
                                                            t of CM_ctl
   63 00000000         
   64 00000000         ; --- Amount of memory (in bytes) allocated for stacks
   65 00000000         
   66 00000000 00000000 
                       Len_FIQ_Stack
                               EQU              0
   67 00000000 00000100 
                       Len_IRQ_Stack
                               EQU              256
   68 00000000 00000000 
                       Len_ABT_Stack
                               EQU              0
   69 00000000 00000000 
                       Len_UND_Stack
                               EQU              0
   70 00000000 00000400 
                       Len_SVC_Stack
                               EQU              1024
   71 00000000         ; Len_USR_Stack  EQU     1024
   72 00000000         
   73 00000000         ; Add lengths >0 for FIQ_Stack, ABT_Stack, UND_Stack if 
                       you need them.
   74 00000000         ; Offsets will be loaded as immediate values.



ARM Macro Assembler    Page 4 


   75 00000000         ; Offsets must be 8 byte aligned.
   76 00000000         
   77 00000000 00000000 
                       Offset_FIQ_Stack
                               EQU              0
   78 00000000 00000000 
                       Offset_IRQ_Stack
                               EQU              Offset_FIQ_Stack + Len_FIQ_Stac
k
   79 00000000 00000100 
                       Offset_ABT_Stack
                               EQU              Offset_IRQ_Stack + Len_IRQ_Stac
k
   80 00000000 00000100 
                       Offset_UND_Stack
                               EQU              Offset_ABT_Stack + Len_ABT_Stac
k
   81 00000000 00000100 
                       Offset_SVC_Stack
                               EQU              Offset_UND_Stack + Len_UND_Stac
k
   82 00000000         ; Offset_USR_Stack       EQU     Offset_SVC_Stack + Len_
                       SVC_Stack
   83 00000000         
   84 00000000         
   85 00000000         
   86 00000000         ;/******************************************************
                       *******************/
   87 00000000         ;/*  SYSTEM STACK MEMORY  : 8K bytes system stacks are d
                       efined at memory.a
   88 00000000         ;/******************************************************
                       *******************/
   89 00000000 00000400 
                       USR_STACK_SIZE
                               EQU              1024
   90 00000000 00000200 
                       UDF_STACK_SIZE
                               EQU              512
   91 00000000 00000200 
                       ABT_STACK_SIZE
                               EQU              512
   92 00000000 00000800 
                       IRQ_STACK_SIZE
                               EQU              2048
   93 00000000 00000800 
                       FIQ_STACK_SIZE
                               EQU              2048
   94 00000000 00000800 
                       SUP_STACK_SIZE
                               EQU              2048
   95 00000000         
   96 00000000 010F0000 
                       STACK_STAR_ADDR
                               EQU              0x10f0000
   97 00000000         ;/******************************************************
                       *******************/
   98 00000000         ;/*  SYSTEM USER STACK MEMORY
   99 00000000         ;/******************************************************
                       *******************/



ARM Macro Assembler    Page 5 


  100 00000000 00000400 
                       SYSTEM_SIZE
                               EQU              1024        ; Define the system
                                                             stack size
  101 00000000 00000400 
                       TIMER_SIZE
                               EQU              1024        ; Define timer HISR
                                                             stack size
  102 00000000 00000002 
                       TIMER_PRIORITY
                               EQU              2           ; Timer HISR priori
                                                            ty (values from
  103 00000000         ; 0 to 2, where 0 is highest)
  104 00000000         
  105 00000000         ;/******************************************************
                       *******************/
  106 00000000         ;/*  SYSTEM CLOCK                                       
                                         */
  107 00000000         ;/******************************************************
                       *******************/
  108 00000000         
  109 00000000 000F4240 
                       MHz     EQU              1000000
  110 00000000         
  111 00000000         ;#ifdef KS32C50100
  112 00000000 02FAF080 
                       fMCLK_MHz
                               EQU              50000000    ; 50MHz, KS32C50100
                                                            
  113 00000000         ;#else
  114 00000000         ;fMCLK_MHz   EQU     20000000   ; 33MHz, KS32C5000
  115 00000000         ;fMCLK_MHz   EQU     25000000   ; 33MHz, KS32C5000
  116 00000000         ;fMCLK_MHz   EQU     30000000   ; 33MHz, KS32C5000
  117 00000000         ;fMCLK_MHz   EQU     33000000   ; 33MHz, KS32C5000
  118 00000000         ;fMCLK_MHz   EQU     40000000   ; 33MHz, KS32C5000
  119 00000000         ;#endif
  120 00000000         
  121 00000000 00000032 
                       fMCLK   EQU              fMCLK_MHz/MHz
  122 00000000         
  123 00000000 03FF0000 
                       ASIC_BASE
                               EQU              0x03ff0000
  124 00000000         
  125 00000000         ;Interrupt Control
  126 00000000         
  127 00000000 03FF4000 
                       INT_CNTRL_BASE