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📄 equate.inc

📁 用cy7c66113开发的HUB
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;----------------------------------------------------------------
; applicable modes                          SETUP   IN      OUT
;-------------------                       ------   ----    -----
DISABLED:               EQU 00h         ;   ignore  ignore  ignore
NAK_IN_OUT:             EQU 01h         ;   accept  NAK     NAK
STATUS_OUT_ONLY:        EQU 02h         ;   accept  STALL   check
STALL:                  EQU 03h         ;   accept  STALL   STALL
IGNORE:                 EQU 04h         ;   accept  ignore  ignore
ISO_OUT:                EQU 05h         ;   ignore  ignore  always
STATUS_IN_ONLY:         EQU 06h         ;   accept  TX0     STALL
ISO_IN:                 EQU 07h         ;   ignore  TX cnt  ignore
NAK_OUT:                EQU 08h         ;   ignore  ignore  NAK
ACK_OUT:                EQU 09h         ;   ignore  ignore  ACK
NAK_OUT_STATUS_IN:      EQU 0Ah         ;   accept  TX0     NAK
ACK_OUT_STATUS_IN:      EQU 0Bh         ;   accept  TX0     ACK
NAK_IN:                 EQU 0Ch         ;   ignore  NAK     ignore
ACK_IN:                 EQU 0Dh         ;   ignore  TX cnt  ignore
NAK_IN_STATUS_OUT:      EQU 0Eh         ;   accept  NAK     check
ACK_IN_STATUS_OUT:      EQU 0Fh         ;   accept  TX cnt  check

      ; Mode Settings			        ;  SETUP    IN      OUT
Disabled:			    EQU	00h		    ; ignore  ignore  ignore
NakInOut:			    EQU	01h		    ; accept    NAK     NAK
StatusOut:			    EQU	02h		    ; accept   STALL   check
StallInOut:			    EQU	03h		    ; accept   STALL   STALL
IgnoreInOut:		    EQU	04h		    ; accept  ignore  ignore
IsochOut:			    EQU	05h		    ; ignore  ignore  accept
StatusIn:			    EQU	06h		    ; accept   TX 0    STALL
IsochIn:			    EQU	07h		    ; ignore   TX n   ignore
NakOut:				    EQU	08h		    ; ignore  ignore    NAK
AckOut:				    EQU	09h		    ; ignore  ignore    ACK
NakOutStatusIn:		    EQU	0Ah		    ; accept   TX 0     NAK
AckOutStatusIn:		    EQU	0Bh		    ; accept   TX 0     ACK
NakIn:				    EQU	0Ch		    ; ignore    NAK   ignore
AckIn:				    EQU	0Dh		    ; ignore   TX n   ignore
NakInStatusOut:		    EQU	0Eh		    ; accept    NAK    check
AckInStatusOut:		    EQU	0Fh		    ; accept   TX n    check

;DISABLED:              EQU 0h          ; disabled
NAKINOUT:               EQU 1h          ; accept SETUP, NAK IN and OUT
STATUSOUTONLY:          EQU 2h          ; accept SETUP and OUT, stall IN
;STALL:                 EQU 3h          ; stall IN and OUT packets
SETUP:                  EQU 4h          ; accept SETUP packets
STATUSINONLY:           EQU 6h          ; accept SETUP and IN (TX 0), stall OUT
NAKOUTSTATUSIN:         EQU 0Ah         ; accept SETUP, NAK Out
ACKOUTSTATUSIN:         EQU 0Bh         ; accept SETUP, TX0 IN, ACK OUT
NAKIN:                  EQU 0Ch         ; NAK IN packets
ACKIN:                  EQU 0Dh         ; ACK IN packets (EP one)
NAKIN_STATUSOUT:        EQU 0eh         
ACKIN_STATUSOUT:        EQU 0Fh         ; accept SETUP packets (EP zero) 
                                        ; ACK IN packets

; endpoint 0 only mode registers
USB_MODE_MASK:          EQU 00001111b   ; mode[3:0] bits
MASK_TOKEN:             EQU 11100000b   ; token status bits
MASK_ACK:               EQU 00010000b   ; ACK received from host ;*? NOT DOCUMENTED(data sheet)!!
OUT_TOKEN:              EQU 00100000b   ; OUT token received
IN_TOKEN:               EQU 01000000b   ; IN token received
SETUP_TOKEN:            EQU 10000000b   ; SETUP token received

ACK_BIT:                EQU MASK_ACK
EP0_OUT_RCV:            EQU OUT_TOKEN
EP0_IN_RCV:             EQU IN_TOKEN
EP0_SETUP_RCV:          EQU SETUP_TOKEN


; for REG_EP_{}_COUNT endpoint count registers
MASK_COUNT:             EQU 00001111b   ; count[3:0] bits
MASK_DATAVALID:         EQU 01000000b   ; data valid (OUT and SETUP)
MASK_DATATOGGLE:        EQU 10000000b   ; Data 0/1 bit

COUNT_MASK:             EQU MASK_COUNT
DATAVALID:              EQU MASK_DATAVALID
DataValid:		        EQU	DATAVALID
DATATOGGLE:             EQU MASK_DATATOGGLE

; for REG_x_ADDR (x = A or B)
MASK_ADDRESS:           EQU 01111111b   ; REG_x_ADDR (x = A or B)

; for REG_STAT_CTRL (USB status and control)
MASK_UPSTREAM_CONTROL:      EQU 00000111b ; Upstream control bits 0-3

;(BETA_BUG)*********************************
MASK_BETA_BUG:              EQU 11000000b   ; mask ENPsize and 5 endpoints
;*******************************************

MASK_UPSTREAM_BUS_ACTIVITY: EQU 00001000b ; Bus Activity "sticky" bit

MASK_FORCE_UPSTREAM_K:      EQU 00000010b ; UD+ low, UD- high


; for REG_HUB_PORT_CTRL Local control bits for downstream port state forcing
MASK_NOT_FORCING:       EQU 00000000b   ;
MASK_FORCE_DIFF_1:      EQU 00000001b   ; force differential 1 downstream port(s)
MASK_FORCE_DIFF_0:      EQU 00000010b   ; force differential 0 downstream port(s)
MASK_FORCE_SE0:         EQU 00000011b   ; force SE0 state on downstream port(s)

MASK_FORCE_FS_J:        EQU MASK_FORCE_DIFF_1 ; Full-speed J
MASK_FORCE_FS_K:        EQU MASK_FORCE_DIFF_0 ; Full-speed K
MASK_FORCE_LS_J:        EQU MASK_FORCE_DIFF_0 ; Low-speed J
MASK_FORCE_LS_K:        EQU MASK_FORCE_DIFF_1 ; Low-speed K


; for REG_PROC_STAT processor status register
MASK_RUN:               EQU 01h         ; bit 0
MASK_SINGLE_STEP:       EQU 02h         ; bit 1
MASK_IES:               EQU 04h         ; bit 2
MASK_SUSPEND:           EQU 08h         ; bit 3
MASK_POWER_ON_RESET:    EQU 10h         ; bit 4            
MASK_BUS_RESET_INT:     EQU 20h         ; bit 5
MASK_WDT:               EQU 40h         ; bit 6
MASK_IRQ_PENDING:       EQU 80h         ; bit 7

; wHubStatus bit masks
MASK_LOCAL_POWER_STATUS:EQU 01h
MASK_OVER_CURRENT:      EQU 02h

; wPortStatus and wPortChange bit masks (r.e. [2] Tables 11-15 and 11-16)
; HUB_PortStatusx_LSB and HUB_PortChangex_LSB........ (x = 0-3)
MASK_PORT_CONNECTION:   EQU 01h
MASK_PORT_ENABLE:       EQU 02h
MASK_PORT_SUSPEND:      EQU 04h
MASK_PORT_OVER_CURRENT: EQU 08h
MASK_PORT_RESET:        EQU 10h
; HUB_PortStatusx_MSB........
MASK_PORT_POWER:        EQU 01h
MASK_PORT_LOW_SPEED:    EQU 02h
; Change
MASK_C_PORT_CONNECTION:      EQU 01h
MASK_C_PORT_ENABLE:          EQU 02h
MASK_C_PORT_SUSPEND:         EQU 04h
MASK_C_PORT_OVER_CURRENT:    EQU 08h
MASK_C_PORT_RESET:           EQU 10h

; BITMAP_HUB_EP1 masks
MASK_BITMAP_PORTS:      EQU 00011110b
MASK_BITMAP_HUB:        EQU 00000001b
MASK_HUB_CHANGE:        EQU 00000001b
MASK_PORT1_CHANGE:      EQU 00000010b
MASK_PORT2_CHANGE:      EQU 00000100b
MASK_PORT3_CHANGE:      EQU 00001000b
MASK_PORT4_CHANGE:      EQU 00010000b
MASK_PORT5_CHANGE:      EQU 00100000b
MASK_PORT6_CHANGE:      EQU 01000000b
MASK_PORT7_CHANGE:      EQU 10000000b

PORT1_BIT:              EQU 00000010b
PORT2_BIT:              EQU 00000100b
PORT3_BIT:              EQU 00001000b
PORT4_BIT:              EQU 00010000b
PORT5_BIT:              EQU 00100000b
PORT6_BIT:              EQU 01000000b
PORT7_BIT:              EQU 10000000b

; GPIO bit masks
MASK_BIT_0:             EQU 00000001b
MASK_BIT_1:             EQU 00000010b
MASK_BIT_2:             EQU 00000100b
MASK_BIT_3:             EQU 00001000b
MASK_BIT_4:             EQU 00010000b
MASK_BIT_5:             EQU 00100000b
MASK_BIT_6:             EQU 01000000b
MASK_BIT_7:             EQU 10000000b

;SYSTEM STATES ----------------------------------------------------------
DEFAULT_STATE:      EQU 01h     ; default = 1, a state should NEVER = 0
;------------------------------------------------------------------------
; Valid device (hub) states (STATE_HUB) (0 states are invalid)
; r.e. [1] Table 9-1 "Visable Device States", page 167
; Note: USB does not assign specific values to the states. Assignment values are
;       user dependent but must be unique.
;------------------------------------------------------------------------
HUB_DEFAULT:        EQU 01h     ; root port reset detected, default state
                                ; address not assigned and pending req. for device descriptor
HUB_ADDRESS:        EQU 02h     ; host assigned an address
HUB_CONFIGURED:     EQU 03h     ; config's rEQUested and sent, configuration value
                                ; assigned by host
                                ; !!!enumeration complete!!!
MASK_HUB_SUSPEND:   EQU 80h     ; continuous idle for >3.0ms
                                ; MUST OR MASK with curent state >= DEFAULT
                                ; Useful for INT's that must know if INT takes place
                                ; while hub is suspended.
HUB_AWAKE:          EQU 03h     ; same as configured
                                ; MUST AND ~MASK with current state if configured
;------------------------------------------------------------------------
; Configuration settings used by SET_CONFIGURATION rEQUest
;------------------------------------------------------------------------
UNCONFIGURED:	    EQU	0	; Unconfigured value sent by host to device
CONFIGURED:	    EQU	1	; Configured value sent by host to device

;------------------------------------------------------------------------
; Downstream Port States (STATE_HUB_PORTx, see MALLOC.INC)
; 0 is an invalid state!
;------------------------------------------------------------------------
;PORT_IDLE:         EQU 1       ; Connection has not been detected by hub repeater
PORT_POWERED_OFF:   EQU 1       ; ClearPortFeature(PORT_POWER) or root port reset detect
PORT_DISCONNECTED:  EQU 2       ; SetPortFeature(PORT_POWER) or disconnect event
PORT_DISABLED:      EQU 3       ; detection of connect event
                                ; or ClearPortFeature(PORT_ENABLE) or frame error (fr_error)
PORT_ENABLED:       EQU 4       ; SetPortFeature(PORT_ENABLE) or SetPortFeature(PORT_RESET)
PORT_SUSPENDED:     EQU 5       ; SetPortFeature(PORT_SUSPEND)
;------------------------------------------------------------------------

;------------------------------------------------------------------------
; States of STATE_RESUME_PENDING
;------------------------------------------------------------------------
RESUME_COMPLETE:    EQU 1       ; default resume state
RESUME_START:       EQU 2       ; port initiated start of resume
RESUME_OVERRIDE:    EQU 3       ; firmware override of hub HW forcing control

                                        ; ready for enumeration
CONFIG_STAT_CTRL:       EQU 0
CONFIG_GLOBAL_INT:      EQU 9   ; enable Hub interrupt and the USB Bus Reset Intr
CONFIG_EP_INT:          EQU ( MASK_EPB0 )


;========================================================================
; USB packet constants (debug purposes)
;------------------------------------------------------------------------

BOOT_PROTOCOL:          equ     0         ; protocol status values
REPORT_PROTOCOL:        equ     1

DISABLE_REMOTE_WAKEUP:  equ     0         ; bit[1] = 0
ENABLE_REMOTE_WAKEUP:   equ     2         ; bit[1] = 1

MOUSE_REPORT_ID:        equ     1
MOUSE_REPORT_LEN:       equ     4
POWER_REPORT_ID:        equ     2
POWER_REPORT_LEN:       equ     2
LAST_REPORT_ID:         EQU     POWER_REPORT_ID

;========================================================================
; from HID Class v1.1
;------------------------------------------------------------------------
; class specific descriptor types from section 7.1 Standard Requests
HID:                    equ     21h
REPORT:                 equ     22h
PHYSICAL:               equ     23h
  
;-------------------------------------------------------------------------
; Endpoint structure [bmRequestType][bRequest][wValue][wIndex][wLength]   
; Index definition for Endpoint
;-------------------------------------------------------------------------
    bmRequestType:      EQU 00h     
    bRequest:           EQU 01h     
    wValue_bLow:        EQU 02h     
    wValue_bHigh:       EQU 03h     
    wIndex_bLow:        EQU 04h     
    wIndex_bHigh:       EQU 05h     
    wLength_bLow:       EQU 06h     
    wLength_bHigh:      EQU 07h     

    bData0:             EQU 00h
    bData1:             EQU 01h
    bData2:             EQU 02h
    bData3:             EQU 03h
    bData4:             EQU 04h
    bData5:             EQU 05h
    bData6:             EQU 06h
    bData7:             EQU 07h
    
;-------------------------------------------------------------------------
; ControlStateJumpTable Index
;-------------------------------------------------------------------------
CS_ErrorStallAll:		    EQU 00h
CS_ControlReadContinue:	    EQU 01h
CS_ControlReadEnd:		    EQU 02h
CS_SetAddress2:		        EQU 03h
CS_ControlWriteEnd:		    EQU 04h
CS_SetReport2:		        EQU 05h
;
CS_TableEnd:                EQU 06h

    

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