sdram_test.c

基于visual dsp++开发环境

/*****************************************************************************
**																			**
**	 Name: 	SDRAM_test.c															**
**																			**
******************************************************************************

(C) Copyright 2006 - Analog Devices, Inc.  All rights reserved.

Project Name:	BF538F POST ATE

Date Modified:	01 Sept 2006

Software:		VisualDSP++ 4.5

Hardware:		ADSP-BF538F EZ-KIT Lite


Purpose:		Perform memory test on SDRAM

*****************************************************************************/

#include <cdefBF538.h>
#include <ccblkfn.h>



//////////////////////////////////////////////////////////////////////////////
//
// COMMON DEFINES
//
//////////////////////////////////////////////////////////////////////////////
#define SDRAM_START  0x00000000	// start address of SDRAM
#define SDRAM_SIZE	 0x01000000	// size of SDRAM in 32-bit words.  MT48LC32M8A2 32M x 16 bits (64 MB)





//////////////////////////////////////////////////////////////////////////////
//
// function prototypes
//
//////////////////////////////////////////////////////////////////////////////
void Init_SDRAM(void);
int TEST_SDRAM(void);



//////////////////////////////////////////////////////////////////////////////
//
// stand alone test jig
//
//////////////////////////////////////////////////////////////////////////////
#ifdef _STANDALONE_ // use this to run standalone tests
int main(void)
{
	int bPassed = 0;

	InitPLL();

	bPassed = TEST_SDRAM();



	return 0;
}
#endif //#ifdef _STANDALONE_

//--------------------------------------------------------------------------//
// Function:	Init_SDRAM													//
//																			//
// Parameters:	None														//
//																			//
// Return:		None														//
//																			//
// Description:	This function configures the SDRAM controller
//--------------------------------------------------------------------------//
void Init_SDRAM(void)
{
	// Initalize EBIU control registers to enable all banks
	*pEBIU_AMBCTL1 = 0xFFFFFF02;
	ssync();

	*pEBIU_AMGCTL = 0x00FF;
	ssync();


	// Check if already enabled
	if( SDRS != ((*pEBIU_SDSTAT) & SDRS) )
	{
		return;
	}


	//SDRAM Refresh Rate Control Register
	*pEBIU_SDRRC = 0x03A0; //0x03A3;

	//SDRAM Memory Bank Control Register
	*pEBIU_SDBCTL = 0x0025;

	//SDRAM Memory Global Control Register
	*pEBIU_SDGCTL = 0x0091998d;//0x998D0491;
	ssync();
}

//////////////////////////////////////////////////////////////////////////////
// int TEST_SDRAM(void)
//
// PURPOSE:		Test the SDRAM
//////////////////////////////////////////////////////////////////////////////
int TEST_SDRAM(void)
{

	volatile unsigned int *pDst;
	int nIndex = 0;
	int bError = 1; 	// returning 1 indicates a pass, anything else is a fail
	int n;

	Init_SDRAM();

	// write incrementing values to each SRAM location
	for(nIndex = 0, pDst = (unsigned int *)SDRAM_START; pDst < (unsigned int *)(SDRAM_START + SDRAM_SIZE); pDst++, nIndex++ )
	{
		*pDst = nIndex;
		ssync();
	}

	// verify incrementing values
	for(nIndex = 0, pDst = (unsigned int *)SDRAM_START; pDst < (unsigned int *)(SDRAM_START + SDRAM_SIZE); pDst++, nIndex++ )
	{
		if( nIndex != *pDst )
		{
			bError = 0;
			break;
		}
	}

	// write all FFFF's
	for(nIndex = 0xFFFFFFFF, pDst = (unsigned int *)SDRAM_START; pDst < (unsigned int *)(SDRAM_START + SDRAM_SIZE); pDst++ )
	{
		*pDst = nIndex;
	}

	// verify all FFFF's
	for(nIndex = 0xFFFFFFFF, pDst = (unsigned int *)SDRAM_START; pDst < (unsigned int *)(SDRAM_START + SDRAM_SIZE); pDst++ )
	{
		if( nIndex != *pDst )
		{
			bError = 0;
			break;
		}
	}

	// write all AAAAAA's
	for(nIndex = 0xAAAAAAAA, pDst = (unsigned int *)SDRAM_START; pDst < (unsigned int *)(SDRAM_START + SDRAM_SIZE); pDst++ )
	{
		*pDst = nIndex;
	}

	// verify all AAAAA's
	for(nIndex = 0xAAAAAAAA, pDst = (unsigned int *)SDRAM_START; pDst < (unsigned int *)(SDRAM_START + SDRAM_SIZE); pDst++ )
	{
		if( nIndex != *pDst )
		{
			bError = 0;
			break;
		}
	}

	// write all 555555's
	for(nIndex = 0x55555555, pDst = (unsigned int *)SDRAM_START; pDst < (unsigned int *)(SDRAM_START + SDRAM_SIZE); pDst++ )
	{
		*pDst = nIndex;
	}

	// verify all 55555's
	for(nIndex = 0x55555555, pDst = (unsigned int *)SDRAM_START; pDst < (unsigned int *)(SDRAM_START + SDRAM_SIZE); pDst++ )
	{
		if( nIndex != *pDst )
		{
			bError = 0;
			break;
		}
	}


	return bError;
}