blkfin16.sum

基于visual dsp++开发环境

***********************************************************************
                         PSDsoft Express Version 7.90
                         Summary of Design Assistant
***********************************************************************
PROJECT    : blkfin16                      DATE : 09/15/2003
DEVICE     : DSM2150F5V                    TIME : 11:32:39
MCU/DSP    : ADSP-21535P 
***********************************************************************

Pin Definitions:
================

Pin          Signal                    Pin
Name         Name                      Type
------------ ------------------------- ------------
adio0        a0                        Address line
adio1        a1                        Address line
adio2        a2                        Address line
adio3        a3                        Address line
adio4        a4                        Address line
adio5        a5                        Address line
adio6        a6                        Address line
adio7        a7                        Address line
adio8        a8                        Address line
adio9        a9                        Address line
adio10       a10                       Address line
adio11       a11                       Address line
adio12       a12                       Address line
adio13       a13                       Address line
adio14       a14                       Address line
adio15       a15                       Address line
cntl0        _awe                      MCU bus control signal
cntl2        _abe1                     MCU bus control signal
cntl1        _aoe                      MCU bus control signal
_reset       _reset                    RESET input 
pa0          pa0                       MCU I/O mode
pa1          pa1                       MCU I/O mode
pa2          pa2                       MCU I/O mode
pa3          pa3                       MCU I/O mode
pa4          pa4                       MCU I/O mode
pa5          pa5                       MCU I/O mode
pa6          pa6                       MCU I/O mode
pa7          pa7                       MCU I/O mode
pb0          pb0                       MCU I/O mode
pb1          pb1                       MCU I/O mode
pb2          pb2                       MCU I/O mode
pb3          pb3                       MCU I/O mode
pb4          pb4                       MCU I/O mode
pb5          pb5                       MCU I/O mode
pb6          pb6                       MCU I/O mode
pb7          pb7                       MCU I/O mode
pc0          a16                       Logic or address
pc1          a17                       Logic or address
pc2          a18                       Logic or address
pc3          a19                       Logic or address
pc4          a20                       Logic or address
pc5          a21                       Logic or address
pc6          _ams0                     Logic or address
pc7          pc7                       MCU I/O mode
pd0          pd0                       MCU I/O mode
pd1          pd1                       MCU I/O mode
pd2          sleep                     PSD chip select input, /CSI
pd3          pd3                       MCU I/O mode
pe0          tms                       Dedicated JTAG - TMS
pe1          tck                       Dedicated JTAG - TCK
pe2          tdi                       Dedicated JTAG - TDI
pe3          tdo                       Dedicated JTAG - TDO
pe4          tstat                     Dedicated JTAG - TSTAT
pe5          _terr                     Dedicated JTAG - /TERR
pe6          pe6                       MCU I/O mode
pe7          pe7                       MCU I/O mode
pf0          d0                        Data line   
pf1          d1                        Data line   
pf2          d2                        Data line   
pf3          d3                        Data line   
pf4          d4                        Data line   
pf5          d5                        Data line   
pf6          d6                        Data line   
pf7          d7                        Data line   
pg0          d8                        Data line   
pg1          d9                        Data line   
pg2          d10                       Data line   
pg3          d11                       Data line   
pg4          d12                       Data line   
pg5          d13                       Data line   
pg6          d14                       Data line   
pg7          d15                       Data line   

User defined nodes:
===================

None defined

Page Register settings:
=======================

pgr0 is not used
pgr1 is not used
pgr2 is not used
pgr3 is not used
pgr4 is not used
pgr5 is not used
pgr6 is not used
pgr7 is not used

Equations:
==========

csiop = ((address >= ^h10000) & (address <= ^h100FF) & (!_ams0));
fs0 = ((address >= ^h20000) & (address <= ^h2FFFF) & (!_ams0));
fs1 = ((address >= ^h30000) & (address <= ^h3FFFF) & (!_ams0));
fs2 = ((address >= ^h40000) & (address <= ^h4FFFF) & (!_ams0));
fs3 = ((address >= ^h50000) & (address <= ^h5FFFF) & (!_ams0));
fs4 = ((address >= ^h60000) & (address <= ^h6FFFF) & (!_ams0));
fs5 = ((address >= ^h70000) & (address <= ^h7FFFF) & (!_ams0));
fs6 = ((address >= ^h80000) & (address <= ^h8FFFF) & (!_ams0));
fs7 = ((address >= ^h90000) & (address <= ^h9FFFF) & (!_ams0));
csboot0 = ((address >= ^h0000) & (address <= ^h1FFF) & (!_ams0));
csboot1 = ((address >= ^h2000) & (address <= ^h3FFF) & (!_ams0));
csboot2 = ((address >= ^h4000) & (address <= ^h5FFF) & (!_ams0));
csboot3 = ((address >= ^h6000) & (address <= ^h7FFF) & (!_ams0));