fw.lst

Falsh 读写的demo

C51 COMPILER V7.50   FW                                                                    04/17/2007 10:39:19 PAGE 1   


C51 COMPILER V7.50, COMPILATION OF MODULE FW
OBJECT MODULE PLACED IN .\Output\Fw.obj
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE Fw.c LARGE OPTIMIZE(SIZE) BROWSE INCDIR(.\Include) DEBUG OBJECTEXTEND PRINT
                    -(.\Output\Fw.lst) OBJECT(.\Output\Fw.obj)

line level    source

   1          /*
   2          *********************************************************************************************************
   3          * File     : Fw.C
   4          * Contents :
   5          *
   6          * $Date    : 09/18/06    Kimi    v0.1
   7          * $Date    : 10/18/06    Kimi    v0.2
   8          * $Date    : 11/02/06    Kimi    v1.0
   9          *
  10          * Copyright (c) 2006 Fameg, Inc. All rights reserved
  11          *********************************************************************************************************
  12          */
  13          
  14          #include "fw.h"
  15          
  16          //----------------------------------------------------------------------------
  17          // Description:
  18          //
  19          //----------------------------------------------------------------------------
  20          void  SpiInit (void)
  21          {
  22   1          SW_RST          = 0x08;                            // SPI SW Reset
  23   1      
  24   1          BPPUCTL         = 0x08;                            // SPI Disable pull-up
  25   1      // LSBF = 0, MSB first
  26   1      // CPHA = 0,
  27   1      // CPOL = 0,
  28   1      // MSTR = 0, Slave mode
  29   1      // SSOE = 0,
  30   1      // BRS = 100b, SCLK divided by 64
  31   1          SPI_CTL         = 0x80;
  32   1      
  33   1      // IO Configuration
  34   1          SYSIO_CFG       = SYSIO_CFG | bmSPI_EN;            // Enable SPI IO
  35   1      
  36   1      // Interrupt Configuration
  37   1          IE4             = 1;                               // Enable SPI,SDMI,I2C,DMA,TDES,WDT Interrupt
  38   1          SPI_ST          = SPI_ST | bmSPIIE;                // SPI Empty/Full Interrupt Enable
  39   1          CHIPINTE        = CHIPINTE | bmSPIIE;             // SPI Interrupt Event Enable
  40   1      }
  41          
  42          //----------------------------------------------------------------------------
  43          // Description:
  44          //
  45          //----------------------------------------------------------------------------
  46          void  McuInit (void)
  47          {
  48   1          CKCON       = 0x01;
  49   1      /*
  50   1          CKCON       = 0x01;
  51   1      */
  52   1          SYS_CFG     = 0x4B;                                // 60MHz, Output XFIFO_CLK, PM_AVBLE
  53   1          WDTRST      = 0x2D;                                // Stop WDT
  54   1          MEMCON      = 0x04;                                // 4K xdata
C51 COMPILER V7.50   FW                                                                    04/17/2007 10:39:19 PAGE 2   

  55   1      }
  56          
  57          //----------------------------------------------------------------------------
  58          // Description:
  59          //
  60          //----------------------------------------------------------------------------
  61          void  Timer0Init (void)
  62          {
  63   1      /*
  64   1          TH0         = 0x9E;                                // 0x9E58, CPU 30MHz, 10ms
  65   1          TL0         = 0x58;
  66   1      */
  67   1          TH0         = 0x3C;                                // 0x3CB0, CPU 60MHz, 10ms
  68   1          TL0         = 0xB0;
  69   1          TMOD        = 0x21;
  70   1          TCON        = 0x50;
  71   1          IP          = 0x02;
  72   1          IE          = 0x82;                                // EA = 1
  73   1      }
  74          
  75          //----------------------------------------------------------------------------
  76          // Description:
  77          //   Task Dispatcher hooks function
  78          //----------------------------------------------------------------------------
  79          void  TdInit (void)
  80          {
  81   1          McuInit();
  82   1      
  83   1          Timer0Init();
  84   1      
  85   1          UsbInit();
  86   1      
  87   1          SmInit();
  88   1      }
  89          
  90          //----------------------------------------------------------------------------
  91          // Description:
  92          //   USB Initialization
  93          //----------------------------------------------------------------------------
  94          void  UsbInit (void)
  95          {
  96   1          SW_RST          = 0x07;                            // USB, SFI, APLIF SW Reset
  97   1      // initialize endpoint
  98   1          EPFIFOCFG       = 0x00;                            // 0x00: 512 Single; 0x55: 512 Ping-Pong
  99   1      
 100   1          EPACTRL         = 0x1A;                            // EPA OUT
 101   1          EPBCTRL         = 0x2E;                            // EPB IN
 102   1          EPACS           = 0x01;                            // Enable EPA RX
 103   1          EPBCS           = 0x00;                            // Disable EPB TX
 104   1      
 105   1          EPCFIFOCS       = 0xF0;
 106   1      // End initialize endpoint
 107   1      
 108   1      // initialize sfi register
 109   1          SYSIO_CFG       = 0x02;                            // pins for PLIF mode
 110   1      
 111   1          SFI_EPCFG       = 0x00;                            // Manual, 8-bit, Parallel mode, not swap
 112   1      // End initialize sfi register
 113   1      
 114   1      // initialize plif register
 115   1          APLIFDM_CTL     = 0x08;                            // Half-Duplex mode, State Output
 116   1      /*
C51 COMPILER V7.50   FW                                                                    04/17/2007 10:39:19 PAGE 3   

 117   1          APLIFREADYCFG   = 0x80;                            // INTRDY = 1
 118   1      */
 119   1          APLIFIOCFG      = 0x00;                            // TRICTL = 0, CTL[5:0] is CMOS, Tri-state Data Bus
             - when IDLE
 120   1          APLIFIDLECTL    = 0xf1;                            // APLIF_CTL Output State in the Idle State
 121   1      
 122   1          P3CFG           = 0xFE;                            // Enable APLIFADR[7:0]/[15:8]
 123   1                                                             // P3_0 low because of FS7805 bug
 124   1      
 125   1          memcpy(WAVEDATA0, WaveData, 128);                  // Copy wave data
 126   1      // End initialize plif register
 127   1      
 128   1          SpiInit();
 129   1      }


MODULE INFORMATION:   STATIC OVERLAYABLE
   CODE SIZE        =    189    ----
   CONSTANT SIZE    =   ----    ----
   XDATA SIZE       =    128    ----
   PDATA SIZE       =   ----    ----
   DATA SIZE        =   ----    ----
   IDATA SIZE       =   ----    ----
   BIT SIZE         =   ----    ----
END OF MODULE INFORMATION.


C51 COMPILATION COMPLETE.  0 WARNING(S),  0 ERROR(S)