csl_mcaspaux.h

基于ti tms320c672x下音频开发例子程式

 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  XINTCTL register will be loaded with the specified value
 *
 *   @b  Modifies
 *   @n  XINTCTL register
 *
 *   @b Example
 *   @verbatim
        Uint32  xmtInt;
        
        xmtInt = 0x00001234;
        CSL_mcaspConfigXmtInt (hMcasp, xmtInt);
        
     @endverbatim
 * ============================================================================
 */
static inline
void CSL_mcaspConfigXmtInt (
    CSL_McaspHandle     hMcasp,
    Uint32                          xmtInt             
)
{
    /* configure the XINTCTL register */
    hMcasp->regs->XINTCTL = (Uint32) xmtInt;
}

/** ===========================================================================
 *   @n@b CSL_mcaspResetRcvClk
 *
 *   @b Description
 *   @n This function resets the receive clock circuitry
 *
 *   @b Arguments
 *   @verbatim
            hMcasp          Handle to the McASP instance
     @endverbatim
 *
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  RHCLKRST and RCLKRST bits will be reset in GBLCTL.
 *
 *   @b  Modifies
 *   @n  GBLCTL register.
 *
 *   @b Example
 *   @verbatim
                
        CSL_mcaspResetRcvClk (hMcasp);
        
     @endverbatim
 * ============================================================================
 */
static inline
void CSL_mcaspResetRcvClk (
    CSL_McaspHandle hMcasp
)
{
    /* Reset AHCLKRCTL */
    CSL_FINST (hMcasp->regs->AHCLKRCTL, MCASP_GBLCTL_RHCLKRST, RESET);
    /* Reset ACLKRCTL */
    CSL_FINST (hMcasp->regs->ACLKRCTL, MCASP_GBLCTL_RCLKRST, RESET);
}

/** ===========================================================================
 *   @n@b CSL_mcaspResetXmtClk
 *
 *   @b Description
 *   @n This function resets the transmit clock circuitry
 *
 *   @b Arguments
 *   @verbatim
            hMcasp          Handle to the McASP instance
     @endverbatim
 *
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  XHCLKRST and XCLKRST bits in GBLCTL will be reset.
 *
 *   @b  Modifies
 *   @n  GBLCTL register.
 *
 *   @b Example
 *   @verbatim
                
        CSL_mcaspResetXmtClk (hMcasp);
        
     @endverbatim
 * ============================================================================
 */
static inline
void CSL_mcaspResetXmtClk (
    CSL_McaspHandle         hMcasp
)
{
    /* Reset AHCLKXCTL */
    CSL_FINST (hMcasp->regs->AHCLKXCTL, MCASP_GBLCTL_XHCLKRST, RESET);
    /* Reset ACLKXCTL */
    CSL_FINST (hMcasp->regs->ACLKXCTL, MCASP_GBLCTL_XCLKRST, RESET);
}

/** ===========================================================================
 *   @n@b CSL_mcaspSetRcvClk
 *
 *   @b Description
 *   @n This function configures the receive clock circuitry with specified
 *      values
 *
 *   @b Arguments
 *   @verbatim
            hMcasp          Handle to the McASP instance
            
            rcvClkSet       value to be loaded into receive clock circuitry
     @endverbatim
 *
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  ACLKRCTL, AHCLKRCTL, RCLKCHK register will be loaded with the
 *       specified values.
 *
 *   @b  Modifies
 *   @n  GBLCTL, ACLKRCTL, AHCLKRCTL, RCLKCHK registers
 *
 *   @b Example
 *   @verbatim
        CSL_McaspHwSetupDataClk *rcvClkSet;
        
        rcvClkSet->clkSetupClk = 0x00001234;
        rcvClkSet->clkSetupHiClk = 0x004321;
        rcvClkSet->clkChk = 0x0000abcd;
        
        CSL_mcaspSetRcvClk (hMcasp, rcvClkSet);
        
     @endverbatim
 * ============================================================================
 */
static inline
void CSL_mcaspSetRcvClk (
    CSL_McaspHandle             hMcasp,
    CSL_McaspHwSetupDataClk     *rcvClkSet             
)
{
    Uint32 bitValue = 0;

    /* Reset the bits in GBLCTL */
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RHCLKRST, RESET);
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RCLKRST, RESET);
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RSRCLR, CLEAR);
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RSMRST, RESET);
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RFRST, RESET);

    /* Set the High frequency serial clock */
    hMcasp->regs->AHCLKRCTL = (Uint16) rcvClkSet->clkSetupHiClk;

    if ((CSL_FEXT (hMcasp->regs->AHCLKRCTL, MCASP_AHCLKRCTL_HCLKRM) == TRUE))
    {
        CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_AHCLKR, OUTPUT);
    }

    /* Set the serial clock */
    hMcasp->regs->ACLKRCTL = (Uint32) rcvClkSet->clkSetupClk;

    if ((CSL_FEXT (hMcasp->regs->ACLKRCTL, MCASP_ACLKRCTL_CLKRM) == TRUE))
    {
        CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_ACLKR, OUTPUT);
    }

    /* Start the serial clock */
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RCLKRST, ACTIVE);
    {
        while (bitValue != CSL_MCASP_GBLCTL_RCLKRST_ACTIVE) {
            bitValue = CSL_FEXT (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RCLKRST);
        }
    }

    /* Start the high frequency clock */
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RHCLKRST, ACTIVE);
    {   
        bitValue = 0;
        while (bitValue != CSL_MCASP_GBLCTL_RHCLKRST_ACTIVE) {
            bitValue = CSL_FEXT (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RHCLKRST);
        }
    }

    

    /* Set up the receive clock check control register */
    hMcasp->regs->RCLKCHK   = (Uint32) rcvClkSet->clkChk;
}

/** ===========================================================================
 *   @n@b CSL_mcaspSetXmtClk
 *
 *   @b Description
 *   @n This function configures the transmit clock circuitry with specified
 *      values
 *
 *   @b Arguments
 *   @verbatim
            hMcasp          Handle to the McASP instance
            
            xmtClkSet       value to be loaded into transmit clock circuitry
     @endverbatim
 *
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  ACLKXCTL, AHCLKXCTL, XCLKCHK register will be loaded with the
 *       specified values
 *
 *   @b  Modifies
 *   @n  GBLCTL, ACLKXCTL, AHCLKXCTL, XCLKCHK registers
 *
 *   @b Example
 *   @verbatim
        CSL_McaspHwSetupDataClk *xmtClkSet;
        
        xmtClkSet->clkSetupClk = 0x00001234;
        xmtClkSet->clkSetupHiClk = 0x004321;
        xmtClkSet->clkChk = 0x0000abcd;
        
        CSL_mcaspSetXmtClk (hMcasp, xmtClkSet);
        
     @endverbatim
 * ============================================================================
 */
static inline
void CSL_mcaspSetXmtClk (
    CSL_McaspHandle             hMcasp,
    CSL_McaspHwSetupDataClk     *xmtClkSet             
)
{
    Uint32 bitValue = 0;

    /* Reset the bits in GBLCTL */
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XHCLKRST, RESET);
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XCLKRST, RESET);
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XSRCLR, CLEAR);
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XSMRST, RESET);
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XFRST, RESET);

    /* Set the High frequency serial clock */
    hMcasp->regs->AHCLKXCTL = (Uint16) xmtClkSet->clkSetupHiClk;

    if ((CSL_FEXT (hMcasp->regs->AHCLKXCTL, MCASP_AHCLKXCTL_HCLKXM) == TRUE))
    {
        CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_AHCLKX, OUTPUT);
    }

    /* Set the serial clock */
    hMcasp->regs->ACLKXCTL = (Uint16) xmtClkSet->clkSetupClk;

    if ((CSL_FEXT (hMcasp->regs->ACLKXCTL, MCASP_ACLKXCTL_CLKXM) == TRUE))
    {
        CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_ACLKX, OUTPUT);
    }

    /* Start the serial clock */
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XCLKRST, ACTIVE);

    {
        while (bitValue != CSL_MCASP_GBLCTL_XCLKRST_ACTIVE) {
            bitValue = CSL_FEXT (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XCLKRST);
        }
    }
    
    /* Start the high frequency clock */
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XHCLKRST, ACTIVE);

    {
        bitValue = 0;
        while (bitValue != CSL_MCASP_GBLCTL_XHCLKRST_ACTIVE) {
            bitValue = CSL_FEXT (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XHCLKRST);
        }
    }
    
    /* Set up the transmit clock check control register */
    hMcasp->regs->XCLKCHK   = (Uint32) xmtClkSet->clkChk;
}

/** ===========================================================================
 *   @n@b CSL_mcaspConfigXmtSection
 *
 *   @b Description
 *   @n This function configures format, frame sync, and other parameters
 *      related to the xmt section. Also configures the xmt clk section.
 *
 *   @b Arguments
 *   @verbatim
            hMcasp          Handle to the McASP instance
            
            xmtData         transmit related parameters
            
            glbData         global hardware setup configuration
     @endverbatim
 *
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  Format, frame sync, and other parameters related to the xmt section
 *       are configured
 *
 *   @b  Modifies
 *   @n  XFMT, AFSXCTL and other transmit related registers
 *
 *   @b Example
 *   @verbatim
        CSL_McaspHandle             hMcasp;
        CSL_McaspHwSetupData        *xmtData;
        CSL_McaspHwSetupDataGbl     *glbData;
        
        xmtData->fmt = 0x0000abcd;
        xmtData->frSyncCtl = 0x00001234;
        
        CSL_mcaspConfigXmtSection (hMcasp, xmtData, glbData);
        
     @endverbatim
 * ============================================================================
 */
static inline
void CSL_mcaspConfigXmtSection (
    CSL_McaspHandle             hMcasp,
    CSL_McaspHwSetupData        *xmtData
)
{
    Uint32 bitValue = 0;

    /* Configure XMASK register */
    hMcasp->regs->XMASK     = xmtData->mask;

    /* Reset the XSMRST bit in GBLCTL register */
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XSMRST, RESET);

    /* Reset the RSMRST bit in GBLCTL register */
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_RSMRST, RESET);

    /* Configure XFMT register */
    hMcasp->regs->XFMT      = (Uint32) xmtData->fmt;

    /*Reset the XFRST register in GBLCTL */
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XFRST, RESET);

    /* Configure AFSXCTL register */
    hMcasp->regs->AFSXCTL = (Uint32) xmtData->frSyncCtl;

    if ((CSL_FEXT (hMcasp->regs->AFSXCTL, MCASP_AFSXCTL_FSXM) == TRUE))
    {
        CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_AFSX, OUTPUT);
    }

    /* Reset XHCLKRST, XCLKRST, XSRCLR  in GBLCTL */
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XHCLKRST, RESET);
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XCLKRST, RESET);
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XSRCLR, CLEAR);

    /* Configure ACLKXCTL register */
    hMcasp->regs->ACLKXCTL  = (Uint32) xmtData->clk.clkSetupClk;

    if ((CSL_FEXT (hMcasp->regs->ACLKXCTL, MCASP_ACLKXCTL_CLKXM) == TRUE))
    {
        CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_ACLKX, OUTPUT);
    }

    /* Configure AHCLKXCTL register */
    hMcasp->regs->AHCLKXCTL = (Uint32) xmtData->clk.clkSetupHiClk;

    if ((CSL_FEXT (hMcasp->regs->AHCLKXCTL, MCASP_AHCLKXCTL_HCLKXM) == TRUE))
    {
        CSL_FINST (hMcasp->regs->PDIR, MCASP_PDIR_AHCLKX, OUTPUT);
    }

    /* start AHCLKX */
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XHCLKRST, ACTIVE);
    {
        bitValue = 0;
        while (bitValue != CSL_MCASP_GBLCTL_XHCLKRST_ACTIVE) {
            bitValue = CSL_FEXT (hMcasp->regs->GBLCTL,
                       MCASP_GBLCTL_XHCLKRST);
        }
    }
    
    /* start ACLKX */
    CSL_FINST (hMcasp->regs->GBLCTL, MCASP_GBLCTL_XCLKRST, ACTIVE);
    {
        bitValue = 0;
        while (bitValue != CSL_MCASP_GBLCTL_XCLKRST_ACTIVE) {
            bitValue = CSL_FEXT (hMcasp->regs->GBLCTL,
                       MCASP_GBLCTL_XCLKRST);
        }
    }
    
    /* Configure XTDM register */
    hMcasp->regs->XTDM = (Uint32) xmtData->tdm;

    /* Configure XINTCTL register */
    hMcasp->regs->XINTCTL = (Uint32) xmtData->intCtl;

    /* Configure XCLKCHK register */
    hMcasp->regs->XCLKCHK   = (Uint32) xmtData->clk.clkChk;

    /* Configure XSTAT register */
    hMcasp->regs->XSTAT = (Uint32) xmtData->stat;

    /* Configure XEVTCTL register */
    hMcasp->regs->XEVTCTL = (Uint32) xmtData->evtCtl;
}

/** ===========================================================================
 *   @n@b CSL_mcaspConfigRcvSection
 *
 *   @