cslr_spi.h

基于ti tms320c672x下音频开发例子程式

#define CSL_SPI_SPIPC4_SCSSET6_HI        (0x00000001u)

#define CSL_SPI_SPIPC4_SCSSET5_MASK      (0x00000020u)
#define CSL_SPI_SPIPC4_SCSSET5_SHIFT     (0x00000005u)
#define CSL_SPI_SPIPC4_SCSSET5_RESETVAL  (0x00000000u)

/*----SCSSET5 Tokens----*/
#define CSL_SPI_SPIPC4_SCSSET5_LO        (0x00000000u)
#define CSL_SPI_SPIPC4_SCSSET5_HI        (0x00000001u)

#define CSL_SPI_SPIPC4_SCSSET4_MASK      (0x00000010u)
#define CSL_SPI_SPIPC4_SCSSET4_SHIFT     (0x00000004u)
#define CSL_SPI_SPIPC4_SCSSET4_RESETVAL  (0x00000000u)

/*----SCSSET4 Tokens----*/
#define CSL_SPI_SPIPC4_SCSSET4_LO        (0x00000000u)
#define CSL_SPI_SPIPC4_SCSSET4_HI        (0x00000001u)

#define CSL_SPI_SPIPC4_SCSSET3_MASK      (0x00000008u)
#define CSL_SPI_SPIPC4_SCSSET3_SHIFT     (0x00000003u)
#define CSL_SPI_SPIPC4_SCSSET3_RESETVAL  (0x00000000u)

/*----SCSSET3 Tokens----*/
#define CSL_SPI_SPIPC4_SCSSET3_LO        (0x00000000u)
#define CSL_SPI_SPIPC4_SCSSET3_HI        (0x00000001u)

#define CSL_SPI_SPIPC4_SCSSET2_MASK      (0x00000004u)
#define CSL_SPI_SPIPC4_SCSSET2_SHIFT     (0x00000002u)
#define CSL_SPI_SPIPC4_SCSSET2_RESETVAL  (0x00000000u)

/*----SCSSET2 Tokens----*/
#define CSL_SPI_SPIPC4_SCSSET2_LO        (0x00000000u)
#define CSL_SPI_SPIPC4_SCSSET2_HI        (0x00000001u)

#define CSL_SPI_SPIPC4_SCSSET1_MASK      (0x00000002u)
#define CSL_SPI_SPIPC4_SCSSET1_SHIFT     (0x00000001u)
#define CSL_SPI_SPIPC4_SCSSET1_RESETVAL  (0x00000000u)

/*----SCSSET1 Tokens----*/
#define CSL_SPI_SPIPC4_SCSSET1_LO        (0x00000000u)
#define CSL_SPI_SPIPC4_SCSSET1_HI        (0x00000001u)

#define CSL_SPI_SPIPC4_SCSSET0_MASK      (0x00000001u)
#define CSL_SPI_SPIPC4_SCSSET0_SHIFT     (0x00000000u)
#define CSL_SPI_SPIPC4_SCSSET0_RESETVAL  (0x00000000u)

/*----SCSSET0 Tokens----*/
#define CSL_SPI_SPIPC4_SCSSET0_LO        (0x00000000u)
#define CSL_SPI_SPIPC4_SCSSET0_HI        (0x00000001u)

#define CSL_SPI_SPIPC4_RESETVAL          (0x00000000u)

/* SPIPC5 */

#define CSL_SPI_SPIPC5_SOMICLR_MASK      (0x00000800u)
#define CSL_SPI_SPIPC5_SOMICLR_SHIFT     (0x0000000Bu)
#define CSL_SPI_SPIPC5_SOMICLR_RESETVAL  (0x00000000u)

/*----SOMICLR Tokens----*/
#define CSL_SPI_SPIPC5_SOMICLR_LO        (0x00000000u)
#define CSL_SPI_SPIPC5_SOMICLR_HI        (0x00000001u)

#define CSL_SPI_SPIPC5_SIMOCLR_MASK      (0x00000400u)
#define CSL_SPI_SPIPC5_SIMOCLR_SHIFT     (0x0000000Au)
#define CSL_SPI_SPIPC5_SIMOCLR_RESETVAL  (0x00000000u)

/*----SIMOCLR Tokens----*/
#define CSL_SPI_SPIPC5_SIMOCLR_LO        (0x00000000u)
#define CSL_SPI_SPIPC5_SIMOCLR_HI        (0x00000001u)

#define CSL_SPI_SPIPC5_CLKCLR_MASK       (0x00000200u)
#define CSL_SPI_SPIPC5_CLKCLR_SHIFT      (0x00000009u)
#define CSL_SPI_SPIPC5_CLKCLR_RESETVAL   (0x00000000u)

/*----CLKCLR Tokens----*/
#define CSL_SPI_SPIPC5_CLKCLR_LO         (0x00000000u)
#define CSL_SPI_SPIPC5_CLKCLR_HI         (0x00000001u)

#define CSL_SPI_SPIPC5_ENABLECLR_MASK    (0x00000100u)
#define CSL_SPI_SPIPC5_ENABLECLR_SHIFT   (0x00000008u)
#define CSL_SPI_SPIPC5_ENABLECLR_RESETVAL (0x00000000u)

/*----ENABLECLR Tokens----*/
#define CSL_SPI_SPIPC5_ENABLECLR_LO      (0x00000000u)
#define CSL_SPI_SPIPC5_ENABLECLR_HI      (0x00000001u)

#define CSL_SPI_SPIPC5_SCSCLR7_MASK      (0x00000080u)
#define CSL_SPI_SPIPC5_SCSCLR7_SHIFT     (0x00000007u)
#define CSL_SPI_SPIPC5_SCSCLR7_RESETVAL  (0x00000000u)

/*----SCSCLR7 Tokens----*/
#define CSL_SPI_SPIPC5_SCSCLR7_LO        (0x00000000u)
#define CSL_SPI_SPIPC5_SCSCLR7_HI        (0x00000001u)

#define CSL_SPI_SPIPC5_SCSCLR6_MASK      (0x00000040u)
#define CSL_SPI_SPIPC5_SCSCLR6_SHIFT     (0x00000006u)
#define CSL_SPI_SPIPC5_SCSCLR6_RESETVAL  (0x00000000u)

/*----SCSCLR6 Tokens----*/
#define CSL_SPI_SPIPC5_SCSCLR6_LO        (0x00000000u)
#define CSL_SPI_SPIPC5_SCSCLR6_HI        (0x00000001u)

#define CSL_SPI_SPIPC5_SCSCLR5_MASK      (0x00000020u)
#define CSL_SPI_SPIPC5_SCSCLR5_SHIFT     (0x00000005u)
#define CSL_SPI_SPIPC5_SCSCLR5_RESETVAL  (0x00000000u)

/*----SCSCLR5 Tokens----*/
#define CSL_SPI_SPIPC5_SCSCLR5_LO        (0x00000000u)
#define CSL_SPI_SPIPC5_SCSCLR5_HI        (0x00000001u)

#define CSL_SPI_SPIPC5_SCSCLR4_MASK      (0x00000010u)
#define CSL_SPI_SPIPC5_SCSCLR4_SHIFT     (0x00000004u)
#define CSL_SPI_SPIPC5_SCSCLR4_RESETVAL  (0x00000000u)

/*----SCSCLR4 Tokens----*/
#define CSL_SPI_SPIPC5_SCSCLR4_LO        (0x00000000u)
#define CSL_SPI_SPIPC5_SCSCLR4_HI        (0x00000001u)

#define CSL_SPI_SPIPC5_SCSCLR3_MASK      (0x00000008u)
#define CSL_SPI_SPIPC5_SCSCLR3_SHIFT     (0x00000003u)
#define CSL_SPI_SPIPC5_SCSCLR3_RESETVAL  (0x00000000u)

/*----SCSCLR3 Tokens----*/
#define CSL_SPI_SPIPC5_SCSCLR3_LO        (0x00000000u)
#define CSL_SPI_SPIPC5_SCSCLR3_HI        (0x00000001u)

#define CSL_SPI_SPIPC5_SCSCLR2_MASK      (0x00000004u)
#define CSL_SPI_SPIPC5_SCSCLR2_SHIFT     (0x00000002u)
#define CSL_SPI_SPIPC5_SCSCLR2_RESETVAL  (0x00000000u)

/*----SCSCLR2 Tokens----*/
#define CSL_SPI_SPIPC5_SCSCLR2_LO        (0x00000000u)
#define CSL_SPI_SPIPC5_SCSCLR2_HI        (0x00000001u)

#define CSL_SPI_SPIPC5_SCSCLR1_MASK      (0x00000002u)
#define CSL_SPI_SPIPC5_SCSCLR1_SHIFT     (0x00000001u)
#define CSL_SPI_SPIPC5_SCSCLR1_RESETVAL  (0x00000000u)

/*----SCSCLR1 Tokens----*/
#define CSL_SPI_SPIPC5_SCSCLR1_LO        (0x00000000u)
#define CSL_SPI_SPIPC5_SCSCLR1_HI        (0x00000001u)

#define CSL_SPI_SPIPC5_SCSCLR0_MASK      (0x00000001u)
#define CSL_SPI_SPIPC5_SCSCLR0_SHIFT     (0x00000000u)
#define CSL_SPI_SPIPC5_SCSCLR0_RESETVAL  (0x00000000u)

/*----SCSCLR0 Tokens----*/
#define CSL_SPI_SPIPC5_SCSCLR0_LO        (0x00000000u)
#define CSL_SPI_SPIPC5_SCSCLR0_HI        (0x00000001u)

#define CSL_SPI_SPIPC5_RESETVAL          (0x00000000u)

/* SPIPC6 */

#define CSL_SPI_SPIPC6_SOMIPDR_MASK      (0x00000800u)
#define CSL_SPI_SPIPC6_SOMIPDR_SHIFT     (0x0000000Bu)
#define CSL_SPI_SPIPC6_SOMIPDR_RESETVAL  (0x00000000u)

/*----SOMIPDR Tokens----*/
#define CSL_SPI_SPIPC6_SOMIPDR_LOGIC1    (0x00000000u)
#define CSL_SPI_SPIPC6_SOMIPDR_TRISTATE  (0x00000001u)

#define CSL_SPI_SPIPC6_SIMOPDR_MASK      (0x00000400u)
#define CSL_SPI_SPIPC6_SIMOPDR_SHIFT     (0x0000000Au)
#define CSL_SPI_SPIPC6_SIMOPDR_RESETVAL  (0x00000000u)

/*----SIMOPDR Tokens----*/
#define CSL_SPI_SPIPC6_SIMOPDR_LOGIC1    (0x00000000u)
#define CSL_SPI_SPIPC6_SIMOPDR_TRISTATE  (0x00000001u)

#define CSL_SPI_SPIPC6_CLKPDR_MASK       (0x00000200u)
#define CSL_SPI_SPIPC6_CLKPDR_SHIFT      (0x00000009u)
#define CSL_SPI_SPIPC6_CLKPDR_RESETVAL   (0x00000000u)

/*----CLKPDR Tokens----*/
#define CSL_SPI_SPIPC6_CLKPDR_LOGIC1     (0x00000000u)
#define CSL_SPI_SPIPC6_CLKPDR_TRISTATE   (0x00000001u)

#define CSL_SPI_SPIPC6_ENABLEPDR_MASK    (0x00000100u)
#define CSL_SPI_SPIPC6_ENABLEPDR_SHIFT   (0x00000008u)
#define CSL_SPI_SPIPC6_ENABLEPDR_RESETVAL (0x00000000u)

/*----ENABLEPDR Tokens----*/
#define CSL_SPI_SPIPC6_ENABLEPDR_LOGIC1  (0x00000000u)
#define CSL_SPI_SPIPC6_ENABLEPDR_TRISTATE (0x00000001u)

#define CSL_SPI_SPIPC6_SCSPDR7_MASK      (0x00000080u)
#define CSL_SPI_SPIPC6_SCSPDR7_SHIFT     (0x00000007u)
#define CSL_SPI_SPIPC6_SCSPDR7_RESETVAL  (0x00000000u)

/*----SCSPDR7 Tokens----*/
#define CSL_SPI_SPIPC6_SCSPDR7_LOGIC1    (0x00000000u)
#define CSL_SPI_SPIPC6_SCSPDR7_TRISTATE  (0x00000001u)

#define CSL_SPI_SPIPC6_SCSPDR6_MASK      (0x00000040u)
#define CSL_SPI_SPIPC6_SCSPDR6_SHIFT     (0x00000006u)
#define CSL_SPI_SPIPC6_SCSPDR6_RESETVAL  (0x00000000u)

/*----SCSPDR6 Tokens----*/
#define CSL_SPI_SPIPC6_SCSPDR6_LOGIC1    (0x00000000u)
#define CSL_SPI_SPIPC6_SCSPDR6_TRISTATE  (0x00000001u)

#define CSL_SPI_SPIPC6_SCSPDR5_MASK      (0x00000020u)
#define CSL_SPI_SPIPC6_SCSPDR5_SHIFT     (0x00000005u)
#define CSL_SPI_SPIPC6_SCSPDR5_RESETVAL  (0x00000000u)

/*----SCSPDR5 Tokens----*/
#define CSL_SPI_SPIPC6_SCSPDR5_LOGIC1    (0x00000000u)
#define CSL_SPI_SPIPC6_SCSPDR5_TRISTATE  (0x00000001u)

#define CSL_SPI_SPIPC6_SCSPDR4_MASK      (0x00000010u)
#define CSL_SPI_SPIPC6_SCSPDR4_SHIFT     (0x00000004u)
#define CSL_SPI_SPIPC6_SCSPDR4_RESETVAL  (0x00000000u)

/*----SCSPDR4 Tokens----*/
#define CSL_SPI_SPIPC6_SCSPDR4_LOGIC1    (0x00000000u)
#define CSL_SPI_SPIPC6_SCSPDR4_TRISTATE  (0x00000001u)

#define CSL_SPI_SPIPC6_SCSPDR3_MASK      (0x00000008u)
#define CSL_SPI_SPIPC6_SCSPDR3_SHIFT     (0x00000003u)
#define CSL_SPI_SPIPC6_SCSPDR3_RESETVAL  (0x00000000u)

/*----SCSPDR3 Tokens----*/
#define CSL_SPI_SPIPC6_SCSPDR3_LOGIC1    (0x00000000u)
#define CSL_SPI_SPIPC6_SCSPDR3_TRISTATE  (0x00000001u)

#define CSL_SPI_SPIPC6_SCSPDR2_MASK      (0x00000004u)
#define CSL_SPI_SPIPC6_SCSPDR2_SHIFT     (0x00000002u)
#define CSL_SPI_SPIPC6_SCSPDR2_RESETVAL  (0x00000000u)

/*----SCSPDR2 Tokens----*/
#define CSL_SPI_SPIPC6_SCSPDR2_LOGIC1    (0x00000000u)
#define CSL_SPI_SPIPC6_SCSPDR2_TRISTATE  (0x00000001u)

#define CSL_SPI_SPIPC6_SCSPDR1_MASK      (0x00000002u)
#define CSL_SPI_SPIPC6_SCSPDR1_SHIFT     (0x00000001u)
#define CSL_SPI_SPIPC6_SCSPDR1_RESETVAL  (0x00000000u)

/*----SCSPDR1 Tokens----*/
#define CSL_SPI_SPIPC6_SCSPDR1_LOGIC1    (0x00000000u)
#define CSL_SPI_SPIPC6_SCSPDR1_TRISTATE  (0x00000001u)

#define CSL_SPI_SPIPC6_SCSPDR0_MASK      (0x00000001u)
#define CSL_SPI_SPIPC6_SCSPDR0_SHIFT     (0x00000000u)
#define CSL_SPI_SPIPC6_SCSPDR0_RESETVAL  (0x00000000u)

/*----SCSPDR0 Tokens----*/
#define CSL_SPI_SPIPC6_SCSPDR0_LOGIC1    (0x00000000u)
#define CSL_SPI_SPIPC6_SCSPDR0_TRISTATE  (0x00000001u)

#define CSL_SPI_SPIPC6_RESETVAL          (0x00000000u)

/* SPIPC7 */

#define CSL_SPI_SPIPC7_SOMIPDIS_MASK     (0x00000800u)
#define CSL_SPI_SPIPC7_SOMIPDIS_SHIFT    (0x0000000Bu)
#define CSL_SPI_SPIPC7_SOMIPDIS_RESETVAL (0x00000000u)

/*----SOMIPDIS Tokens----*/
#define CSL_SPI_SPIPC7_SOMIPDIS_ENABLE   (0x00000000u)
#define CSL_SPI_SPIPC7_SOMIPDIS_DISABLE  (0x00000001u)

#define CSL_SPI_SPIPC7_SIMOPDIS_MASK     (0x00000400u)
#define CSL_SPI_SPIPC7_SIMOPDIS_SHIFT    (0x0000000Au)
#define CSL_SPI_SPIPC7_SIMOPDIS_RESETVAL (0x00000000u)

/*----SIMOPDIS Tokens----*/
#define CSL_SPI_SPIPC7_SIMOPDIS_ENABLE   (0x00000000u)
#define CSL_SPI_SPIPC7_SIMOPDIS_DISABLE  (0x00000001u)

#define CSL_SPI_SPIPC7_CLKPDIS_MASK      (0x00000200u)
#define CSL_SPI_SPIPC7_CLKPDIS_SHIFT     (0x00000009u)
#define CSL_SPI_SPIPC7_CLKPDIS_RESETVAL  (0x00000000u)

/*----CLKPDIS Tokens----*/
#define CSL_SPI_SPIPC7_CLKPDIS_ENABLE    (0x00000000u)
#define CSL_SPI_SPIPC7_CLKPDIS_DISABLE   (0x00000001u)

#define CSL_SPI_SPIPC7_ENABLEPDIS_MASK   (0x00000100u)
#define CSL_SPI_SPIPC7_ENABLEPDIS_SHIFT  (0x00000008u)
#define CSL_SPI_SPIPC7_ENABLEPDIS_RESETVAL (0x00000000u)

/*----ENABLEPDIS Tokens----*/
#define CSL_SPI_SPIPC7_ENABLEPDIS_ENABLE (0x00000000u)
#define CSL_SPI_SPIPC7_ENABLEPDIS_DISABLE (0x00000001u)

#define CSL_SPI_SPIPC7_SCSPDIS7_MASK     (0x00000080u)
#define CSL_SPI_SPIPC7_SCSPDIS7_SHIFT    (0x00000007u)
#define CSL_SPI_SPIPC7_SCSPDIS7_RESETVAL (0x00000000u)

/*----SCSPDIS7 Tokens----*/
#define CSL_SPI_SPIPC7_SCSPDIS7_ENABLE   (0x00000000u)
#define CSL_SPI_SPIPC7_SCSPDIS7_DISABLE  (0x00000001u)

#define CSL_SPI_SPIPC7_SCSPDIS6_MASK     (0x00000040u)
#define CSL_SPI_SPIPC7_SCSPDIS6_SHIFT    (0x00000006u)
#define CSL_SPI_SPIPC7_SCSPDIS6_RESETVAL (0x00000000u)

/*----SCSPDIS6 Tokens----*/
#define CSL_SPI_SPIPC7_SCSPDIS6_ENABLE   (0x00000000u)
#define CSL_SPI_SPIPC7_SCSPDIS6_DISABLE  (0x00000001u)

#define CSL_SPI_SPIPC7_SCSPDIS5_MASK     (0x00000020u)
#define CSL_SPI_SPIPC7_SCSPDIS5_SHIFT    (0x00000005u)
#define CSL_SPI_SPIPC7_SCSPDIS5_RESETVAL (0x00000000u)

/*----SCSPDIS5 Tokens----*/
#define CSL_SPI_SPIPC7_SCSPDIS5_ENABLE   (0x00000000u)
#define CSL_SPI_SPIPC7_SCSPDIS5_DISABLE  (0x00000001u)

#define CSL_SPI_SPIPC7_SCSPDIS4_MASK     (0x00000010u)
#define CSL_SPI_SPIPC7_SCSPDIS4_SHIFT    (0x00000004u)
#define CSL_SPI_SPIPC7_SCSPDIS4_RESETVAL (0x00000000u)

/*----SCSPDIS4 Tokens----*/
#define CSL_SPI_SPIPC7_SCSPDIS4_ENABLE   (0x00000000u)
#define CSL_SPI_SPIPC7_SCSPDIS4_DISABLE  (0x00000001u)

#define CSL_SPI_SPIPC7_SCSPDIS3_MASK     (0x00000008u)
#define CSL_SPI_SPIPC7_SCSPDIS3_SHIFT    (0x00000003u)
#define CSL_SPI_SPIPC7_SCSPDIS3_RESETVAL (0x00000000u)

/*----SCSPDIS3 Tokens----*/
#define CSL_SPI_SPIPC7_SCSPDIS3_ENABLE   (0x00000000u)
#define CSL_SPI_SPIPC7_SCSPDIS3_DISABLE  (0x00000001u)

#define CSL_SPI_SPIPC7_SCSPDIS2_MASK     (0x00000004u)
#define CSL_SPI_SPIPC7_SCSPDIS2_SHIFT    (0x00000002u)
#define CSL_SPI_SPIPC7_SCSPDIS2_RESETVAL (0x00000000u)

/*----SCSPDIS2 Tokens----*/
#define CSL_SPI_SPIPC7_SCSPDIS2_ENABLE   (0x00000000u)
#define CSL_SPI_SPIPC7_SCSPDIS2_DISABLE  (0x00000001u)

#define CSL_SPI_SPIPC7_SCSPDIS1_MASK     (0x00000002u)
#define CSL_SPI_SPIPC7_SCSPDIS1_SHIFT    (0x00000001u)
#define CSL_SPI_SPIPC7_SCSPDIS1_RESETVAL (0x00000000u)

/*----SCSPDIS1 Tokens----*/
#define CSL_SPI_SPIPC7_SCSPDIS1_ENABLE   (0x00000000u)
#define CSL_SPI_SPIPC7_SCSPDIS1_DISABLE  (0x00000001u)

#define CSL_SPI_SPIPC7_SCSPDIS0_MASK     (0x00000001u)
#define CSL_SPI_SPIPC7_SCSPDIS0_SHIFT    (0x00000000u)
#define CSL_SPI_SPIPC7_SCSPDIS0_RESETVAL (0x00000000u)

/*----SCSPDIS0 Tokens----*/
#define CSL_SPI_SPIPC7_SCSPDIS0_ENABLE   (0x00000000u)
#define CSL_SPI_SPIPC7_SCSPDIS0_DISABLE  (0x00000001u)

#define CSL_SPI_SPIPC7_RESETVAL          (0x00000000u)

/* SPIPC8 */

#define CSL_SPI_SPIPC8_SOMIPSL_MASK      (0x00000800u)
#define CSL_SPI_SPIPC8_SOMIPSL_SHIFT     (0x0000000Bu)
#define CSL_SPI_SPIPC8_SOMIPSL_RESETVAL  (0x00000000u)

/*----SOMIPSL Tokens----*/
#define CSL_SPI_SPIPC8_SOMIPSL_PULLDOWN  (0x00000000u)
#define CSL_SPI_SPIPC8_SOMIPSL_PULLUP    (0x00000001u)

#define CSL_SPI_SPIPC8_SIMOPSL_MASK      (0x00000400u)