cslr_spi.h

基于ti tms320c672x下音频开发例子程式

#ifndef _CSLR_SPI_1_H_
#define _CSLR_SPI_1_H_
/*********************************************************************
 * Copyright (C) 2003-2004 Texas Instruments Incorporated. 
 * All Rights Reserved 
 *********************************************************************/
 /** \file cslr_spi_1.h
 * 
 * \brief This file contains the Register Desciptions for SPI
 * 
 *********************************************************************/

#include <cslr.h>

#include <tistdtypes.h>

/**************************************************************************\
* Register Overlay Structure
\**************************************************************************/
typedef struct  {
    volatile Uint32 SPIGCR0;
    volatile Uint32 SPIGCR1;
    volatile Uint32 SPIINT0;
    volatile Uint32 SPILVL;
    volatile Uint32 SPIFLG;
    volatile Uint32 SPIPC0;
    volatile Uint32 SPIPC1;
    volatile Uint32 SPIPC2;
    volatile Uint32 SPIPC3;
    volatile Uint32 SPIPC4;
    volatile Uint32 SPIPC5;
    volatile Uint32 SPIPC6;
    volatile Uint32 SPIPC7;
    volatile Uint32 SPIPC8;
    volatile Uint32 SPIDAT0;
    volatile Uint32 SPIDAT1;
    volatile Uint32 SPIBUF;
    volatile Uint32 SPIEMU;
    volatile Uint32 SPIDELAY;
    volatile Uint32 SPIDEF;
    volatile Uint32 SPIFMT[4];
    volatile Uint32 TGINTVECT[2];
    volatile Uint32 RSVD0[2];
    volatile Uint32 MIBSPIE;
} CSL_SpiRegs;

/**************************************************************************\
* Field Definition Macros
\**************************************************************************/

/* SPIGCR0 */

#define CSL_SPI_SPIGCR0_RESET_MASK       (0x00000001u)
#define CSL_SPI_SPIGCR0_RESET_SHIFT      (0x00000000u)
#define CSL_SPI_SPIGCR0_RESET_RESETVAL   (0x00000000u)

/*----RESET Tokens----*/
#define CSL_SPI_SPIGCR0_RESET_YES        (0x00000000u)
#define CSL_SPI_SPIGCR0_RESET_NO         (0x00000001u)

#define CSL_SPI_SPIGCR0_RESETVAL         (0x00000000u)

/* SPIGCR1 */

#define CSL_SPI_SPIGCR1_SPIEN_MASK       (0x01000000u)
#define CSL_SPI_SPIGCR1_SPIEN_SHIFT      (0x00000018u)
#define CSL_SPI_SPIGCR1_SPIEN_RESETVAL   (0x00000000u)

/*----SPIEN Tokens----*/
#define CSL_SPI_SPIGCR1_SPIEN_INRESET    (0x00000000u)
#define CSL_SPI_SPIGCR1_SPIEN_ACTIVE     (0x00000001u)

#define CSL_SPI_SPIGCR1_LOOPBACK_MASK    (0x00010000u)
#define CSL_SPI_SPIGCR1_LOOPBACK_SHIFT   (0x00000010u)
#define CSL_SPI_SPIGCR1_LOOPBACK_RESETVAL (0x00000000u)

/*----LOOPBACK Tokens----*/
#define CSL_SPI_SPIGCR1_LOOPBACK_DISABLE (0x00000000u)
#define CSL_SPI_SPIGCR1_LOOPBACK_ENABLE  (0x00000001u)

#define CSL_SPI_SPIGCR1_POWERDOWN_MASK   (0x00000100u)
#define CSL_SPI_SPIGCR1_POWERDOWN_SHIFT  (0x00000008u)
#define CSL_SPI_SPIGCR1_POWERDOWN_RESETVAL (0x00000000u)

/*----P0WERDOWN Tokens----*/
#define CSL_SPI_SPIGCR1_P0WERDOWN_ACTIVE (0x00000000u)
#define CSL_SPI_SPIGCR1_P0WERDOWN_PWRDN  (0x00000001u)

#define CSL_SPI_SPIGCR1_CLKMOD_MASK      (0x00000002u)
#define CSL_SPI_SPIGCR1_CLKMOD_SHIFT     (0x00000001u)
#define CSL_SPI_SPIGCR1_CLKMOD_RESETVAL  (0x00000000u)

/*----CLKMOD Tokens----*/
#define CSL_SPI_SPIGCR1_CLKMOD_EXTERNAL  (0x00000000u)
#define CSL_SPI_SPIGCR1_CLKMOD_INTERNAL  (0x00000001u)

#define CSL_SPI_SPIGCR1_MASTER_MASK      (0x00000001u)
#define CSL_SPI_SPIGCR1_MASTER_SHIFT     (0x00000000u)
#define CSL_SPI_SPIGCR1_MASTER_RESETVAL  (0x00000000u)

/*----MASTER Tokens----*/
#define CSL_SPI_SPIGCR1_MASTER_NO        (0x00000000u)
#define CSL_SPI_SPIGCR1_MASTER_YES       (0x00000001u)

#define CSL_SPI_SPIGCR1_RESETVAL         (0x00000000u)

/* SPIINT0 */

#define CSL_SPI_SPIINT0_ENABLEHIGHZ_MASK (0x01000000u)
#define CSL_SPI_SPIINT0_ENABLEHIGHZ_SHIFT (0x00000018u)
#define CSL_SPI_SPIINT0_ENABLEHIGHZ_RESETVAL (0x00000000u)

/*----ENABLEHIGHZ Tokens----*/
#define CSL_SPI_SPIINT0_ENABLEHIGHZ_DISABLE (0x00000000u)
#define CSL_SPI_SPIINT0_ENABLEHIGHZ_ENABLE (0x00000001u)

#define CSL_SPI_SPIINT0_DMAREQEN_MASK    (0x00010000u)
#define CSL_SPI_SPIINT0_DMAREQEN_SHIFT   (0x00000010u)
#define CSL_SPI_SPIINT0_DMAREQEN_RESETVAL (0x00000000u)

/*----DMAREQEN Tokens----*/
#define CSL_SPI_SPIINT0_DMAREQEN_DISABLE (0x00000000u)
#define CSL_SPI_SPIINT0_DMAREQEN_ENABLE  (0x00000001u)

#define CSL_SPI_SPIINT0_RXINTEN_MASK     (0x00000100u)
#define CSL_SPI_SPIINT0_RXINTEN_SHIFT    (0x00000008u)
#define CSL_SPI_SPIINT0_RXINTEN_RESETVAL (0x00000000u)

/*----RXINTEN Tokens----*/
#define CSL_SPI_SPIINT0_RXINTEN_DISABLE  (0x00000000u)
#define CSL_SPI_SPIINT0_RXINTEN_ENABLE   (0x00000001u)

#define CSL_SPI_SPIINT0_OVRNINTEN_MASK   (0x00000040u)
#define CSL_SPI_SPIINT0_OVRNINTEN_SHIFT  (0x00000006u)
#define CSL_SPI_SPIINT0_OVRNINTEN_RESETVAL (0x00000000u)

/*----OVRNINTEN Tokens----*/
#define CSL_SPI_SPIINT0_OVRNINTEN_DISABLE (0x00000000u)
#define CSL_SPI_SPIINT0_OVRNINTEN_ENABLE (0x00000001u)

#define CSL_SPI_SPIINT0_BITERRENA_MASK   (0x00000010u)
#define CSL_SPI_SPIINT0_BITERRENA_SHIFT  (0x00000004u)
#define CSL_SPI_SPIINT0_BITERRENA_RESETVAL (0x00000000u)

/*----BITERRENA Tokens----*/
#define CSL_SPI_SPIINT0_BITERRENA_DISABLE (0x00000000u)
#define CSL_SPI_SPIINT0_BITERRENA_ENABLE (0x00000001u)

#define CSL_SPI_SPIINT0_DESYNCENA_MASK   (0x00000008u)
#define CSL_SPI_SPIINT0_DESYNCENA_SHIFT  (0x00000003u)
#define CSL_SPI_SPIINT0_DESYNCENA_RESETVAL (0x00000000u)

/*----DESYNCENA Tokens----*/
#define CSL_SPI_SPIINT0_DESYNCENA_DISABLE (0x00000000u)
#define CSL_SPI_SPIINT0_DESYNCENA_ENABLE (0x00000001u)

#define CSL_SPI_SPIINT0_PARERRENA_MASK   (0x00000004u)
#define CSL_SPI_SPIINT0_PARERRENA_SHIFT  (0x00000002u)
#define CSL_SPI_SPIINT0_PARERRENA_RESETVAL (0x00000000u)

/*----PARERRENA Tokens----*/
#define CSL_SPI_SPIINT0_PARERRENA_DISABLE (0x00000000u)
#define CSL_SPI_SPIINT0_PARERRENA_ENABLE (0x00000001u)

#define CSL_SPI_SPIINT0_TIMEOUTENA_MASK  (0x00000002u)
#define CSL_SPI_SPIINT0_TIMEOUTENA_SHIFT (0x00000001u)
#define CSL_SPI_SPIINT0_TIMEOUTENA_RESETVAL (0x00000000u)

/*----TIMEOUTENA Tokens----*/
#define CSL_SPI_SPIINT0_TIMEOUTENA_DISABLE (0x00000000u)
#define CSL_SPI_SPIINT0_TIMEOUTENA_ENABLE (0x00000001u)

#define CSL_SPI_SPIINT0_RESETVAL         (0x00000000u)

/* SPILVL */

#define CSL_SPI_SPILVL_RXINTLVL_MASK     (0x00000100u)
#define CSL_SPI_SPILVL_RXINTLVL_SHIFT    (0x00000008u)
#define CSL_SPI_SPILVL_RXINTLVL_RESETVAL (0x00000000u)

/*----RXINTLVL Tokens----*/
#define CSL_SPI_SPILVL_RXINTLVL_INT0     (0x00000000u)
#define CSL_SPI_SPILVL_RXINTLVL_INT1     (0x00000001u)

#define CSL_SPI_SPILVL_OVRNINTLVL_MASK   (0x00000040u)
#define CSL_SPI_SPILVL_OVRNINTLVL_SHIFT  (0x00000006u)
#define CSL_SPI_SPILVL_OVRNINTLVL_RESETVAL (0x00000000u)

/*----OVRNINTLVL Tokens----*/
#define CSL_SPI_SPILVL_OVRNINTLVL_INT0   (0x00000000u)
#define CSL_SPI_SPILVL_OVRNINTLVL_INT1   (0x00000001u)

#define CSL_SPI_SPILVL_BITERRLVL_MASK    (0x00000010u)
#define CSL_SPI_SPILVL_BITERRLVL_SHIFT   (0x00000004u)
#define CSL_SPI_SPILVL_BITERRLVL_RESETVAL (0x00000000u)

/*----BITERRLVL Tokens----*/
#define CSL_SPI_SPILVL_BITERRLVL_INT0    (0x00000000u)
#define CSL_SPI_SPILVL_BITERRLVL_INT1    (0x00000001u)

#define CSL_SPI_SPILVL_DESYNCLVL_MASK    (0x00000008u)
#define CSL_SPI_SPILVL_DESYNCLVL_SHIFT   (0x00000003u)
#define CSL_SPI_SPILVL_DESYNCLVL_RESETVAL (0x00000000u)

/*----DESYNCLVL Tokens----*/
#define CSL_SPI_SPILVL_DESYNCLVL_INT0    (0x00000000u)
#define CSL_SPI_SPILVL_DESYNCLVL_INT1    (0x00000001u)

#define CSL_SPI_SPILVL_PARERRLVL_MASK    (0x00000004u)
#define CSL_SPI_SPILVL_PARERRLVL_SHIFT   (0x00000002u)
#define CSL_SPI_SPILVL_PARERRLVL_RESETVAL (0x00000000u)

/*----PARERRLVL Tokens----*/
#define CSL_SPI_SPILVL_PARERRLVL_INT0    (0x00000000u)
#define CSL_SPI_SPILVL_PARERRLVL_INT1    (0x00000001u)

#define CSL_SPI_SPILVL_TIMEOUTLVL_MASK   (0x00000002u)
#define CSL_SPI_SPILVL_TIMEOUTLVL_SHIFT  (0x00000001u)
#define CSL_SPI_SPILVL_TIMEOUTLVL_RESETVAL (0x00000000u)

/*----TIMEOUTLVL Tokens----*/
#define CSL_SPI_SPILVL_TIMEOUTLVL_INT0   (0x00000000u)
#define CSL_SPI_SPILVL_TIMEOUTLVL_INT1   (0x00000001u)

#define CSL_SPI_SPILVL_RESETVAL          (0x00000000u)

/* SPIFLG */

#define CSL_SPI_SPIFLG_RXINTFLAG_MASK    (0x00000100u)
#define CSL_SPI_SPIFLG_RXINTFLAG_SHIFT   (0x00000008u)
#define CSL_SPI_SPIFLG_RXINTFLAG_RESETVAL (0x00000000u)

/*----RXINTFLAG Tokens----*/
#define CSL_SPI_SPIFLG_RXINTFLAG_NO      (0x00000000u)
#define CSL_SPI_SPIFLG_RXINTFLAG_YES     (0x00000001u)

#define CSL_SPI_SPIFLG_OVRNINTFLG_MASK   (0x00000040u)
#define CSL_SPI_SPIFLG_OVRNINTFLG_SHIFT  (0x00000006u)
#define CSL_SPI_SPIFLG_OVRNINTFLG_RESETVAL (0x00000000u)

/*----OVRNINTFLG Tokens----*/
#define CSL_SPI_SPIFLG_OVRNINTFLG_NO     (0x00000000u)
#define CSL_SPI_SPIFLG_OVRNINTFLG_YES    (0x00000001u)

#define CSL_SPI_SPIFLG_BITERRFLG_MASK    (0x00000010u)
#define CSL_SPI_SPIFLG_BITERRFLG_SHIFT   (0x00000004u)
#define CSL_SPI_SPIFLG_BITERRFLG_RESETVAL (0x00000000u)

/*----BITERRFLG Tokens----*/
#define CSL_SPI_SPIFLG_BITERRFLG_NO      (0x00000000u)
#define CSL_SPI_SPIFLG_BITERRFLG_YES     (0x00000001u)

#define CSL_SPI_SPIFLG_DESYNCFLG_MASK    (0x00000008u)
#define CSL_SPI_SPIFLG_DESYNCFLG_SHIFT   (0x00000003u)
#define CSL_SPI_SPIFLG_DESYNCFLG_RESETVAL (0x00000000u)

/*----DESYNCFLG Tokens----*/
#define CSL_SPI_SPIFLG_DESYNCFLG_NO      (0x00000000u)
#define CSL_SPI_SPIFLG_DESYNCFLG_YES     (0x00000001u)

#define CSL_SPI_SPIFLG_PARERRFLG_MASK    (0x00000004u)
#define CSL_SPI_SPIFLG_PARERRFLG_SHIFT   (0x00000002u)
#define CSL_SPI_SPIFLG_PARERRFLG_RESETVAL (0x00000000u)

/*----PARERRFLG Tokens----*/
#define CSL_SPI_SPIFLG_PARERRFLG_NO      (0x00000000u)
#define CSL_SPI_SPIFLG_PARERRFLG_YES     (0x00000001u)

#define CSL_SPI_SPIFLG_TIMEOUTFLG_MASK   (0x00000002u)
#define CSL_SPI_SPIFLG_TIMEOUTFLG_SHIFT  (0x00000001u)
#define CSL_SPI_SPIFLG_TIMEOUTFLG_RESETVAL (0x00000000u)

/*----TIMEOUTFLG Tokens----*/
#define CSL_SPI_SPIFLG_TIMEOUTFLG_NO     (0x00000000u)
#define CSL_SPI_SPIFLG_TIMEOUTFLG_YES    (0x00000001u)

#define CSL_SPI_SPIFLG_RESETVAL          (0x00000000u)

/* SPIPC0 */

#define CSL_SPI_SPIPC0_SOMIFUN_MASK      (0x00000800u)
#define CSL_SPI_SPIPC0_SOMIFUN_SHIFT     (0x0000000Bu)
#define CSL_SPI_SPIPC0_SOMIFUN_RESETVAL  (0x00000000u)

/*----SOMIFUN Tokens----*/
#define CSL_SPI_SPIPC0_SOMIFUN_GPIO      (0x00000000u)
#define CSL_SPI_SPIPC0_SOMIFUN_SPI       (0x00000001u)

#define CSL_SPI_SPIPC0_SIMOFUN_MASK      (0x00000400u)
#define CSL_SPI_SPIPC0_SIMOFUN_SHIFT     (0x0000000Au)
#define CSL_SPI_SPIPC0_SIMOFUN_RESETVAL  (0x00000000u)

/*----SIMOFUN Tokens----*/
#define CSL_SPI_SPIPC0_SIMOFUN_GPIO      (0x00000000u)
#define CSL_SPI_SPIPC0_SIMOFUN_SPI       (0x00000001u)

#define CSL_SPI_SPIPC0_CLKFUN_MASK       (0x00000200u)
#define CSL_SPI_SPIPC0_CLKFUN_SHIFT      (0x00000009u)
#define CSL_SPI_SPIPC0_CLKFUN_RESETVAL   (0x00000000u)

/*----CLKFUN Tokens----*/
#define CSL_SPI_SPIPC0_CLKFUN_GPIO       (0x00000000u)
#define CSL_SPI_SPIPC0_CLKFUN_SPI        (0x00000001u)

#define CSL_SPI_SPIPC0_ENABLEFUN_MASK    (0x00000100u)
#define CSL_SPI_SPIPC0_ENABLEFUN_SHIFT   (0x00000008u)
#define CSL_SPI_SPIPC0_ENABLEFUN_RESETVAL (0x00000000u)

/*----ENABLEFUN Tokens----*/
#define CSL_SPI_SPIPC0_ENABLEFUN_GPIO    (0x00000000u)
#define CSL_SPI_SPIPC0_ENABLEFUN_SPI     (0x00000001u)

#define CSL_SPI_SPIPC0_SCSFUN7_MASK      (0x00000080u)
#define CSL_SPI_SPIPC0_SCSFUN7_SHIFT     (0x00000007u)
#define CSL_SPI_SPIPC0_SCSFUN7_RESETVAL  (0x00000000u)

/*----SCSFUN7 Tokens----*/
#define CSL_SPI_SPIPC0_SCSFUN7_GPIO      (0x00000000u)
#define CSL_SPI_SPIPC0_SCSFUN7_SPI       (0x00000001u)

#define CSL_SPI_SPIPC0_SCSFUN6_MASK      (0x00000040u)
#define CSL_SPI_SPIPC0_SCSFUN6_SHIFT     (0x00000006u)
#define CSL_SPI_SPIPC0_SCSFUN6_RESETVAL  (0x00000000u)

/*----SCSFUN6 Tokens----*/
#define CSL_SPI_SPIPC0_SCSFUN6_GPIO      (0x00000000u)
#define CSL_SPI_SPIPC0_SCSFUN6_SPI       (0x00000001u)

#define CSL_SPI_SPIPC0_SCSFUN5_MASK      (0x00000020u)
#define CSL_SPI_SPIPC0_SCSFUN5_SHIFT     (0x00000005u)
#define CSL_SPI_SPIPC0_SCSFUN5_RESETVAL  (0x00000000u)

/*----SCSFUN5 Tokens----*/
#define CSL_SPI_SPIPC0_SCSFUN5_GPIO      (0x00000000u)
#define CSL_SPI_SPIPC0_SCSFUN5_SPI       (0x00000001u)

#define CSL_SPI_SPIPC0_SCSFUN4_MASK      (0x00000010u)
#define CSL_SPI_SPIPC0_SCSFUN4_SHIFT     (0x00000004u)
#define CSL_SPI_SPIPC0_SCSFUN4_RESETVAL  (0x00000000u)

/*----SCSFUN4 Tokens----*/
#define CSL_SPI_SPIPC0_SCSFUN4_GPIO      (0x00000000u)
#define CSL_SPI_SPIPC0_SCSFUN4_SPI       (0x00000001u)

#define CSL_SPI_SPIPC0_SCSFUN3_MASK      (0x00000008u)
#define CSL_SPI_SPIPC0_SCSFUN3_SHIFT     (0x00000003u)
#define CSL_SPI_SPIPC0_SCSFUN3_RESETVAL  (0x00000000u)

/*----SCSFUN3 Tokens----*/
#define CSL_SPI_SPIPC0_SCSFUN3_GPIO      (0x00000000u)
#define CSL_SPI_SPIPC0_SCSFUN3_SPI       (0x00000001u)

#define CSL_SPI_SPIPC0_SCSFUN2_MASK      (0x00000004u)
#define CSL_SPI_SPIPC0_SCSFUN2_SHIFT     (0x00000002u)
#define CSL_SPI_SPIPC0_SCSFUN2_RESETVAL  (0x00000000u)

/*----SCSFUN2 Tokens----*/
#define CSL_SPI_SPIPC0_SCSFUN2_GPIO      (0x00000000u)
#define CSL_SPI_SPIPC0_SCSFUN2_SPI       (0x00000001u)

#define CSL_SPI_SPIPC0_SCSFUN1_MASK      (0x00000002u)
#define CSL_SPI_SPIPC0_SCSFUN1_SHIFT     (0x00000001u)
#define CSL_SPI_SPIPC0_SCSFUN1_RESETVAL  (0x00000000u)