📄 mplinternal.h
字号:
//**********************************************************************
//
// MPLINTERNAL.H
//
// Copyright (c) 2004 National Semiconductor Corporation.
// All Rights Reserved
//
// This is the internal file with definitions meant for MPL private
//
//**********************************************************************
#ifndef _MPLINTERNAL_H
#define _MPLINTERNAL_H
#include <oai.h> // Public
#include <mplregs.h> // Private
#include <mpldebug.h> // Public
#include <mplcommon.h> // Shared
#include <mplregdefaults.h> // Public
#include <mplclient.h> // Public
// Task Offload
#ifdef MPL_TASK_RECEIVE_FILTER
#include <mpltaskrxfilterinternal.h> // Private
#include <mpltaskrxfilter.h> // Public
#endif // MPL_TASK_RECEIVE_FILTER
#ifdef MPL_TASK_VLAN
#include <mpltaskvlaninternal.h> // Private
#include <mpltaskvlan.h> // Public
#endif // MPL_TASK_VLAN
//**********************************************************************
// Byte Ordering Macros
//
// MPL_SWAP16, MPL_SWAP32 - Swapper Macros
// MPL_HTOL16, MPL_HTOL32, MPL_ADDR_HTOL - Host to Little Endian
// MPL_HTOB16, MPL_HTOB32, MPL_ADDR_HTOB - Host to Big Endian
// MPL_LTOH16, MPL_LTOH32, MPL_ADDR_LTOH - Little Endian to Host
// MPL_BTOH16, MPL_BTOH32, MPL_ADDR_BTOH - Big Endian to Host
//**********************************************************************
#define MPL_SWAP16(value) ((value) >> 8 | (value) << 8)
#define MPL_SWAP32(value) \
(((value) >> 24 | ((value) & 0x00FF0000) >> 8 | \
((value) & 0x0000FF00) << 8 | (value) << 24))
#ifdef MPL_BIG_ENDIAN
#define MPL_HTOL16(val) ((NS_UINT16)(MPL_SWAP16((NS_UINT16)(val))))
#define MPL_LTOH16(val) ((NS_UINT16)(MPL_SWAP16((NS_UINT16)(val))))
#define MPL_HTOL32(val) ((NS_UINT32)(MPL_SWAP32((NS_UINT32)(val))))
#define MPL_LTOH32(val) ((NS_UINT32)(MPL_SWAP32((NS_UINT32)(val))))
#define MPL_HTOB16(val) ((NS_UINT16)(val))
#define MPL_BTOH16(val) ((NS_UINT16)(val))
#define MPL_HTOB32(val) ((NS_UINT32)(val))
#define MPL_BTOH32(val) ((NS_UINT32)(val))
#define MPL_ADDR_HTOB(val) (val)
#define MPL_ADDR_BTOH(val) (val)
#define MPL_ADDR_HTOL(val) MPL_SWAP32(val)
#define MPL_ADDR_LTOH(val) MPL_SWAP32(val)
#else // !MPL_BIG_ENDIAN
#define MPL_HTOL16(val) ((NS_UINT16)(val))
#define MPL_LTOH16(val) ((NS_UINT16)(val))
#define MPL_HTOL32(val) ((NS_UINT32)(val))
#define MPL_LTOH32(val) ((NS_UINT32)(val))
#define MPL_ADDR_HTOL(val) (val)
#define MPL_ADDR_LTOH(val) (val)
#define EPL_ADDR_HTOB(val) MPL_SWAP32(val)
#define EPL_ADDR_BTOH(val) MPL_SWAP32(val)
#define MPL_HTOB16(val) ((NS_UINT16)(MPL_SWAP16((NS_UINT16)(val))))
#define MPL_BTOH16(val) ((NS_UINT16)(MPL_SWAP16((NS_UINT16)(val))))
#define MPL_HTOB32(val) ((NS_UINT32)(MPL_SWAP32((NS_UINT32)(val))))
#define MPL_BTOH32(val) ((NS_UINT32)(MPL_SWAP32((NS_UINT32)(val))))
#endif // MPL_BIG_ENDIAN
//**********************************************************************
// Internal TOE Mode Register Access Macros
//
// MPL should use these macros whenever possible instead of using
// the OaiRead/Write?? functions directly.
//
// Prototypes:
//
// NS_UINT8/16/32
// MPL_READ8/16/32(
// MPL_CONTEXT *pMplCtx,
// nameOfRegister)
//
// NS_VOID
// MPL_WRITE8/16/32(
// MPL_CONTEXT *pMplCtx,
// nameOfRegister,
// NS_UINT8/16/32 valueToWrite)
//
//**********************************************************************
#define MPL_READ8( pMplCtx, regName) \
OaiIoRead8( pMplCtx->pClientHandle, \
(NS_UINT8 volatile *) \
&pMplCtx->pRegsBase->regName)
#define MPL_READ16( pMplCtx, regName) \
MPL_LTOH16( OaiIoRead16( pMplCtx->pClientHandle, \
(NS_UINT16 volatile *) \
&pMplCtx->pRegsBase->regName))
#define MPL_READ32( pMplCtx, regName) \
MPL_LTOH32( OaiIoRead32( pMplCtx->pClientHandle, \
(NS_UINT32 volatile *) \
&pMplCtx->pRegsBase->regName))
#define MPL_WRITE8( pMplCtx, regName, value) \
OaiIoWrite8( pMplCtx->pClientHandle, \
(NS_UINT8 volatile *) \
&pMplCtx->pRegsBase->regName, (value))
#define MPL_WRITE16( pMplCtx, regName, value) \
OaiIoWrite16( pMplCtx->pClientHandle, \
(NS_UINT16 volatile *) \
&pMplCtx->pRegsBase->regName, \
MPL_HTOL16((value)))
#define MPL_WRITE32( pMplCtx, regName, value) \
OaiIoWrite32( pMplCtx->pClientHandle, \
(NS_UINT32 volatile *) \
&pMplCtx->pRegsBase->regName, \
MPL_HTOL32((value)))
// MPL States
typedef enum _MPL_STATES {
MPL_STATE_INIT,
MPL_STATE_OPEN
} MPL_STATES;
// Register value type
typedef enum _MPL_REGS_TYPE{
MPL_REGS_DEFAULT,
MPL_REGS_CURRENT
} MPL_REGS_TYPE;
// Device Descriptor (same for Tx and Rx - Hw Spec Defined)
typedef struct _MPL_DESC {
NS_ADDR linkPA; // Link for the next descriptor
NS_UINT32 cmdSts; // Cmd status
NS_ADDR bufptrPA; // Address of the data buffer
#ifdef MPL_TASK_VLAN
NS_UINT32 extCtlSts; // Cmd status
NS_UINT32 pad1; // Cmd status
NS_UINT32 pad2; // Cmd status
NS_UINT32 pad3; // Cmd status
#endif
NS_VOID *mplPriv; // Private use of MPL
} MPL_DESC;
// Receive Queue
typedef struct _MPL_RECEIVE_QUEUE {
MPL_DESC *pRing; // Device Descriptor Ring
NS_UINT curr; // First Rxd with unused buffer,
// i.e. ready for hardware.
NS_UINT dirty; // First Rxd with used buffer
// i.e. needs replenishing.
NS_UINT descCnt; // Count of descriptors in the Ring
NS_ADDR ringPA; // Physical address of the Ring head
MPL_MEM_REGION *pRgnHndl; // DMA region handle
// Below are for tracking partial frames in descriptors
MPL_PKT_FRAG *pFragHead; // Head frag of the partial packet
MPL_PKT_FRAG *pFragTail; // Tail frag of the partial packet
NS_UINT fragCnt; // Number of frags collected so far
NS_UINT packetSize; // Total size of the packet
} MPL_RECEIVE_QUEUE;
// Transmit Queue
typedef struct _MPL_TRANSMIT_QUEUE {
MPL_DESC *pRing; // Device Descriptor Ring
NS_UINT curr; // First Free Txd in Ring
NS_UINT dirty; // First Used/Full Txd in Ring
NS_UINT descCnt; // Count of descriptors in the Ring
NS_ADDR ringPA; // Physical address of the Ring head
MPL_MEM_REGION *pRgnHndl; // DMA region handle
} MPL_TRANSMIT_QUEUE;
#ifdef MPL_DIAG_MODE
// Diag Mode Context
typedef struct _MPL_DIAG {
MPL_MODE mode; // Current Operation Mode
} MPL_DIAG;
#endif //MPL_DIAG_MODE
// MPL Context
typedef struct _MPL_CONTEXT {
NS_VOID *pClientHandle; // MPL Client handle
MPL_STATES state; // Current MPL State
DP8381xOpRegs *pRegsBase; // Register base
MPL_DEVICE_ID devId; // MAC Device Id
NS_UINT32 srr; // Silicon Version
NS_UINT8 permMacAddr[6]; // Permanent (EEPROM) mac address
NS_UINT16 mtu; // Current MTU
MPL_CAPS caps; // Capabilities of device and MPL
NS_UINT32 cfgReg; // CFG reg snapshot
NS_UINT32 imrReg; // IMR reg snapshot
NS_UINT32 ierReg; // IER reg snapshot
NS_UINT32 ihrReg; // IHR reg snapshot
NS_UINT32 isrReg; // ISR reg snapshot
NS_UINT32 txCfgReg; // TXCFG reg snapshot
NS_UINT32 rxCfgReg; // RXCFG reg snapshot
NS_UINT32 gpioReg; // GPIO reg snapshot
NS_UINT32 wcsrReg; // WCSR reg snapshot
NS_UINT32 ccsrReg; // WCSR reg snapshot
NS_UINT32 rfcrReg; // RFCR reg snapshot
NS_UINT32 pqcrReg; // PQCR reg snapshot
NS_UINT32 vrcrReg; // VRCR reg snapshot
NS_UINT32 vtcrReg; // VTCR reg snapshot
NS_UINT32 brarReg; // BRAR reg snapshot
NS_UINT8 txQueueCnt; // Enabled Transmit Queues
NS_UINT txDescCnt; // Total Txd count
NS_UINT maxTxDones; // Max indications in one
// transmit done notification to NSM
MPL_TRANSMIT_DONE *txDone; // Transmit done indication container
MPL_TRANSMIT_QUEUE txQueue[MPL_TRANSMIT_MAX_PRIORITYQ_CNT]; // Queues
NS_UINT rxDescCnt; // Total Rxd count
NS_UINT maxRxDones; // Max indications in one
// receive done notification to NSM
MPL_PKT *rxDone; // Receive done indication pkts
MPL_RECEIVE_QUEUE rxQueue; // Just one Rxd Queue
NS_UINT phyDeviceAddr; // Address of PHY on MII bus
NS_UINT phySiliconRev; // Silicon version of PHY
NS_VOID *phyTimer; // Timer to monitor phy patches
MPL_LINK_CFG linkCfg; // Link configuration
MPL_LINK_STATUS linkStatus; // Current link status
NS_UINT pauseType; // Current link status
MPL_POWER_STATE pwrState; // Current power state
NS_UINT pwrWakeType; // Current wake types
#ifdef MPL_DIAG_MODE
MPL_DIAG diag; // Diag mode context
#endif //MPL_DIAG_MODE
#ifdef MPL_TASK_RECEIVE_FILTER
MPL_TASK_FILTER taskRxFilter; // Rx Filter Task Context
#endif // MPL_TASK_RECEIVE_FILTER
#ifdef MPL_TASK_VLAN
MPL_TASK_VLAN_CTX taskVlan; // VLAN Task Context
#endif // MPL_TASK_VLAN
} MPL_CONTEXT;
// Checked build internal definitions.
#ifdef MPL_CHECKED_BUILD
#define NS_PHYS_ADDR_BUF_SIZE (2 * sizeof( NS_ADDR) + 1)
#define NS_LOG_ADDR_BUF_SIZE (2 * sizeof( NS_VOID *) + 1)
#endif //MPL_CHECKED_BUILD
// MPL Internally Shared APIs
#if defined(__cplusplus)
extern "C"
{
#endif
NS_VOID
freeTxdRing(
IN MPL_CONTEXT *pMplCtx
);
NS_VOID
freeRxdRing(
IN MPL_CONTEXT *pMplCtx
);
NS_VOID
setSoftRegs(
IN NS_VOID *pMplHandle,
IN MPL_REGS_TYPE valType
);
NS_VOID
setHardRegs(
IN NS_VOID *pMplHandle
);
NS_VOID
phyTimerHandler(
IN NS_VOID *pMplHandle
);
#if defined(__cplusplus)
}
#endif
#endif // _MPLINTERNAL_H
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -