📄 hardware.c
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//###########################################################################
//
// FILE: hardware.c
//
// TITLE: DSP28 GPIO - Port B7..B0 :, software delay
//
//
//###########################################################################
#include "DSP281x_Device.h"
// Prototype statements for functions found within this file.
void delay_loop(long);
void Gpio_select(void);
void InitSystem(void);
void main(void)
{
unsigned int i;
unsigned int LED[8]= {0x0001,0x0002,0x0004,0x0008,
0x0010,0x0020,0x0040,0x0080};
InitSystem(); // Initialize the DSP's core Registers
// Speed_up the silicon A Revision.
// No need to call this function for Rev. C later silicon versions
Gpio_select(); // Setup the GPIO Multiplex Registers
while(1)
{
for(i=0;i<14;i++){
if(i<7) GpioDataRegs.GPBDAT.all = LED[i];
else GpioDataRegs.GPBDAT.all = LED[14-i];
delay_loop(1000000);
}
}
}
void delay_loop(long end)
{
long i;
for (i = 0; i < end; i++);
EALLOW;
SysCtrlRegs.WDKEY = 0x55;
SysCtrlRegs.WDKEY = 0xAA;
EDIS;
}
void Gpio_select(void)
{
EALLOW;
GpioMuxRegs.GPAMUX.all = 0x0; // all GPIO port Pin's to I/O
GpioMuxRegs.GPBMUX.all = 0x0;
GpioMuxRegs.GPDMUX.all = 0x0;
GpioMuxRegs.GPFMUX.all = 0x0;
GpioMuxRegs.GPEMUX.all = 0x0;
GpioMuxRegs.GPGMUX.all = 0x0;
GpioMuxRegs.GPADIR.all = 0x0; // GPIO PORT as input
GpioMuxRegs.GPBDIR.all = 0x00FF; // GPIO Port B15-B8 input , B7-B0 output
GpioMuxRegs.GPDDIR.all = 0x0; // GPIO PORT as input
GpioMuxRegs.GPEDIR.all = 0x0; // GPIO PORT as input
GpioMuxRegs.GPFDIR.all = 0x0; // GPIO PORT as input
GpioMuxRegs.GPGDIR.all = 0x0; // GPIO PORT as input
GpioMuxRegs.GPAQUAL.all = 0x0; // Set GPIO input qualifier values to zero
GpioMuxRegs.GPBQUAL.all = 0x0;
GpioMuxRegs.GPDQUAL.all = 0x0;
GpioMuxRegs.GPEQUAL.all = 0x0;
EDIS;
}
void InitSystem(void)
{
EALLOW;
SysCtrlRegs.WDCR= 0x00AF; // Setup the watchdog
// 0x00E8 to disable the Watchdog , Prescaler = 1
// 0x00AF to NOT disable the Watchdog, Prescaler = 64
SysCtrlRegs.SCSR = 0; // Watchdog generates a RESET
SysCtrlRegs.PLLCR.bit.DIV = 10; // Setup the Clock PLL to multiply by 5
SysCtrlRegs.HISPCP.all = 0x1; // Setup Highspeed Clock Prescaler to divide by 2
SysCtrlRegs.LOSPCP.all = 0x2; // Setup Lowspeed CLock Prescaler to divide by 4
// Peripheral clock enables set for the selected peripherals.
SysCtrlRegs.PCLKCR.bit.EVAENCLK=0;
SysCtrlRegs.PCLKCR.bit.EVBENCLK=0;
SysCtrlRegs.PCLKCR.bit.SCIAENCLK=0;
SysCtrlRegs.PCLKCR.bit.SCIBENCLK=0;
SysCtrlRegs.PCLKCR.bit.MCBSPENCLK=0;
SysCtrlRegs.PCLKCR.bit.SPIENCLK=0;
SysCtrlRegs.PCLKCR.bit.ECANENCLK=0;
SysCtrlRegs.PCLKCR.bit.ADCENCLK=0;
EDIS;
}
//===========================================================================
// End of SourceCode.
//===========================================================================
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